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1. 发明授权

US08536660B2 Hybrid process for forming metal gates of MOS devices 有权
标题翻译：用于形成MOS器件的金属栅极的混合工艺
公开(公告)号：US08536660B2
公开(公告)日：2013-09-17
申请号：US12047113
申请日：2008-03-12
申请人： Peng-Fu Hsu , Yong-Tian Hou , Ssu-Yi Li , Kuo-Tai Huang , Mong Song Liang
发明人： Peng-Fu Hsu , Yong-Tian Hou , Ssu-Yi Li , Kuo-Tai Huang , Mong Song Liang
IPC分类号： H01L21/02
CPC分类号： H01L21/823857 , H01L21/823842 , H01L27/092
摘要： A semiconductor structure includes a first MOS device including a first gate, and a second MOS device including a second gate. The first gate includes a first high-k dielectric over a semiconductor substrate; a second high-k dielectric over the first high-k dielectric; a first metal layer over the second high-k dielectric, wherein the first metal layer dominates a work-function of the first MOS device; and a second metal layer over the first metal layer. The second gate includes a third high-k dielectric over the semiconductor substrate, wherein the first and the third high-k dielectrics are formed of same materials, and have substantially a same thickness; a third metal layer over the third high-k dielectric, wherein the third metal layer and the second metal layer are formed of same materials, and have substantially a same thickness; and a fourth metal layer over the third metal layer.
摘要翻译：半导体结构包括包括第一栅极的第一MOS器件和包括第二栅极的第二MOS器件。第一栅极包括在半导体衬底上的第一高k电介质; 第一高k电介质上的第二高k电介质; 在所述第二高k电介质上的第一金属层，其中所述第一金属层支配所述第一MOS器件的功函数; 以及在所述第一金属层上的第二金属层。第二栅极包括半导体衬底上的第三高k电介质，其中第一和第三高k电介质由相同的材料形成，并具有基本上相同的厚度; 在所述第三高k电介质上的第三金属层，其中所述第三金属层和所述第二金属层由相同的材料形成，并且具有基本相同的厚度; 以及在第三金属层上的第四金属层。

2. 发明授权

US08193586B2 Sealing structure for high-K metal gate 有权
标题翻译：高K金属门密封结构
公开(公告)号：US08193586B2
公开(公告)日：2012-06-05
申请号：US12389535
申请日：2009-02-20
申请人： Chien-Hao Chen , Hao-Ming Lien , Ssu-Yi Li , Jun-Lin Yeh , Kang-Cheng Lin , Kuo-Tai Huang , Chii-Horng Li , Chien-Hau Fei , Wen-Chih Yang , Jin-Aun Ng , Chi Hsin Chang , Chun Ming Lin , Harry Chuang , Chien-Liang Chen
发明人： Chien-Hao Chen , Hao-Ming Lien , Ssu-Yi Li , Jun-Lin Yeh , Kang-Cheng Lin , Kuo-Tai Huang , Chii-Horng Li , Chien-Hau Fei , Wen-Chih Yang , Jin-Aun Ng , Chi Hsin Chang , Chun Ming Lin , Harry Chuang , Chien-Liang Chen
IPC分类号： H01L21/02 , H01L21/8238
CPC分类号： H01L21/28088 , H01L29/4966 , H01L29/517 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The present disclosure provides a semiconductor device that includes a semiconductor substrate and a transistor formed in the substrate. The transistor includes a gate stack having a high-k dielectric and metal gate, a sealing layer formed on sidewalls of the gate stack, the sealing layer having an inner edge and an outer edge, the inner edge interfacing with the sidewall of the gate stack, a spacer formed on the outer edge of the sealing layer, and a source/drain region formed on each side of the gate stack, the source/drain region including a lightly doped source/drain (LDD) region that is aligned with the outer edge of the sealing layer.
摘要翻译：本公开提供一种半导体器件，其包括半导体衬底和形成在衬底中的晶体管。晶体管包括具有高k电介质和金属栅极的栅极堆叠，形成在栅极叠层的侧壁上的密封层，密封层具有内边缘和外边缘，内边缘与栅叠层的侧壁相接合，形成在密封层的外边缘上的隔离物和形成在栅极堆叠的每一侧上的源极/漏极区域，源极/漏极区域包括与外部电极对准的轻掺杂源极/漏极（LDD）区域密封层的边缘。

3. 发明申请

US20090230479A1 Hybrid Process for Forming Metal Gates of MOS Devices 有权
标题翻译： MOS器件金属门的混合工艺
公开(公告)号：US20090230479A1
公开(公告)日：2009-09-17
申请号：US12047113
申请日：2008-03-12
申请人： Peng-Fu Hsu , Yong-Tian Hou , Ssu-Yi Li , Kuo-Tai Huang , Mong Song Liang
发明人： Peng-Fu Hsu , Yong-Tian Hou , Ssu-Yi Li , Kuo-Tai Huang , Mong Song Liang
IPC分类号： H01L27/092
CPC分类号： H01L21/823857 , H01L21/823842 , H01L27/092
摘要： A semiconductor structure includes a first MOS device including a first gate, and a second MOS device including a second gate. The first gate includes a first high-k dielectric over a semiconductor substrate; a second high-k dielectric over the first high-k dielectric; a first metal layer over the second high-k dielectric, wherein the first metal layer dominates a work-function of the first MOS device; and a second metal layer over the first metal layer. The second gate includes a third high-k dielectric over the semiconductor substrate, wherein the first and the third high-k dielectrics are formed of same materials, and have substantially a same thickness; a third metal layer over the third high-k dielectric, wherein the third metal layer and the second metal layer are formed of same materials, and have substantially a same thickness; and a fourth metal layer over the third metal layer.
摘要翻译：半导体结构包括包括第一栅极的第一MOS器件和包括第二栅极的第二MOS器件。第一栅极包括在半导体衬底上的第一高k电介质; 第一高k电介质上的第二高k电介质; 在所述第二高k电介质上的第一金属层，其中所述第一金属层支配所述第一MOS器件的功函数; 以及在所述第一金属层上的第二金属层。第二栅极包括半导体衬底上的第三高k电介质，其中第一和第三高k电介质由相同的材料形成，并具有基本上相同的厚度; 在所述第三高k电介质上的第三金属层，其中所述第三金属层和所述第二金属层由相同的材料形成，并且具有基本相同的厚度; 以及在第三金属层上的第四金属层。

4. 发明申请

US20120086075A1 DEVICE WITH ALUMINUM SURFACE PROTECTION 有权
标题翻译：具有铝表面保护的器件
公开(公告)号：US20120086075A1
公开(公告)日：2012-04-12
申请号：US13327992
申请日：2011-12-16
申请人： Kuo Bin HUANG , Ssu-Yi LI , Ryan Chia-Jen CHEN , Chi-Ming YANG , Chyi Shyuan CHERN , Chin-Hsiang LIN
发明人： Kuo Bin HUANG , Ssu-Yi LI , Ryan Chia-Jen CHEN , Chi-Ming YANG , Chyi Shyuan CHERN , Chin-Hsiang LIN
IPC分类号： H01L27/088
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L21/28247 , H01L29/4958 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/6659 , H01L29/7833
摘要： A semiconductor structure with a metal gate structure includes a first type field-effect transistor having a first gate including: a high k dielectric material on a substrate, a first metal layer on the high k dielectric material layer and having a first work function, and a first aluminum layer on the first metal layer. The first aluminum layer includes an interfacial layer including aluminum, nitrogen and oxygen. The device also includes a second type field-effect transistor having a second gate including: the high k dielectric material on the substrate, a second metal layer on the high k dielectric material layer and having a second work function different from the first work function, and a second aluminum layer on the second metal layer.
摘要翻译：具有金属栅极结构的半导体结构包括具有第一栅极的第一型场效应晶体管，包括：基板上的高k电介质材料，高k电介质材料层上的第一金属层，具有第一功函数，以及在第一金属层上的第一铝层。第一铝层包括包含铝，氮和氧的界面层。该器件还包括具有第二栅极的第二类场效应晶体管，其包括：衬底上的高k电介质材料，高k电介质材料层上的第二金属层，具有不同于第一功函数的第二功函数，和在第二金属层上的第二铝层。

5. 发明申请

US20100044803A1 SEALING STRUCTURE FOR HIGH-K METAL GATE AND METHOD OF MAKING 有权
标题翻译：高K金属门的密封结构及其制备方法
公开(公告)号：US20100044803A1
公开(公告)日：2010-02-25
申请号：US12389535
申请日：2009-02-20
申请人： Chien-Hao Chen , Hao-Ming Lien , Ssu-Yi Li , Jun-Lin Yeh , Kang-Cheng Lin , Kuo-Tai Huang , Chii-Horng Li , Chien-Liang Chen , Chung-Hau Fei , Wen-Chih Yang , Jin-Aun Ng , Chi Hsin Chang , Chun Ming Lin , Harry Chuang
发明人： Chien-Hao Chen , Hao-Ming Lien , Ssu-Yi Li , Jun-Lin Yeh , Kang-Cheng Lin , Kuo-Tai Huang , Chii-Horng Li , Chien-Liang Chen , Chung-Hau Fei , Wen-Chih Yang , Jin-Aun Ng , Chi Hsin Chang , Chun Ming Lin , Harry Chuang
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L21/28088 , H01L29/4966 , H01L29/517 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The present disclosure provides a semiconductor device that includes a semiconductor substrate and a transistor formed in the substrate. The transistor includes a gate stack having a high-k dielectric and metal gate, a sealing layer formed on sidewalls of the gate stack, the sealing layer having an inner edge and an outer edge, the inner edge interfacing with the sidewall of the gate stack, a spacer formed on the outer edge of the sealing layer, and a source/drain region formed on each side of the gate stack, the source/drain region including a lightly doped source/drain (LDD) region that is aligned with the outer edge of the sealing layer.
摘要翻译：本公开提供一种半导体器件，其包括半导体衬底和形成在衬底中的晶体管。晶体管包括具有高k电介质和金属栅极的栅极堆叠，形成在栅极叠层的侧壁上的密封层，密封层具有内边缘和外边缘，内边缘与栅叠层的侧壁相接合，形成在密封层的外边缘上的隔离物和形成在栅极堆叠的每一侧上的源极/漏极区域，源极/漏极区域包括与外部电极对准的轻掺杂源极/漏极（LDD）区域密封层的边缘。

6. 发明授权

US08237231B2 Device with aluminum surface protection 有权
标题翻译：具有铝表面保护的装置
公开(公告)号：US08237231B2
公开(公告)日：2012-08-07
申请号：US13327992
申请日：2011-12-16
申请人： Kuo Bin Huang , Ssu-Yi Li , Ryan Chia-Jen Chen , Chi-Ming Yang , Chyi Shyuan Chern , Chin-Hsiang Lin
发明人： Kuo Bin Huang , Ssu-Yi Li , Ryan Chia-Jen Chen , Chi-Ming Yang , Chyi Shyuan Chern , Chin-Hsiang Lin
IPC分类号： H01L27/088
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L21/28247 , H01L29/4958 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/6659 , H01L29/7833
摘要： A semiconductor structure with a metal gate structure includes a first type field-effect transistor having a first gate including: a high k dielectric material on a substrate, a first metal layer on the high k dielectric material layer and having a first work function, and a first aluminum layer on the first metal layer. The first aluminum layer includes an interfacial layer including aluminum, nitrogen and oxygen. The device also includes a second type field-effect transistor having a second gate including: the high k dielectric material on the substrate, a second metal layer on the high k dielectric material layer and having a second work function different from the first work function, and a second aluminum layer on the second metal layer.
摘要翻译：具有金属栅极结构的半导体结构包括具有第一栅极的第一型场效应晶体管，包括：基板上的高k电介质材料，高k电介质材料层上的第一金属层，具有第一功函数，以及在第一金属层上的第一铝层。第一铝层包括包含铝，氮和氧的界面层。该器件还包括具有第二栅极的第二类场效应晶体管，其包括：衬底上的高k电介质材料，高k电介质材料层上的第二金属层，具有不同于第一功函数的第二功函数，和在第二金属层上的第二铝层。

7. 发明授权

US08119473B2 High temperature anneal for aluminum surface protection 有权
标题翻译：高温退火铝表面保护
公开(公告)号：US08119473B2
公开(公告)日：2012-02-21
申请号：US12651017
申请日：2009-12-31
申请人： Kuo Bin Huang , Ssu-Yi Li , Ryan Chia-Jen Chen , Chi-Ming Yang , Chyi Shyuan Chern , Chin-Hsiang Lin
发明人： Kuo Bin Huang , Ssu-Yi Li , Ryan Chia-Jen Chen , Chi-Ming Yang , Chyi Shyuan Chern , Chin-Hsiang Lin
IPC分类号： H01L21/8232
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L21/28247 , H01L29/4958 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/6659 , H01L29/7833
摘要： The present disclosure also provides another embodiment of a method for making metal gate stacks. The method includes forming a first dummy gate and a second dummy gate on a substrate; removing a polysilicon layer from the first dummy gate, resulting in a first gate trench; forming a first metal layer and a first aluminum layer in the first gate trench; applying a chemical mechanical polishing (CMP) process to the substrate; performing an annealing process to the first aluminum layer using a nitrogen and oxygen containing gas, forming an interfacial layer of aluminum, nitrogen and oxygen on the first aluminum layer; thereafter removing the polysilicon layer from the second dummy gate, resulting in a second gate trench; and forming a second metal layer and a second aluminum layer on the second metal layer in the second gate trench.
摘要翻译：本公开还提供了制造金属栅极叠层的方法的另一个实施例。该方法包括在衬底上形成第一虚拟栅极和第二虚拟栅极; 从第一伪栅极去除多晶硅层，产生第一栅极沟槽; 在所述第一栅极沟槽中形成第一金属层和第一铝层; 对基材进行化学机械抛光（CMP）工艺; 使用含氮和氧的气体对所述第一铝层进行退火处理，在所述第一铝层上形成铝，氮和氧的界面层; 然后从第二伪栅极去除多晶硅层，产生第二栅极沟槽; 以及在所述第二栅极沟槽中的所述第二金属层上形成第二金属层和第二铝层。

8. 发明申请

US20110156166A1 High Temperature Anneal for Aluminum Surface Protection 有权
标题翻译：高温退火铝表面保护
公开(公告)号：US20110156166A1
公开(公告)日：2011-06-30
申请号：US12651017
申请日：2009-12-31
申请人： Kuo Bin Huang , Ssu-Yi Li , Ryan Chia-Jen Chen , Chi-Ming Yang , Chyi Shyuan Chern , Chin-Hsiang Lin
发明人： Kuo Bin Huang , Ssu-Yi Li , Ryan Chia-Jen Chen , Chi-Ming Yang , Chyi Shyuan Chern , Chin-Hsiang Lin
IPC分类号： H01L27/088 , H01L21/8234
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L21/28247 , H01L29/4958 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/6659 , H01L29/7833
摘要： The present disclosure also provides another embodiment of a method for making metal gate stacks. The method includes forming a first dummy gate and a second dummy gate on a substrate; removing a polysilicon layer from the first dummy gate, resulting in a first gate trench; forming a first metal layer and a first aluminum layer in the first gate trench; applying a chemical mechanical polishing (CMP) process to the substrate; performing an annealing process to the first aluminum layer using a nitrogen and oxygen containing gas, forming an interfacial layer of aluminum, nitrogen and oxygen on the first aluminum layer; thereafter removing the polysilicon layer from the second dummy gate, resulting in a second gate trench; and forming a second metal layer and a second aluminum layer on the second metal layer in the second gate trench.
摘要翻译：本公开还提供了制造金属栅极叠层的方法的另一个实施例。该方法包括在衬底上形成第一虚拟栅极和第二虚拟栅极; 从第一伪栅极去除多晶硅层，产生第一栅极沟槽; 在所述第一栅极沟槽中形成第一金属层和第一铝层; 对基材进行化学机械抛光（CMP）工艺; 使用含氮和氧的气体对所述第一铝层进行退火处理，在所述第一铝层上形成铝，氮和氧的界面层; 然后从第二虚拟栅极去除多晶硅层，产生第二栅极沟槽; 以及在所述第二栅极沟槽中的所述第二金属层上形成第二金属层和第二铝层。

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