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1. 发明授权

US07781765B2 Mask for crystallizing polysilicon and a method for forming thin film transistor using the mask 有权
标题翻译：用于结晶多晶硅的掩模和使用掩模形成薄膜晶体管的方法
公开(公告)号：US07781765B2
公开(公告)日：2010-08-24
申请号：US11737245
申请日：2007-04-19
申请人： Myung-Koo Kang , Hyun-Jae Kim , Sook-Young Kang
发明人： Myung-Koo Kang , Hyun-Jae Kim , Sook-Young Kang
IPC分类号： H01L29/04
CPC分类号： H01L21/02675 , H01L21/02532 , H01L21/0268 , H01L21/2026 , H01L29/66757 , H01L29/78675 , Y10S260/35
摘要： A mask for forming polysilicon has a first slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a second slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while baring the same width, a third slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, and a fourth slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width. The slit patterns arranged at the first to fourth slit regions are sequentially enlarged in width in the horizontal direction in multiple proportion to the width d of the slit pattern at the first slit region. The centers of the slit patterns arranged at the first to fourth slit regions in the horizontal direction are placed at the same line. The slit patterns arranged at the respective slit regions in the vertical direction are spaced from each other with a distance 8*d. Alternatively, the first to fourth slit regions may be arranged in reverse order, or in the vertical direction.
摘要翻译：用于形成多晶硅的掩模具有第一狭缝区域，其中垂直方向上布置多个水平狭缝图案，同时承载相同的宽度;第二狭缝区域，其中沿垂直方向布置多个水平狭缝图案，同时使其相同宽度，在垂直方向上布置多个水平狭缝图案同时具有相同宽度的第三狭缝区域，以及沿垂直方向布置多个水平狭缝图案的第四狭缝区域，同时承载相同的宽度。布置在第一至第四狭缝区域的狭缝图案在第一狭缝区域上与狭缝图案的宽度d成一定比例地沿水平方向的宽度依次增大。沿水平方向布置在第一至第四狭缝区域处的狭缝图案的中心位于相同的线上。在垂直方向的各个狭缝区域上排列的狭缝图案间隔8 * d。或者，第一至第四狭缝区域可以以相反的顺序或在垂直方向上布置。

2. 发明授权

US07294857B2 Polysilicon thin film transistor array panel and manufacturing method thereof 有权
标题翻译：多晶硅薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07294857B2
公开(公告)日：2007-11-13
申请号：US11048726
申请日：2005-02-03
申请人： Hyun-Jae Kim , Sook-Young Kang , Dong-Byum Kim , Su-Gyeong Lee , Myung-Koo Kang
发明人： Hyun-Jae Kim , Sook-Young Kang , Dong-Byum Kim , Su-Gyeong Lee , Myung-Koo Kang
IPC分类号： H01L29/04
CPC分类号： H01L21/02678 , C30B13/24 , C30B29/06 , H01L21/02532 , H01L21/02595 , H01L21/2026 , H01L27/1229 , H01L27/1285 , H01L27/1296 , Y10T428/24273
摘要： A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.
摘要翻译：提供一种制造薄膜晶体管阵列面板的方法，其包括：在绝缘衬底上沉积非晶硅层; 通过使用掩模的多个激光照射将非晶硅层转化为多晶硅层; 在所述多晶硅层上形成栅极绝缘层; 在所述栅极绝缘层上形成多个栅极线; 在所述栅极线上形成第一层间绝缘层; 在所述第一层间绝缘层上形成多条数据线; 在数据线上形成第二层间绝缘层; 以及在所述第二层间绝缘层上形成多个像素电极，其中所述掩模包括以混合方式布置的多个透射区域和多个阻挡区域。

3. 发明授权

US07164153B2 Thin film transistor array panel 有权
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US07164153B2
公开(公告)日：2007-01-16
申请号：US10521345
申请日：2003-11-04
申请人： Su-Gyeong Lee , Sook-Young Kang , Myung-Koo Kang , Hyun-Jae Kim , James S. Im
发明人： Su-Gyeong Lee , Sook-Young Kang , Myung-Koo Kang , Hyun-Jae Kim , James S. Im
IPC分类号： H01L29/04
CPC分类号： H01L27/1214 , H01L27/1255 , H01L27/1285 , H01L27/1296 , H01L29/78645
摘要： A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer; a gate wire formed on the first insulating layer; a second insulating layer formed on the gate wire; a data wire formed on the second insulating layer; a third insulating layer formed on the data wire; a pixel electrode formed on the third insulating layer and connected to the data wire, wherein width and length of at least one of the first and the second semiconductor portions vary between at least two pixel areas.
摘要翻译：提供一种薄膜晶体管阵列面板，其包括：包括多个像素区域的基板; 半导体层，形成在所述基板上，并且在各像素区域中包括多对第一和第二半导体部分; 形成在所述半导体层上的第一绝缘层; 形成在所述第一绝缘层上的栅极线; 形成在栅极线上的第二绝缘层; 形成在所述第二绝缘层上的数据线; 形成在数据线上的第三绝缘层; 形成在第三绝缘层上并连接到数据线的像素电极，其中第一和第二半导体部分中的至少一个的宽度和长度在至少两个像素区域之间变化。

4. 发明申请

US20060102902A1 Thin film transistor array panel 有权
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US20060102902A1
公开(公告)日：2006-05-18
申请号：US10521345
申请日：2003-11-04
申请人： Su-Gyeong Lee , Sook-Young Kang , Myung-Koo Kang , Hyun-Jae Kim , James Im
发明人： Su-Gyeong Lee , Sook-Young Kang , Myung-Koo Kang , Hyun-Jae Kim , James Im
IPC分类号： H01L29/76
CPC分类号： H01L27/1214 , H01L27/1255 , H01L27/1285 , H01L27/1296 , H01L29/78645
摘要： A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer; a gate wire formed on the first insulating layer; a second insulating layer formed on the gate wire; a data wire formed on the second insulating layer; a third insulating layer formed on the data wire; a pixel electrode formed on the third insulating layer and connected to the data wire, wherein width and length of at least one of the first and the second semiconductor portions vary between at least two pixel areas.
摘要翻译：提供一种薄膜晶体管阵列面板，其包括：包括多个像素区域的基板; 半导体层，形成在所述基板上，并且在各像素区域中包括多对第一和第二半导体部分; 形成在所述半导体层上的第一绝缘层; 形成在所述第一绝缘层上的栅极线; 形成在栅极线上的第二绝缘层; 形成在所述第二绝缘层上的数据线; 形成在数据线上的第三绝缘层; 形成在第三绝缘层上并连接到数据线的像素电极，其中第一和第二半导体部分中的至少一个的宽度和长度在至少两个像素区域之间变化。

5. 发明申请

US20050151196A1 Polysilicon thin film transistor array panel and manufacturing method thereof 有权
标题翻译：多晶硅薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20050151196A1
公开(公告)日：2005-07-14
申请号：US11048726
申请日：2005-02-03
申请人： Hyun-Jae Kim , Sook-Young Kang , Dong-Byum Kim , Su-Gyeong Lee , Myung-Koo Kang
发明人： Hyun-Jae Kim , Sook-Young Kang , Dong-Byum Kim , Su-Gyeong Lee , Myung-Koo Kang
IPC分类号： H01L51/50 , G09F9/30 , H01L21/00 , H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/01 , H01L27/08 , H01L27/12 , H01L27/32 , H01L29/04 , H01L29/786 , H01L29/788 , H01L31/036 , H01L31/0392 , H01L31/20 , H05B33/14
CPC分类号： H01L21/02678 , C30B13/24 , C30B29/06 , H01L21/02532 , H01L21/02595 , H01L21/2026 , H01L27/1229 , H01L27/1285 , H01L27/1296 , Y10T428/24273
摘要： A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.
摘要翻译：提供一种制造薄膜晶体管阵列面板的方法，其包括：在绝缘衬底上沉积非晶硅层; 通过使用掩模的多个激光照射将非晶硅层转化为多晶硅层; 在所述多晶硅层上形成栅极绝缘层; 在所述栅极绝缘层上形成多个栅极线; 在栅极线上形成第一层间绝缘层; 在所述第一层间绝缘层上形成多条数据线; 在数据线上形成第二层间绝缘层; 以及在所述第二层间绝缘层上形成多个像素电极，其中所述掩模包括以混合方式布置的多个透射区域和多个阻挡区域。

6. 发明申请

US20050083445A1 Thin film transistor and liquid crystal display 有权
标题翻译：薄膜晶体管和液晶显示器
公开(公告)号：US20050083445A1
公开(公告)日：2005-04-21
申请号：US10500514
申请日：2003-01-03
申请人： Myung-Koo Kang , Hyun-Jae Kim , Sook-Young Kang , Woo-Suk Chung
发明人： Myung-Koo Kang , Hyun-Jae Kim , Sook-Young Kang , Woo-Suk Chung
IPC分类号： G02F1/1368 , G02F1/136 , G02F1/1362 , H01L21/20 , H01L21/336 , H01L29/423 , H01L29/786 , H01L29/15
CPC分类号： H01L29/42384 , G02F1/13454 , G02F2202/104 , H01L21/02675 , H01L21/2026 , H01L29/78675
摘要： The present invention relates to a thin film transistor and a liquid crystal display. A gate electrode is formed to include at least one portion extending in a direction perpendicular to a gain growing direction in order to make electrical charge mobility of TFTs uniform without increasing the size of the driving circuit. A thin film transistor according to the present invention includes a semiconductor pattern a thin film of poly-crystalline silicon containing grown grains on the insulating substrate. The semiconductor pattern includes a channel region and source and drain regions opposite with respect to the channel region. A gate insulating layer covers the semiconductor pattern. On the gate insulating layer, a gate electrode including at least one portion extending in a direction crossing the growing direction of the grains and overlapping the channel region is formed. In a liquid crystal display according to the present invention, a plurality of thin film transistors forming a data driver circuit include thin films of polycrystalline silicon formed by sequential lateral solidification, at least one portion of a gate electrode of each thin film transistor extends in a direction crossing the grain growing direction, and at least one of the plurality of thin film transistors has a gate electrode having a pattern different from other thin film transistors.
摘要翻译：本发明涉及薄膜晶体管和液晶显示器。栅电极被形成为包括沿垂直于增益生长方向的方向延伸的至少一个部分，以使TFT的电荷迁移率均匀，而不增加驱动电路的尺寸。根据本发明的薄膜晶体管包括在绝缘基板上具有含有生长晶粒的多晶硅薄膜的半导体图案。半导体图案包括沟道区和相对于沟道区相反的源极和漏极区。栅极绝缘层覆盖半导体图案。在栅极绝缘层上形成栅电极，该栅电极具有沿与晶粒的生长方向交叉的方向延伸的至少一部分，与沟道区重叠。在根据本发明的液晶显示器中，形成数据驱动电路的多个薄膜晶体管包括通过顺序横向固化形成的多晶硅薄膜，每个薄膜晶体管的栅电极的至少一部分以方向与晶粒生长方向交叉，并且多个薄膜晶体管中的至少一个具有与其它薄膜晶体管不同的图案的栅电极。

7. 发明授权

US09005697B2 Polysilicon thin film transistor array panel and manufacturing method thereof 有权
标题翻译：多晶硅薄膜晶体管阵列面板及其制造方法
公开(公告)号：US09005697B2
公开(公告)日：2015-04-14
申请号：US11866617
申请日：2007-10-03
申请人： Hyun-Jae Kim , Sook-Young Kang , Dong-Byum Kim , Su-Gyeong Lee , Myung-Koo Kang
发明人： Hyun-Jae Kim , Sook-Young Kang , Dong-Byum Kim , Su-Gyeong Lee , Myung-Koo Kang
IPC分类号： B05D7/00 , H01L27/12 , C30B13/24 , C30B29/06 , H01L21/20
CPC分类号： H01L21/02678 , C30B13/24 , C30B29/06 , H01L21/02532 , H01L21/02595 , H01L21/2026 , H01L27/1229 , H01L27/1285 , H01L27/1296 , Y10T428/24273
摘要： A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.
摘要翻译：提供一种制造薄膜晶体管阵列面板的方法，其包括：在绝缘衬底上沉积非晶硅层; 通过使用掩模的多个激光照射将非晶硅层转化为多晶硅层; 在所述多晶硅层上形成栅极绝缘层; 在所述栅极绝缘层上形成多个栅极线; 在栅极线上形成第一层间绝缘层; 在所述第一层间绝缘层上形成多条数据线; 在数据线上形成第二层间绝缘层; 以及在所述第二层间绝缘层上形成多个像素电极，其中所述掩模包括以混合方式布置的多个透射区域和多个阻挡区域。

8. 发明授权

US07791076B2 Thin film transistor having a three-portion gate electrode and liquid crystal display using the same 有权
标题翻译：具有三部分栅电极的薄膜晶体管和使用其的液晶显示器
公开(公告)号：US07791076B2
公开(公告)日：2010-09-07
申请号：US12469256
申请日：2009-05-20
申请人： Myung-Koo Kang , Hyun-Jae Kim , Sook-Young Kang , Woo-Suk Chung
发明人： Myung-Koo Kang , Hyun-Jae Kim , Sook-Young Kang , Woo-Suk Chung
IPC分类号： H01L21/00
CPC分类号： H01L29/42384 , G02F1/13454 , G02F2202/104 , H01L21/02675 , H01L21/2026 , H01L29/78675
摘要： A thin film transistor and a liquid crystal display, in which a gate electrode is formed to include at least one portion extending in a direction perpendicular to a gain growing direction in order to make electrical charge mobility of TFTs uniform without increasing the size of the driving circuit. A thin film transistor according to the present invention includes a semiconductor pattern a thin film of poly-crystalline silicon containing grown grains on the insulating substrate. The semiconductor pattern includes a channel region and source and drain regions opposite with respect to the channel region. A gate insulating layer covers the semiconductor pattern. On the gate insulating layer, a gate electrode including at least one portion extending in a direction crossing the growing direction of the grains and overlapping the channel region is formed. In a liquid crystal display, a plurality of thin film transistors forming a data driver circuit include thin films of polycrystalline silicon formed by sequential lateral solidification, at least one portion of a gate electrode of each thin film transistor extends in a direction crossing the grain growing direction, and at least one of the plurality of thin film transistors has a gate electrode having a pattern different from other thin film transistors.
摘要翻译：一种薄膜晶体管和液晶显示器，其中栅极形成为包括沿垂直于增益生长方向的方向延伸的至少一个部分，以使TFT的电荷迁移率均匀，而不增加驱动尺寸电路。根据本发明的薄膜晶体管包括在绝缘基板上具有含有生长晶粒的多晶硅薄膜的半导体图案。半导体图案包括沟道区和相对于沟道区相反的源极和漏极区。栅极绝缘层覆盖半导体图案。在栅极绝缘层上形成栅电极，该栅电极具有沿与晶粒的生长方向交叉的方向延伸的至少一部分，与沟道区重叠。在液晶显示器中，形成数据驱动电路的多个薄膜晶体管包括通过顺序横向固化形成的多晶硅薄膜，每个薄膜晶体管的栅电极的至少一部分沿与晶粒生长相交的方向延伸并且多个薄膜晶体管中的至少一个薄膜晶体管具有栅极，其具有与其它薄膜晶体管不同的图案。

9. 发明申请

US20080166892A1 MASK FOR FORMING POLYSILICON AND A METHOD FOR FABRICATING THIN FILM TRANSISTOR USING THE SAME 有权
标题翻译：用于形成多晶硅的掩模和使用其制造薄膜晶体管的方法
公开(公告)号：US20080166892A1
公开(公告)日：2008-07-10
申请号：US12016430
申请日：2008-01-18
申请人： Myung-Koo Kang , Sook-Young Kang , Hyun-Jae Kim
发明人： Myung-Koo Kang , Sook-Young Kang , Hyun-Jae Kim
IPC分类号： H01L21/428
CPC分类号： H01L21/0268 , H01L21/2026 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A mask for crystallization of amorphous silicon to polysilicon is provided. The mask includes a plurality of slit patterns for defining regions to be illuminated. The plurality of slit patterns are formed along a longitudinal first direction and the mask moves along a longitudinal second direction. The first longitudinal direction is substantially perpendicular to the second longitudinal direction. Each of the split patterns is deviated apart by substantially a same distance from another. Thus, the polysilicon using the mask
摘要翻译：提供了一种用于将非晶硅结晶成多晶硅的掩模。掩模包括用于限定要被照射的区域的多个狭缝图案。沿着纵向第一方向形成多个狭缝图案，并且掩模沿纵向第二方向移动。第一纵向方向基本上垂直于第二纵向方向。每个分割图案与另一个分开的图案偏离大致相同的距离。因此，使用掩模的多晶硅

10. 发明授权

US07335541B2 Method for fabricating thin film transistor using the mask for forming polysilicon including slit patterns deviated from each other 有权
标题翻译：使用该掩模制造薄膜晶体管的方法，用于形成包括彼此偏离的狭缝图案的多晶硅
公开(公告)号：US07335541B2
公开(公告)日：2008-02-26
申请号：US10854664
申请日：2004-05-26
申请人： Myung-Koo Kang , Sook-Young Kang , Hyun-Jae Kim
发明人： Myung-Koo Kang , Sook-Young Kang , Hyun-Jae Kim
IPC分类号： H01L21/00
CPC分类号： H01L21/0268 , H01L21/2026 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A mask for crystallization of amorphous silicon to polysilicon is provided. The mask includes a plurality of slit patterns for defining regions to be illuminated. The plurality of slit patterns are formed along a longitudinal first direction and the mask moves along a longitudinal second direction. The first longitudinal direction is substantially perpendicular to the second longitudinal direction. Each of the split patterns is deviated apart by substantially a same distance from another. Thus, the polysilicon using the mask are grown to be isotropic with respect to the horizontal and vertical directions.
摘要翻译：提供了一种用于将非晶硅结晶成多晶硅的掩模。掩模包括用于限定要被照明的区域的多个狭缝图案。沿着纵向第一方向形成多个狭缝图案，并且掩模沿纵向第二方向移动。第一纵向方向基本上垂直于第二纵向方向。每个分割图案与另一个分开的图案偏离大致相同的距离。因此，使用掩模的多晶硅生长成相对于水平和垂直方向各向同性。

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