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1. 发明申请

US20120319271A1 BUMP STRUCTURE AND PROCESS OF MANUFACTURING THE SAME 有权
标题翻译： BUMP结构及其制造方法
公开(公告)号：US20120319271A1
公开(公告)日：2012-12-20
申请号：US13163967
申请日：2011-06-20
申请人： Cheng-Hung Shih , Shyh-Jen Guo , Wen-Tung Chen
发明人： Cheng-Hung Shih , Shyh-Jen Guo , Wen-Tung Chen
IPC分类号： H01L23/52 , H01L21/44
CPC分类号： H01L24/03 , H01L24/05 , H01L2224/02126 , H01L2224/0401 , H01L2224/05012 , H01L2224/05017 , H01L2224/05018 , H01L2224/05022 , H01L2224/051 , H01L2224/05166 , H01L2224/05552 , H01L2224/05557 , H01L2224/05558 , H01L2224/05572 , H01L2224/05582 , H01L2224/05644 , H01L2224/81805 , H01L2924/01322 , H01L2924/15788 , H01L2924/01074 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A bump structure comprises a first polymer block, a second polymer block, a first groove, an under bump metallurgy layer and a connection metal layer, wherein the first polymer block and the second polymer block are individual blocks. The first polymer block and the second polymer block are located at two sides of the first groove, the first polymer block comprises a first connection slot, and the second polymer block comprises a second connection slot communicated with the first connection slot and the first groove. The under bump metallurgy layer covers the first polymer block and the second polymer block to form a second groove, a third connection slot and a fourth connection slot communicated with each other. The connection metal layer covers the under bump metallurgy layer to form a third groove, a fifth connection slot and a sixth connection slot communicated with each other.
摘要翻译：凸块结构包括第一聚合物嵌段，第二聚合物嵌段，第一凹槽，凸块下金属层和连接金属层，其中第一聚合物嵌段和第二聚合物嵌段是各自的嵌段。第一聚合物嵌段和第二聚合物嵌段位于第一凹槽的两侧，第一聚合物嵌段包括第一连接槽，第二聚合物嵌段包括与第一连接槽和第一凹槽连通的第二连接槽。凸块下金属层覆盖第一聚合物嵌段和第二聚合物嵌段以形成彼此连通的第二凹槽，第三连接槽和第四连接槽。连接金属层覆盖凸块下金属层以形成第三凹槽，第五连接槽和第六连接槽彼此连通。

2. 发明申请

US20120318570A1 BUMP STRUCTURE AND PROCESS OF MANUFACTURING THE SAME 有权
标题翻译： BUMP结构及其制造方法
公开(公告)号：US20120318570A1
公开(公告)日：2012-12-20
申请号：US13163870
申请日：2011-06-20
申请人： Cheng-Hung Shih , Shyh-Jen Guo , Wen-Tung Chen
发明人： Cheng-Hung Shih , Shyh-Jen Guo , Wen-Tung Chen
IPC分类号： H05K1/00 , B23K1/20
CPC分类号： H05K3/4007 , H05K3/244 , H05K2201/09745 , H05K2201/099
摘要： A bump structure comprises a first polymer block, a second polymer block, a first groove, an under bump metallurgy layer and a connection metal layer, wherein the first polymer block and the second polymer block are individual blocks. The first polymer block comprises a first connection slot, and the second polymer block comprises a second connection slot communicated with the first groove and the first connection slot. The under bump metallurgy layer covers the first polymer block and the second polymer block to form a second groove. The connection metal layer covers the under bump metallurgy layer to form a third groove, wherein the under bump metallurgy layer covers a first coverage area of the first polymer block and a second coverage area of the second polymer block and reveals a first exposure area of the first polymer block and a second exposure area of the second polymer block.
摘要翻译：凸块结构包括第一聚合物嵌段，第二聚合物嵌段，第一凹槽，凸块下金属层和连接金属层，其中第一聚合物嵌段和第二聚合物嵌段是各自的嵌段。第一聚合物块包括第一连接槽，第二聚合物块包括与第一槽和第一连接槽连通的第二连接槽。凸块下金属层覆盖第一聚合物嵌段和第二聚合物嵌段以形成第二凹槽。所述连接金属层覆盖所述凸块下金属层以形成第三凹槽，其中所述凸块下金属层覆盖所述第一聚合物嵌段的第一覆盖区域和所述第二聚合物嵌段的第二覆盖区域，并且揭示所述第二聚合物嵌段的第一暴露区域第一聚合物嵌段和第二聚合物嵌段的第二曝光区域。

3. 发明授权

US5935876A Via structure using a composite dielectric layer 失效
标题翻译：通过使用复合介电层的结构
公开(公告)号：US5935876A
公开(公告)日：1999-08-10
申请号：US872655
申请日：1997-06-10
申请人： Chiarn-Lung Lee , Wei-Kun Yeh , Shyh-Jen Guo
发明人： Chiarn-Lung Lee , Wei-Kun Yeh , Shyh-Jen Guo
IPC分类号： H01L21/316 , H01L21/768 , H01L21/00
CPC分类号： H01L21/02164 , H01L21/02126 , H01L21/022 , H01L21/02211 , H01L21/02274 , H01L21/02282 , H01L21/31612 , H01L21/76804 , H01L21/316
摘要： A method for forming a semiconductor device having a via by using a composite dielectric layer is disclosed. The method includes forming a first dielectric layer over a first conductive layer disposed on a substrate, where the first dielectric layer has a first etch rate. A second dielectric layer is then formed on the first dielectric layer, where the second dielectric layer has a second etch rate higher than the first etch rate. The second dielectric layer is isotropically removed by masking and etching to form a rounded contoured recess in the second dielectric layer using the first dielectric layer as an etch stop layer. The first dielectric layer is anisotropically removed by masking and etching to form the via in the first dielectric layer, where the bottom of the rounded contoured recess is aligned to the via.
摘要翻译：公开了一种通过使用复合电介质层形成具有通孔的半导体器件的方法。该方法包括在设置在基底上的第一导电层上形成第一介电层，其中第一介电层具有第一蚀刻速率。然后在第一介电层上形成第二电介质层，其中第二介电层具有高于第一蚀刻速率的第二蚀刻速率。通过掩模和蚀刻各向同性地去除第二介电层，以使用第一介电层作为蚀刻停止层在第二介电层中形成圆形轮廓凹槽。通过掩模和蚀刻各向异性地去除第一介电层，以在第一电介质层中形成通孔，其中圆形轮廓凹槽的底部与通孔对准。

4. 发明授权

US08437142B2 Bump structure and process of manufacturing the same 有权
标题翻译：凸块结构和制造过程相同
公开(公告)号：US08437142B2
公开(公告)日：2013-05-07
申请号：US13163870
申请日：2011-06-20
申请人： Cheng-Hung Shih , Shyh-Jen Guo , Wen-Tung Chen
发明人： Cheng-Hung Shih , Shyh-Jen Guo , Wen-Tung Chen
IPC分类号： H05K7/00
CPC分类号： H05K3/4007 , H05K3/244 , H05K2201/09745 , H05K2201/099
摘要： A bump structure comprises a first polymer block, a second polymer block, a first groove, an under bump metallurgy layer and a connection metal layer, wherein the first polymer block and the second polymer block are individual blocks. The first polymer block comprises a first connection slot, and the second polymer block comprises a second connection slot communicated with the first groove and the first connection slot. The under bump metallurgy layer covers the first polymer block and the second polymer block to form a second groove. The connection metal layer covers the under bump metallurgy layer to form a third groove, wherein the under bump metallurgy layer covers a first coverage area of the first polymer block and a second coverage area of the second polymer block and reveals a first exposure area of the first polymer block and a second exposure area of the second polymer block.
摘要翻译：凸块结构包括第一聚合物嵌段，第二聚合物嵌段，第一凹槽，凸块下金属层和连接金属层，其中第一聚合物嵌段和第二聚合物嵌段是各自的嵌段。第一聚合物块包括第一连接槽，第二聚合物块包括与第一槽和第一连接槽连通的第二连接槽。凸块下金属层覆盖第一聚合物嵌段和第二聚合物嵌段以形成第二凹槽。所述连接金属层覆盖所述凸块下金属层以形成第三凹槽，其中所述凸块下金属层覆盖所述第一聚合物嵌段的第一覆盖区域和所述第二聚合物嵌段的第二覆盖区域，并且揭示所述第二聚合物嵌段的第一暴露区域第一聚合物嵌段和第二聚合物嵌段的第二曝光区域。

5. 发明授权

US08330280B1 Bump structure and process of manufacturing the same 有权
标题翻译：凸块结构和制造过程相同
公开(公告)号：US08330280B1
公开(公告)日：2012-12-11
申请号：US13163967
申请日：2011-06-20
申请人： Cheng-Hung Shih , Shyh-Jen Guo , Wen-Tung Chen
发明人： Cheng-Hung Shih , Shyh-Jen Guo , Wen-Tung Chen
IPC分类号： H01L29/40
CPC分类号： H01L24/03 , H01L24/05 , H01L2224/02126 , H01L2224/0401 , H01L2224/05012 , H01L2224/05017 , H01L2224/05018 , H01L2224/05022 , H01L2224/051 , H01L2224/05166 , H01L2224/05552 , H01L2224/05557 , H01L2224/05558 , H01L2224/05572 , H01L2224/05582 , H01L2224/05644 , H01L2224/81805 , H01L2924/01322 , H01L2924/15788 , H01L2924/01074 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A bump structure comprises a first polymer block, a second polymer block, a first groove, an under bump metallurgy layer and a connection metal layer, wherein the first polymer block and the second polymer block are individual blocks. The first polymer block and the second polymer block are located at two sides of the first groove, the first polymer block comprises a first connection slot, and the second polymer block comprises a second connection slot communicated with the first connection slot and the first groove. The under bump metallurgy layer covers the first polymer block and the second polymer block to form a second groove, a third connection slot and a fourth connection slot communicated with each other. The connection metal layer covers the under bump metallurgy layer to form a third groove, a fifth connection slot and a sixth connection slot communicated with each other.
摘要翻译：凸块结构包括第一聚合物嵌段，第二聚合物嵌段，第一凹槽，凸块下金属层和连接金属层，其中第一聚合物嵌段和第二聚合物嵌段是各自的嵌段。第一聚合物嵌段和第二聚合物嵌段位于第一凹槽的两侧，第一聚合物嵌段包括第一连接槽，第二聚合物嵌段包括与第一连接槽和第一凹槽连通的第二连接槽。凸块下金属层覆盖第一聚合物嵌段和第二聚合物嵌段以形成彼此连通的第二凹槽，第三连接槽和第四连接槽。连接金属层覆盖凸块下金属层以形成第三凹槽，第五连接槽和第六连接槽彼此连通。

6. 发明申请

US20060216614A1 Method of mask making and structure thereof for improving mask ESD immunity 审中-公开
标题翻译：掩模制造方法及其结构，用于提高掩模的ESD抗扰度
公开(公告)号：US20060216614A1
公开(公告)日：2006-09-28
申请号：US11089061
申请日：2005-03-24
申请人： Shyh-Jen Guo , Yu Lo
发明人： Shyh-Jen Guo , Yu Lo
IPC分类号： G03C5/00 , G03F1/00
CPC分类号： G03F1/40 , G03F1/50 , G03F1/62
摘要： A method for fabricating a mask (or reticle) to improve the mask ESD immunity is provided. A substrate having an upper surface is substantially transparent to a selected radiation. A light sensitive layer is formed over the substrate. The light sensitive layer is patterned and etched to form a pattern of openings in the light sensitive layer. The substrate is etched according to the pattern of openings in the light sensitive layer. The light sensitive layer is stripped. An opaque layer is then deposited on the upper surface and in the openings of the patterned substrate. The substrate is planarized by removing excess opaque layer from over the upper surface of the substrate. A pellicle is then mounted outstretched on the upper surface of the substrate.
摘要翻译：提供了制造掩模（或掩模版）以提高掩模ESD抗扰度的方法。具有上表面的基底对所选择的辐射基本上是透明的。在衬底上形成光敏层。对感光层进行图案化和蚀刻，以在光敏层中形成开口图案。根据光敏层中的开口图案蚀刻衬底。剥去光敏层。然后在图案化衬底的上表面和开口中沉积不透明层。通过从衬底的上表面上去除多余的不透明层来平坦化衬底。然后将防护薄膜组件伸出到衬底的上表面上。

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