专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08209464B2 Management method, management apparatus, and controller for memory data access 有权
标题翻译：管理方法，管理装置和存储器数据访问控制器
公开(公告)号：US08209464B2
公开(公告)日：2012-06-26
申请号：US12119696
申请日：2008-05-13
申请人： Shuang-Yi Tan , Cheng-Hui Yang , Chia-Hao Chang
发明人： Shuang-Yi Tan , Cheng-Hui Yang , Chia-Hao Chang
IPC分类号： G06F13/00
CPC分类号： G06F12/0864 , G06F2212/1036 , G06F2212/2022
摘要： A management method, a management apparatus, and a controller for memory data access are provided. The management apparatus is disposed between a host and a device for managing the data transmitted between the host and the device, wherein the management apparatus includes a control unit and a storage unit. When the control unit receives a data writing command from the host, it searches for a set mapped to the data in the storage unit and updates the data in the set. Then, the control unit collects the other parts of the data in the storage unit and the device, integrates all parts of the data, and writes the integrated data into the device. Accordingly, the efficiency in data transmission can be improved, and the number of data writing operations can be reduced so that the lifespan of the device can be prolonged.
摘要翻译：提供了一种用于存储器数据存取的管理方法，管理装置和控制器。管理装置设置在主机和用于管理在主机和设备之间传输的数据的设备之间，其中管理设备包括控制单元和存储单元。当控制单元从主机接收到数据写入命令时，它搜索映射到存储单元中的数据的集合，并更新集合中的数据。然后，控制单元收集存储单元和设备中数据的其他部分，对数据的所有部分进行整合，并将集成数据写入设备。因此，可以提高数据传输的效率，并且可以减少数据写入操作的数量，从而可以延长设备的使用寿命。

2. 发明申请

US20130097363A1 MEMORY CONTROL DEVICE 有权
标题翻译：存储控制装置
公开(公告)号：US20130097363A1
公开(公告)日：2013-04-18
申请号：US13453169
申请日：2012-04-23
申请人： SHUANG-YI TAN , Yueh-Yao Nain , Der-Ing Hsu
发明人： SHUANG-YI TAN , Yueh-Yao Nain , Der-Ing Hsu
IPC分类号： G06F12/00
CPC分类号： G06F12/0238 , G06F13/1684 , G06F13/4022
摘要： A memory control device for controlling a primary controller and a secondary controller to access a flash memory is provided. A bus switch is coupled to the primary controller, the secondary controller and the flash memory via a first, second and third serial peripheral interface (SPI) buses, respectively. A selecting unit selectively couples the third SPI bus to one of the first and second buses. When the bus switch receives an access request from the primary controller via the first SPI bus, the selecting unit couples the third SPI bus to the first SPI bus, so as to transmit a chip select signal, a clock signal and a master output slave input (MOSI) signal from the primary controller to the flash memory for accessing the flash memory. The first access request is provided by the first chip select signal.
摘要翻译：提供了一种用于控制主控制器和辅助控制器以访问闪速存储器的存储器控制装置。总线开关分别通过第一，第二和第三串行外设接口（SPI）总线耦合到主控制器，次控制器和闪存。选择单元将第三SPI总线选择性地耦合到第一和第二总线之一。当总线交换机通过第一SPI总线接收到来自主控制器的访问请求时，选择单元将第三SPI总线耦合到第一SPI总线，以便传输芯片选择信号，时钟信号和主输出从机输入（MOSI）信号从主控制器到闪存，用于访问闪存。第一访问请求由第一片选信号提供。

3. 发明授权

US08788744B2 Memory control device 有权
标题翻译：内存控制装置
公开(公告)号：US08788744B2
公开(公告)日：2014-07-22
申请号：US13453169
申请日：2012-04-23
申请人： Shuang-Yi Tan , Yueh-Yao Nain , Der-Ing Hsu
发明人： Shuang-Yi Tan , Yueh-Yao Nain , Der-Ing Hsu
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0238 , G06F13/1684 , G06F13/4022
摘要： A memory control device for controlling a primary controller and a secondary controller to access a flash memory is provided. A bus switch is coupled to the primary controller, the secondary controller and the flash memory via a first, second and third serial peripheral interface (SPI) buses, respectively. A selecting unit selectively couples the third SPI bus to one of the first and second buses. When the bus switch receives an access request from the primary controller via the first SPI bus, the selecting unit couples the third SPI bus to the first SPI bus, so as to transmit a chip select signal, a clock signal and a master output slave input (MOSI) signal from the primary controller to the flash memory for accessing the flash memory. The first access request is provided by the first chip select signal.
摘要翻译：提供了一种用于控制主控制器和辅助控制器以访问闪速存储器的存储器控制装置。总线开关分别通过第一，第二和第三串行外设接口（SPI）总线耦合到主控制器，次控制器和闪存。选择单元将第三SPI总线选择性地耦合到第一和第二总线之一。当总线交换机通过第一SPI总线接收到来自主控制器的访问请求时，选择单元将第三SPI总线耦合到第一SPI总线，以便传输芯片选择信号，时钟信号和主输出从机输入（MOSI）信号从主控制器到闪存，用于访问闪存。第一访问请求由第一片选信号提供。

4. 发明申请

US20090240868A1 MANAGEMENT METHOD, MANAGEMENT APPARATUS, AND CONTROLLER FOR MEMORY DATA ACCESS 有权
标题翻译：管理方法，管理装置和存储器数据访问控制器
公开(公告)号：US20090240868A1
公开(公告)日：2009-09-24
申请号：US12119696
申请日：2008-05-13
申请人： Shuang-Yi Tan , Cheng-Hui Yang , Chia-Hao Chang
发明人： Shuang-Yi Tan , Cheng-Hui Yang , Chia-Hao Chang
IPC分类号： G06F12/02
CPC分类号： G06F12/0864 , G06F2212/1036 , G06F2212/2022
摘要： A management method, a management apparatus, and a controller for memory data access are provided. The management apparatus is disposed between a host and a device for managing the data transmitted between the host and the device, wherein the management apparatus includes a control unit and a storage unit. When the control unit receives a data writing command from the host, it searches for a set mapped to the data in the storage unit and updates the data in the set. Then, the control unit collects the other parts of the data in the storage unit and the device, integrates all parts of the data, and writes the integrated data into the device. Accordingly, the efficiency in data transmission can be improved, and the number of data writing operations can be reduced so that the lifespan of the device can be prolonged.
摘要翻译：提供了一种用于存储器数据存取的管理方法，管理装置和控制器。管理装置设置在主机和用于管理在主机和设备之间传输的数据的设备之间，其中管理设备包括控制单元和存储单元。当控制单元从主机接收到数据写入命令时，它搜索映射到存储单元中的数据的集合，并更新集合中的数据。然后，控制单元收集存储单元和设备中数据的其他部分，对数据的所有部分进行整合，并将集成数据写入设备。因此，可以提高数据传输的效率，并且可以减少数据写入操作的数量，从而可以延长设备的使用寿命。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式