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1. 发明授权

US07998801B2 Manufacturing method of thin film transistor having altered semiconductor layer 有权
标题翻译：具有改变的半导体层的薄膜晶体管的制造方法
公开(公告)号：US07998801B2
公开(公告)日：2011-08-16
申请号：US12424563
申请日：2009-04-16
申请人： Shinya Sasagawa , Motomu Kurata , Sho Osada
发明人： Shinya Sasagawa , Motomu Kurata , Sho Osada
IPC分类号： H01L21/00 , H01L21/302
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/40 , H01L29/41733 , H01L29/66765 , H01L29/78669 , H01L29/78678 , H01L29/78696
摘要： Decrease of the off-state current, increase of the on-state current, and reduction of variations of electrical characteristics. A method for manufacturing a channel-etched inversed staggered thin film transistor includes the following steps: removing, by first dry-etching, a part of a semiconductor layer including an impurity element which imparts one conductivity type, which is exposed from the source and drain electrodes, and partially a part of an amorphous semiconductor layer just below and in contact with the part of the semiconductor layer; removing, by second dry-etching, partially the part of the amorphous semiconductor layer which is exposed by the first dry-etching; and performing plasma treatment on the surface of the part of the amorphous semiconductor layer which is exposed by the second dry-etching so that an altered layer is formed.
摘要翻译：关闭状态电流的减小，导通电流的增加以及电特性变化的减小。用于制造通道蚀刻反向交错薄膜晶体管的方法包括以下步骤：通过首先干蚀刻除去包括从源极和漏极暴露的赋予一种导电类型的杂质元素的半导体层的一部分电极，以及半导体层的正下方并与半导体层的一部分接触的部分非晶半导体层的一部分; 通过第二干法蚀刻部分地除去通过第一干法蚀刻暴露的部分非晶半导体层; 并且通过第二干蚀刻曝光的非晶半导体层的部分的表面进行等离子体处理，从而形成改变的层。

2. 发明申请

US20100099226A1 MANUFACTURING METHOD OF THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管的制造方法
公开(公告)号：US20100099226A1
公开(公告)日：2010-04-22
申请号：US12424563
申请日：2009-04-16
申请人： Shinya SASAGAWA , Motomu KURATA , Sho OSADA
发明人： Shinya SASAGAWA , Motomu KURATA , Sho OSADA
IPC分类号： H01L21/336
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/40 , H01L29/41733 , H01L29/66765 , H01L29/78669 , H01L29/78678 , H01L29/78696
摘要： Decrease of the off-state current, increase of the on-state current, and reduction of variations of electrical characteristics. A method for manufacturing a channel-etched inversed staggered thin film transistor includes the following steps: removing, by first dry-etching, a part of a semiconductor layer including an impurity element which imparts one conductivity type, which is exposed from the source and drain electrodes, and partially a part of an amorphous semiconductor layer just below and in contact with the part of the semiconductor layer; removing, by second dry-etching, partially the part of the amorphous semiconductor layer which is exposed by the first dry-etching; and performing plasma treatment on the surface of the part of the amorphous semiconductor layer which is exposed by the second dry-etching so that an altered layer is formed.
摘要翻译：关闭状态电流的减小，导通电流的增加以及电特性变化的减小。用于制造通道蚀刻反向交错薄膜晶体管的方法包括以下步骤：通过首先干蚀刻除去包括从源极和漏极暴露的赋予一种导电类型的杂质元素的半导体层的一部分电极，以及半导体层的正下方并与半导体层的一部分接触的部分非晶半导体层的一部分; 通过第二干法蚀刻部分地除去通过第一干法蚀刻暴露的部分非晶半导体层; 并且通过第二干蚀刻曝光的非晶半导体层的部分的表面进行等离子体处理，从而形成改变的层。

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