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1. 发明专利

JP2012189640A Wall-mounting tool and wall-mounting display tool 有权
标题翻译：墙壁安装工具和墙壁安装显示工具
公开(公告)号：JP2012189640A
公开(公告)日：2012-10-04
申请号：JP2011050813
申请日：2011-03-08
申请人： Shinichi Takayama , 伸一高山
发明人： TAKAYAMA SHINICHI
IPC分类号： G09F7/18 , A47G1/06
摘要： PROBLEM TO BE SOLVED: To provide a wall-mounting tool and a wall-mounting display tool such that an exhibit can be displayed beautifully and easily on a wall without forming any sticking hole of a thumbtack in the exhibit and with heads of thumbtacks hidden to be invisible, and hookers such as thumbtacks and hooks can be selectively used according to user's preference.SOLUTION: There is provided a hooker 1 for mounting an exhibit G on a wall W, the hooker including an attachment base 2 attached to the reverse side of the exhibit G, a first raised plate material 3 provided to the attachment base 2 to be freely folded, and a second raised plate material 4 provided to the first raised plate material 3 to be freely folded. The first raised plate material 3 has a first hook hole 7 formed to be hooked by a hooker F, and the second raised plate material 4 has a second hook hole 9 formed to communicate with the first hook hole 7 when folded over the first raised plate material 3. A head storage part 8 for accommodating the head of a thumbtack P is formed in the first hook hole 7 or second hook hole 9.
摘要翻译：要解决的问题：提供一种墙壁安装工具和壁挂式显示工具，使得展览可以在墙壁上精美而容易地显示，而不会在展览中形成图钉的任何粘贴孔，并且具有头部隐藏成隐形的图钉，可以根据用户的喜好有选择地使用诸如图钉和挂钩等hook子。解决方案：提供一种用于将展品G安装在墙壁W上的吊钩1，该吊钩包括附接到展示G的反面的安装底座2，设置在安装基座2上的第一凸起板材3 以及设置在第一凸起板材3上以便自由折叠的第二凸起板材料4。第一凸起板材3具有形成为被钩状物F钩住的第一钩孔7，并且第二凸起板材料4具有第二钩孔9，第二钩孔9形成为当折叠在第一凸起板上时与第一钩孔7连通在第一钩孔7或第二钩孔9中形成用于容纳图钉P的头部的头部存放部分8.（C）2013，JPO＆INPIT

2. 发明专利

JP2012247710A Wall hook and wall exhibitor 审中-公开
标题翻译：墙壁和墙壁展品
公开(公告)号：JP2012247710A
公开(公告)日：2012-12-13
申请号：JP2011121025
申请日：2011-05-30
申请人： Shinichi Takayama , 伸一高山
发明人： TAKAYAMA SHINICHI
IPC分类号： G09F1/10 , A47G29/00
摘要： PROBLEM TO BE SOLVED: To provide a wall hook and a wall exhibitor which can beautifully and easily display an exhibit by not holing the exhibit with a thumbtack and concealing a head of the thumbtack to make it invisible and allow a user to display the exhibit by selectively using hooking tools such as a thumbtack, a hook, etc. as he or she like.SOLUTION: A wall hook 1 by which an exhibit G is hung on a wall W to be displayed includes: an attachment base 2 to be attached to a rear surface of the exhibit G; a standing plate material 3 having a base end part 31 freely turnably supported by the attachment base 2; and a hook hole 5 formed through the standing plate material 3. A head housing groove 6 capable of housing a head of a thumbtack P is formed in an outer peripheral edge part on the exhibit G side of the hook hole 5.
摘要翻译：要解决的问题：提供一种挂钩和墙壁参展商，可以通过不用图钉来挖掘展览，并且隐藏图钉的头部以使其不可见并允许用户显示，从而能够美观地和容易地展示展览通过选择性地使用诸如图钉，钩子等的钩形工具来进行展示。解决方案：展示G挂在待显示的墙W上的挂钩1包括：附接到展览G后表面的安装座2; 具有由安装基座2自由地支撑的基端部31的立板材料3; 以及通过立板材料3形成的钩孔5.在钩孔5的展示G侧的外周边缘部分中形成有能够容纳图钉头部的头部容纳槽6.＆lt; COPYRIGHT （C）2013，JPO＆INPIT

3. 发明授权

US08861711B2 Echo cancellation apparatus, conferencing system using the same, and echo cancellation method 有权
标题翻译：回声消除装置，使用其的会议系统和回声消除方法
公开(公告)号：US08861711B2
公开(公告)日：2014-10-14
申请号：US13544514
申请日：2012-07-09
申请人： Shinichi Takayama , Tsuyoki Nishikawa
发明人： Shinichi Takayama , Tsuyoki Nishikawa
IPC分类号： H04M9/08 , H04B15/00 , H04B3/23
CPC分类号： H04B3/23
摘要： An echo cancellation apparatus is connectable to a speaker configured to output speaker signals and a microphone configured to receive a sound from the speaker and including a plurality of microphone elements. The echo cancellation apparatus includes: a generating unit configured to generate a plurality of sensitivity signals having different sensitivity patterns which represent directionality of the microphone, based on a plurality of microphone signals obtained from the respective microphone signals; a delay estimating unit configured to determine a shortest delay time as an estimated delay time, the shortest delay time being a shortest one of delay times between the speaker signals and the microphone signals, the delay times being obtained from the respective sensitivity signals; and an echo suppressing unit configured to suppress echoes of the plurality of microphone signals using the estimated delay time.
摘要翻译：回声消除装置可连接到被配置为输出扬声器信号的扬声器和被配置为从扬声器接收声音并且包括多个麦克风元件的麦克风。回波消除装置包括：生成单元，被配置为基于从各个麦克风信号获得的多个麦克风信号，生成具有表示麦克风的方向性的不同灵敏度图案的多个灵敏度信号; 延迟估计单元，被配置为将最短延迟时间确定为估计延迟时间，所述最短延迟时间是所述扬声器信号和所述麦克风信号之间的延迟时间中最短的延迟时间，所述延迟时间是从各个灵敏度信号获得的; 以及回波抑制单元，被配置为使用所估计的延迟时间来抑制所述多个麦克风信号的回波。

4. 发明授权

US08704885B2 Electronic endoscope signal-processing device and electronic endoscope system 有权
标题翻译：电子内窥镜信号处理装置及电子内窥镜系统
公开(公告)号：US08704885B2
公开(公告)日：2014-04-22
申请号：US13545108
申请日：2012-07-10
申请人： Shinichi Takayama
发明人： Shinichi Takayama
IPC分类号： A61B1/04
CPC分类号： H04N9/69 , A61B1/00009 , A61B1/042 , A61B1/05 , H04N1/6027 , H04N2005/2255
摘要： An electronic endoscope signal-processing device is provided that includes a gradation compensation processor. The gradation compensation processor compensates for R, G and B gradations by controlling R, G and B tone curves defining relationship between input values and output values of each of the R, G and B signals. The R tone curve is shaped so as to squash the output values of the R signal when the R signal input values are in a relatively low range and to expand the output values when the input values are in a relatively high range. The G and B tone curves are shaped so squash the output value of the respective signals when the input signals are in high or low ranges, and the G tone curve and the B tone curve are identical.
摘要翻译：提供一种包括灰度补偿处理器的电子内窥镜信号处理装置。灰度补偿处理器通过控制定义R，G和B信号每个输入值和输出值之间关系的R，G和B色调曲线来补偿R，G和B等级。当R信号输入值处于相对低的范围内时，R色调曲线成形为压缩R信号的输出值，并且当输入值处于相对高的范围时扩大输出值。当输入信号处于高或低范围，并且G色调曲线和B色调曲线相同时，G和B色调曲线成形为压缩各个信号的输出值。

5. 发明授权

US08593895B2 Semiconductor device and control method thereof 失效
标题翻译：半导体装置及其控制方法
公开(公告)号：US08593895B2
公开(公告)日：2013-11-26
申请号：US13404940
申请日：2012-02-24
申请人： Shinichi Takayama , Kazuhiko Kajigaya
发明人： Shinichi Takayama , Kazuhiko Kajigaya
IPC分类号： G11C7/12
CPC分类号： G11C7/12 , G11C7/18 , G11C11/401 , G11C11/4094 , G11C29/06 , G11C29/12005 , G11C2029/1204
摘要： Disclosed herein is a semiconductor device comprising an array having a hierarchical bit line structure, global bit lines adjacent to each other, local bit lines corresponding to the global bit lines, hierarchical switches, precharge circuits precharging the global bit lines, precharge circuits precharging the local bit lines, and a control circuit. When performing a test of the array, precharge voltages for the global bit lines are set to potentials different from each other, and the control circuit controls the potentials to be applied to the local bit lines through the global bit lines and the hierarchical switches.
摘要翻译：本文公开了一种半导体器件，其包括具有分级位线结构的阵列，彼此相邻的全局位线，对应于全局位线的局部位线，分层开关，预充电全局位线的预充电电路，预充电电路对本地位线和控制电路。当对阵列进行测试时，全局位线的预充电电压被设置为彼此不同的电位，并且控制电路通过全局位线和分层开关控制施加到局部位线的电位。

6. 发明授权

US08472273B2 Semiconductor device 失效
公开(公告)号：US08472273B2
公开(公告)日：2013-06-25
申请号：US13117374
申请日：2011-05-27
申请人： Shinichi Takayama , Akira Kotabe , Kiyoo Itoh , Tomonori Sekiguchi
发明人： Shinichi Takayama , Akira Kotabe , Kiyoo Itoh , Tomonori Sekiguchi
IPC分类号： G11C7/02
CPC分类号： G11C7/08 , G11C11/4091 , G11C11/4094
摘要： A semiconductor device includes a sense amplifier circuit. The sense amplifier circuit includes a cross-coupled first transistor and second transistor that perform amplification. The sources of the cross-coupled transistors are respectively connected in series with a third transistor and a fourth transistor, and electrical current supply capability of the third and fourth transistors is controlled by a control voltage given to control electrodes of the third and fourth transistors. In a data retaining period, a minimum sub-threshold current necessary for retaining the data is flowed to the third and fourth transistors according to the control voltage, and bit line potential is maintained.

7. 发明申请

US20120274753A1 ELECTRONIC ENDOSCOPE SIGNAL-PROCESSING DEVICE AND ELECTRONIC ENDOSCOPE SYSTEM 有权
标题翻译：电子内窥镜信号处理装置和电子内窥镜系统
公开(公告)号：US20120274753A1
公开(公告)日：2012-11-01
申请号：US13545108
申请日：2012-07-10
申请人： Shinichi Takayama
发明人： Shinichi Takayama
IPC分类号： H04N7/18
CPC分类号： H04N9/69 , A61B1/00009 , A61B1/042 , A61B1/05 , H04N1/6027 , H04N2005/2255
摘要： An electronic endoscope signal-processing device is provided that includes a gradation compensation processor. The gradation compensation processor compensates for R, G and B gradations by controlling R, G and B tone curves defining relationship between input values and output values of each of the R, G and B signals. The R tone curve is shaped so as to squash the output values of the R signal when the R signal input values are in a relatively low range and to expand the output values when the input values are in a relatively high range. The G and B tone curves are shaped so squash the output value of the respective signals when the input signals are in high or low ranges, and the G tone curve and the B tone curve are identical.
摘要翻译：提供一种包括灰度补偿处理器的电子内窥镜信号处理装置。灰度补偿处理器通过控制定义R，G和B信号每个输入值和输出值之间关系的R，G和B色调曲线来补偿R，G和B等级。当R信号输入值处于相对低的范围内时，R色调曲线成形为压缩R信号的输出值，并且当输入值处于相对高的范围时扩大输出值。当输入信号处于高或低范围，并且G色调曲线和B色调曲线相同时，G和B色调曲线成形为压缩各个信号的输出值。

8. 发明申请

US20120267792A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20120267792A1
公开(公告)日：2012-10-25
申请号：US13455171
申请日：2012-04-25
申请人： Shinichi TAKAYAMA , Kazuo ONO , Tomonori SEKIGUCHI , Akira KOTABE , Yoshimitsu YANAGAWA
发明人： Shinichi TAKAYAMA , Kazuo ONO , Tomonori SEKIGUCHI , Akira KOTABE , Yoshimitsu YANAGAWA
IPC分类号： H01L23/522
CPC分类号： H01L23/5286 , H01L23/481 , H01L25/0657 , H01L2224/16145 , H01L2225/06544
摘要： A stacked device includes a plurality of semiconductor chips connected to each other by through electrodes. The same number of through electrodes are included in each of paths extending from a first power source terminal through each of circuit elements formed for the semiconductor chips to a second power source terminal.
摘要翻译：堆叠式器件包括通过电极彼此连接的多个半导体芯片。在从第一电源端子通过形成为半导体芯片的电路元件的每一个延伸到第二电源端子的每个路径中包括相同数量的贯通电极。

9. 发明授权

US08274558B2 Electronic endoscope signal-processing device and electronic endoscope system 有权
标题翻译：电子内窥镜信号处理装置及电子内窥镜系统
公开(公告)号：US08274558B2
公开(公告)日：2012-09-25
申请号：US12238855
申请日：2008-09-26
申请人： Shinichi Takayama
发明人： Shinichi Takayama
IPC分类号： A62B1/04
CPC分类号： G02B23/2476 , A61B1/05
摘要： An electronic endoscope system is provided that includes an RGB transformer, an R-signal amplifier, and a GB-signal amplifier. The RGB transformer transforms image signals to RGB signals. The R-signal amplifier changes the amplitude of the R signals of the RGB signals to a predetermined gain value. The GB-signal amplifier nonlinearly changes the amplitude of the G signals and B signals of the RGB signals.
摘要翻译：提供一种包括RGB变压器，R信号放大器和GB信号放大器的电子内窥镜系统。 RGB变换器将图像信号转换为RGB信号。 R信号放大器将RGB信号的R信号的幅度改变为预定的增益值。 GB信号放大器非线性地改变RGB信号的G信号和B信号的幅度。

10. 发明申请

US20110176379A1 SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY CELL ARRAY OF OPEN BIT LINE TYPE AND CONTROL METHOD THEREOF 审中-公开
标题翻译：具有开放式线型存储器单元阵列的半导体存储器件及其控制方法
公开(公告)号：US20110176379A1
公开(公告)日：2011-07-21
申请号：US13008408
申请日：2011-01-18
申请人： Shinichi TAKAYAMA , Akira Kotabe , Kazuo Ono , Tomonori Sekiguchi , Yoshimitsu Yanagawa , Riichiro Takemura
发明人： Shinichi TAKAYAMA , Akira Kotabe , Kazuo Ono , Tomonori Sekiguchi , Yoshimitsu Yanagawa , Riichiro Takemura
IPC分类号： G11C7/06
CPC分类号： G11C11/4091 , G11C11/4094 , G11C11/4097 , G11C2207/002
摘要： A semiconductor memory device includes: first and second bit lines of an open bit-line system; a sense amplifier that amplifies a potential difference between the first and second bit lines; a pair of first and second local data lines corresponding to the first and second bit lines, respectively; and a write amplifier circuit. The write amplifier circuit changes a potential of the second local data line without changing a potential of the first local data line at a time of writing data for the first bit line, and changes a potential of the first local data line without changing a potential of the second local data line at a time of writing data for the second bit line.
摘要翻译：半导体存储器件包括：开放位线系统的第一和第二位线; 读出放大器，放大第一和第二位线之间的电位差; 对应于第一和第二位线的一对第一和第二本地数据线; 和写放大器电路。写入放大器电路在写入第一位线的数据时改变第二本地数据线的电位而不改变第一本地数据线的电位，并且在不改变第一本地数据线的电位的情况下改变第一本地数据线的电位在第二位线的数据写入时的第二本地数据线。

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