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    • 1. 发明授权
    • Call control with transmission priority in a packet communication
network of an ATM type
    • 在ATM类型的分组通信网络中具有传输优先级的呼叫控制
    • US5132966A
    • 1992-07-21
    • US496973
    • 1990-03-23
    • Shin-ichiro HayanoHiroshi Suzuki
    • Shin-ichiro HayanoHiroshi Suzuki
    • H04L12/54H04L12/70
    • H04L12/5602H04L2012/5632H04L2012/5651
    • In a high-speed packet multiplex communication network including a transmission line with a predetermined bandwidth and accommodating a plurality of information sources, the sources having various packet delivery rates over a range of between a peak rate and a lower rate than an average rate and demanding various transport performances, the sources are preliminarily classified into a plurality of types according to transport performances required and different transmission priorities are assigned to the different types, respectively. Bandwidths of sources of first priority and second priority are determined ones corresponding to the peak rate and the average rate, respectively. A virtual bandwidth may be calculated for the second priority source as a value between the peak and average rates. In response to connection requests from the sources, each of the connection requests is admitted when a bandwidth defined by the priority of each source is accepted in a residual bandwidth of the predetermined bandwidth, and the packets from the source of the first priority are preferentially transmitted to the transmission line, packets of the second priority source are transmitted when packets of the first priority source are absent. Thus, high bandwidth efficiency is insured while the high transport performance of the first priority source is maintained.
    • 2. 发明授权
    • Current switch capable of producing a stable output of a desired level
    • 电流开关能够产生所需电平的稳定输出
    • US4749954A
    • 1988-06-07
    • US60858
    • 1987-06-12
    • Shin-ichiro Hayano
    • Shin-ichiro Hayano
    • H03K17/687H03K17/693H03F3/45
    • H03K17/693
    • A current switch is disclosed. The current switch comprises an arrangement for converting the difference between input signals fed to first and second input terminals into the difference between output signals from first and second output terminals; a power source for supplying a constant current to the converting arrangement; constant voltage means connected between a first output terminal of the converting arrangement and the power source; a first resistor, one end of which is connected to the power source; a second resistor, one end of which is connected to the other end of the first resistor and the other end of which is connected to the first output terminal of the converting arrangement; and a third resistor, one end of which is connected to the other end of the first resistor and the other end of which is connected to the second output terminal of the converting arrangement, wherein an output signal is taken out of the second output terminal.
    • 公开了电流开关。 电流开关包括用于将馈送到第一和第二输入端的输入信号之间的差转换成来自第一和第二输出端的输出信号之间的差的装置; 用于向转换装置提供恒定电流的电源; 连接在转换装置的第一输出端子和电源之间的恒压装置; 第一电阻器,其一端连接到电源; 第二电阻器,其一端连接到第一电阻器的另一端,另一端连接到转换装置的第一输出端子; 以及第三电阻器,其一端连接到第一电阻器的另一端并且另一端连接到转换装置的第二输出端子,其中输出信号从第二输出端子中取出。
    • 4. 发明授权
    • Time division switching for multi-channel calls using two time switch
memories acting as a frame aligner
    • 使用两个作为帧对准器的时间开关存储器进行多通道呼叫的时分切换
    • US4941141A
    • 1990-07-10
    • US291673
    • 1988-12-29
    • Shin-ichiro Hayano
    • Shin-ichiro Hayano
    • H04J3/06H04Q11/08
    • H04J3/0629H04Q11/08
    • Signals on an incoming highway of a time division switching system are written into an alternate one of first and second time switch memories and are sequentially read out of the other alternate one of the memories into the time slots of an outgoing highway of the system in accordance with a phase difference between incoming and outgoing frames and a time slot interchanging relationship between signals on the incoming highway and corresponding signals on the outgoing highway, so that the beginning of the outgoing frame coincides with one of the time slots of the incoming frame which is displaced from the beginning of the incoming frame by an amount equal to the detected phase difference. Alternatively, if the time slot of at least one signal of a multi-channel call on the incoming highway is later than the time slot of a corresponding signal on the outgoing highway, all signals of that multi-channel call are sequentially read out of the memories into a given outgoing highway so that they correspond to those on an incoming frame which is one frame prior to the one being written at the beginning of the given outgoing frame. If the time slots of all signals of a multi-channel call on the incoming highway are earlier than those of respectively corresponding signals on the outgoing highway, all signals of that multi-channel call are sequentially read out of the memories into an outgoing frame so that they correspond to those on an incoming frame which is being written at the beginning of the outgoing frame.
    • 5. 发明授权
    • Multiplexer/demultiplexer circuitry for LSI implementation
    • 用于LSI实现的多路复用器/解复用器电路
    • US4835770A
    • 1989-05-30
    • US101952
    • 1987-09-28
    • Shin-ichiro Hayano
    • Shin-ichiro Hayano
    • H04J3/06H04Q11/06
    • H04J3/0605H04Q11/06
    • A multiplexer/demultiplexer comprises a code pattern generator for generating a series of unique code patterns at periodic intervals, a plurality of multiplexers cascaded from the code pattern generator to one end of a channel. Each of the multiplexers includes a synchronizer for detecting a particular one of the unique code patterns and a slot selector for multiplexing input data packets into time slots uniquely identified by the particular code pattern to form a data bit stream with the code patterns which is forwarded to the channel. A plurality of demultiplexers are connected to the opposite end of the channel, each of the demultiplexers comprising a synchronizer for detecting a particular one of the code patterns from the data bit stream and a gate for extracting data packets from the time slots uniquely identified by the detected code pattern.
    • 多路复用器/解复用器包括用于以周期性间隔产生一系列唯一码模式的码模式发生器,从码模式发生器级联到信道一端的多路复用器。 每个多路复用器包括用于检测特定代码模式中的特定一个的同步器和用于将输入数据分组复用到由特定代码模式唯一标识的时隙中的时隙选择器,以形成具有被转发到的代码模式的数据比特流 这个频道。 多个解复用器连接到信道的相对端,每个解复用器包括用于从数据比特流检测码模式中的特定一个的同步器和用于从由数据比特流唯一标识的时隙中提取数据分组的门 检测到代码模式。
    • 8. 发明授权
    • Time-division multiplex switching network
    • 时分复用交换网络
    • US4903259A
    • 1990-02-20
    • US222259
    • 1988-07-21
    • Shin-Ichiro Hayano
    • Shin-Ichiro Hayano
    • H04Q11/08
    • H04Q11/08
    • A switching network is constituted by a plurality of time switches which are arranged in a matrix and at cross points between a plurality of input buses and a plurality of output buses, on which frame synchronization signals are multiplexed. Each time switch includes a data memory in which data on the input bus is written in synchronism with the frame synchronization signal included in the input bus, and from which data is read out under the address control of a control memory in synchronization with the frame synchronization signal included in the output bus.
    • 开关网络由多个时间开关构成,多个时间开关以矩阵形式布置在多个输入总线与多个输出总线之间的交叉点,帧同步信号被多路复用。 每次开关包括一个数据存储器,其中输入总线上的数据与包括在输入总线中的帧同步信号同步写入,并且在与帧同步同步的同时在控制存储器的地址控制下从中读出数据 输出总线中包含的信号。
    • 9. 发明授权
    • Time division switching system with time slot alignment circuitry
    • 具有时隙对准电路的时分交换系统
    • US4894821A
    • 1990-01-16
    • US101759
    • 1987-09-28
    • Shin-Ichiro Hayano
    • Shin-Ichiro Hayano
    • H04J3/06H04Q11/06
    • H04J3/0629H04Q11/06
    • In a time division switching system, a reference pulse generator generates constant reference timing pulses for operating a switch. First and second variable phase pulse generators generate first and second trains of variable phase timing pulses. Data signals on a first group of input lines are multiplexed in response to the timing pulses of the first train to produce a first time division multiplexed (TDM) signal and data signals on a second group of the input lines are multiplexed in response to the timing pulses of the second train to produce a second TDM signal. The TDM signals are carried on first and second highways respectively to the space switch. The first and second variable phase pulse generators are controlled so that the timing of each of the first and second TDM signals coincides in the space switch with the reference timing pulse.
    • 在时分切换系统中,参考脉冲发生器产生用于操作开关的恒定参考定时脉冲。 第一和第二可变相位脉冲发生器产生可变相位定时脉冲的第一和第二列。 第一组输入线上的数据信号响应于第一列的定时脉冲被复用以产生第一时分多路复用(TDM)信号,并且响应于定时复用第二组输入线上的数据信号 第二列的脉冲以产生第二TDM信号。 TDM信号分别在第一和第二高速公路上承载到空间交换机。 控制第一和第二可变相位脉冲发生器,使得第一和第二TDM信号中的每一个的定时在空间开关中与基准定时脉冲重合。