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1. 发明授权

US07123995B1 Dynamic circuit operation adjustment based on distributed on-chip temperature sensors 有权
标题翻译：基于分布式片上温度传感器的动态电路运行调整
公开(公告)号：US07123995B1
公开(公告)日：2006-10-17
申请号：US10838001
申请日：2004-05-03
申请人： Shaishav A. Desai , Claude R. Gauthier
发明人： Shaishav A. Desai , Claude R. Gauthier
IPC分类号： G05D23/00
CPC分类号： G05D23/1934
摘要： A plurality of on-chip temperature sensors are selectively distributed across an integrated circuit. The temperature sensors generate signals indicative of operating temperatures experienced by the portions of the integrated circuit on which the temperature sensors are disposed. Based on the temperatures of the portions of the integrated circuit, operation of particular circuitry of the integrated circuit is dynamically adjusted to counteract the effects of undesirable or unexpected operating temperatures.
摘要翻译：多个片上温度传感器选择性地分布在集成电路上。温度传感器产生指示其上设置有温度传感器的集成电路的部分经历的操作温度的信号。基于集成电路部分的温度，动态地调整集成电路的特定电路的操作以抵消不期望的或意外的操作温度的影响。

2. 发明授权

US06879929B2 Sense amplifier thermal correction scheme 有权
标题翻译：感应放大器热校正方案
公开(公告)号：US06879929B2
公开(公告)日：2005-04-12
申请号：US10285809
申请日：2002-10-31
申请人： Claude R. Gauthier , Shaishav A. Desai , Raymond Heald
发明人： Claude R. Gauthier , Shaishav A. Desai , Raymond Heald
IPC分类号： G11C7/06 , H03F1/30 , G01K1/08 , G06F15/00
CPC分类号： G11C7/04 , G11C7/06 , G11C2207/065 , G11C2207/2254 , H03F1/30
摘要： A system and method of adjusting a sense amplifier includes providing an amplification control parameter to the sense amplifier. A temperature of the sense amplifier is monitored and the amplification control parameter to the sense amplifier is adjusted according to the temperature of the sense amplifier.
摘要翻译：一种调整读出放大器的系统和方法包括向读出放大器提供放大控制参数。监视读出放大器的温度，并根据读出放大器的温度调整读出放大器的放大控制参数。

3. 发明授权

US06597611B2 Memory read circuitry 有权
标题翻译：存储器读取电路
公开(公告)号：US06597611B2
公开(公告)日：2003-07-22
申请号：US10295953
申请日：2002-11-15
申请人： Shaishav A. Desai , Devendra N. Tawari
发明人： Shaishav A. Desai , Devendra N. Tawari
IPC分类号： G11C700
CPC分类号： G11C7/12
摘要： A circuit on a semiconductor for precharging a local bitline and a global bitline. The circuit includes: a precharge input; a first switch, the gate of the first switch coupled to the precharge input, the source of the first switch coupled to a voltage source, the drain of the first switch coupled to the local bitline; a delay element, the input of the delay element coupled to the precharge input; and a second switch, the gate of the second switch coupled to the output of the delay element, the source of the second switch coupled to the voltage source, the drain of the second switch coupled to the global bitline.
摘要翻译：用于预充电本地位线和全局位线的半导体电路。电路包括：预充电输入; 第一开关的第一开关的栅极耦合到预充电输入，第一开关的源极耦合到电压源，第一开关的漏极耦合到本地位线; 延迟元件，耦合到预充电输入的延迟元件的输入; 和第二开关，第二开关的栅极耦合到延迟元件的输出，第二开关的源极耦合到电压源，第二开关的漏极耦合到全局位线。

4. 发明授权

US07136774B2 Sense amplifier thermal correction scheme 有权
标题翻译：感应放大器热校正方案
公开(公告)号：US07136774B2
公开(公告)日：2006-11-14
申请号：US11051116
申请日：2005-02-04
申请人： Claude R. Gauthier , Shaishav A. Desai , Raymond Heald
发明人： Claude R. Gauthier , Shaishav A. Desai , Raymond Heald
IPC分类号： G01K1/08 , G06F15/00
CPC分类号： G11C7/04 , G11C7/06 , G11C2207/065 , G11C2207/2254 , H03F1/30
摘要： A system and method of adjusting a sense amplifier includes providing an amplification control parameter to the sense amplifier. A temperature of the sense amplifier is monitored and the amplification control parameter to the sense amplifier is adjusted according to the temperature of the sense amplifier.
摘要翻译：一种调整读出放大器的系统和方法包括向读出放大器提供放大控制参数。监视读出放大器的温度，并根据读出放大器的温度调整读出放大器的放大控制参数。

5. 发明授权

US06894528B2 Process monitor based keeper scheme for dynamic circuits 有权
标题翻译：用于动态电路的基于过程监控器的维护方案
公开(公告)号：US06894528B2
公开(公告)日：2005-05-17
申请号：US10246336
申请日：2002-09-17
申请人： Claude R. Gauthier , Shaishav A. Desai
发明人： Claude R. Gauthier , Shaishav A. Desai
IPC分类号： H03K19/096 , H03K19/00
CPC分类号： H03K19/0963
摘要： An invention is disclosed for a process monitor based keeper scheme for dynamic circuits. A semiconductor die having a process monitor based keeper scheme of the embodiments of the present invention generally includes a plurality of dynamic circuits, each having an adaptive keeper circuit capable of being adjusted based on a bit code. In addition, a plurality of process monitors is included. Each process monitor is disposed within a corresponding die block, which defines a local area of the die. The process monitors are capable of detecting process corner data for the corresponding die block. In communication with each process monitor and the plurality of dynamic circuits is a test processor unit. The test processor unit obtains process corner data for each die block from the process monitor disposed within the die block, and provides a bit code based on the process corner data to the dynamic circuits disposed within the die block.
摘要翻译：公开了一种用于动态电路的基于过程监视器的保持器方案的发明。具有本发明的实施例的基于过程监视器的保持器方案的半导体管芯通常包括多个动态电路，每个动态电路具有能够基于位代码进行调整的自适应保持电路。此外，还包括多个处理监视器。每个过程监控器设置在相应的模具块内，该模块限定模具的局部区域。过程监视器能够检测相应模块的过程转角数据。与每个过程监视器通信，并且多个动态电路是测试处理器单元。测试处理器单元从设置在模块内的过程监视器获得每个模块的处理角数据，并且将基于过程转角数据的位代码提供给设置在模块内的动态电路。

6. 发明授权

US06759877B1 Dynamic circuitry with on-chip temperature-controlled keeper device 有权
标题翻译：带片上温控器的动态电路
公开(公告)号：US06759877B1
公开(公告)日：2004-07-06
申请号：US10337523
申请日：2003-01-07
申请人： Shaishav A. Desai , Claude R. Gauthier , Anup S. Mehta
发明人： Shaishav A. Desai , Claude R. Gauthier , Anup S. Mehta
IPC分类号： H03K1920
CPC分类号： H03K19/0963 , H03K19/00384
摘要： A method and apparatus that dynamically control an amount of offset current generated by a keeper device are provided. Further, a method and apparatus that use a temperature-controlled keeper device to dynamically optimize an evaluation performance of a dynamic circuit are provided. In particular, when IC temperature is relatively high, i.e., there is increased current leakage in the dynamic circuit, an amount of offset current output by the temperature-controlled keeper may be increased, thereby preventing a dynamic node of the dynamic circuit from being discharged, or otherwise adversely affected, by the increased current leakage. Alternatively, when the IC temperature is relatively low, i.e., there is decreased current leakage in the dynamic circuit, the amount of offset current output by the temperature-controlled keeper may be decreased, thereby ensuring that the offset current is not so large that it severely degrades the evaluation performance.
摘要翻译：提供了一种动态地控制由保持装置产生的偏移电流量的方法和装置。此外，提供了使用温度控制保持装置来动态优化动态电路的评估性能的方法和装置。特别地，当IC温度相对较高时，即动态电路中的电流泄漏增加时，由温度控制保持器输出的偏移电流量可能会增加，从而防止动态电路的动态节点放电，或以其他方式不利地受到电流泄漏的影响。或者，当IC温度相对较低时，即动态电路中的电流泄漏减少时，由温度控制的保持器输出的偏移电流量可能会降低，从而确保偏移电流不会大到严重降低评估绩效。

7. 发明授权

US06466497B1 Secondary precharge mechanism for high speed multi-ported register files 有权
标题翻译：高速多端口寄存器文件的二次预充电机制
公开(公告)号：US06466497B1
公开(公告)日：2002-10-15
申请号：US09838774
申请日：2001-04-17
申请人： Shaishav A. Desai , Anup S. Mehta , Srinivasa Gopaladhine
发明人： Shaishav A. Desai , Anup S. Mehta , Srinivasa Gopaladhine
IPC分类号： G11C700
CPC分类号： G11C7/12
摘要： An electronic circuit has a register connected to a sense amplifier via a bitline (the sense amplifier has a primary precharge circuit), and a secondary precharge circuit also connected to the bitline. For bitlines that are relatively long, the secondary precharge circuit is located at a distal end of the bitline with respect to the sense amplifier. The secondary precharge circuit initially pulls up the voltage of the bitline, and the primary precharge circuit in the sense amplifier completes the precharging of the bitline. The secondary precharge circuit includes a cascode transistor coupled to the bitline via a feedback circuit. The feedback circuit is enabled during the precharge phase, when the bitline is discharged below a preset threshold. The threshold of the secondary precharge circuit can be set such that any skew between the precharge pulses of the secondary precharge circuit and the sense amplifier does not affect the falling bitline during the sense amplifier evaluate phase. Because of the initial surge of precharge from the secondary precharge circuit, the bitline is completely precharged in a shorter cycle time, allowing the sense amplifier to be operated at higher frequencies.
摘要翻译：电子电路具有通过位线连接到读出放大器的寄存器（读出放大器具有初级预充电电路），并且次级预充电电路也连接到位线。对于相对较长的位线，次级预充电电路相对于读出放大器位于位线的远端。次级预充电电路最初拉高位线的电压，读出放大器中的初级预充电电路完成位线的预充电。次级预充电电路包括通过反馈电路耦合到位线的共源共栅晶体管。当位线放电到预设阈值以下时，反馈电路在预充电阶段被使能。二次预充电电路的阈值可以被设置为使得在次级预充电电路和读出放大器的预充电脉冲之间的任何偏差在感测放大器评估阶段期间不会影响下降的位线。由于来自二次预充电电路的预充电的初始浪涌，位线在更短的周期时间内完全预充电，从而允许读出放大器在较高频率下工作。

8. 发明授权

US06914452B2 Adaptive keeper sizing for dynamic circuits based on fused process corner data 有权
标题翻译：基于融合过程角数据的动态电路的自适应保持器尺寸
公开(公告)号：US06914452B2
公开(公告)日：2005-07-05
申请号：US10246307
申请日：2002-09-17
申请人： Claude R. Gauthier , Shaishav A. Desai
发明人： Claude R. Gauthier , Shaishav A. Desai
IPC分类号： H03K19/096
CPC分类号： H03K19/0963
摘要： An invention is provided for an adaptive keeper circuit. The adaptive keeper circuit includes a first keeper transistor having a first terminal in electrical communication with a power supply and a second terminal in electrical communication with an internal dynamic node. In addition, a second keeper transistor is included that is configured in parallel to the first keeper transistor. The second keeper transistor also has a first terminal in electrical communication with the power supply. The second keeper transistor can be added to the first keeper transistor using a feedback bit line, which is configured to control current flow between the second keeper transistor and the internal dynamic node based on a state of the feedback bit line. The state of the feedback bit line is based on a process corner characteristic of the die. Additional keeper transistors and corresponding feedback bit lines can be added to the keeper circuit to increase flexibility.
摘要翻译：本发明提供一种自适应保持电路。自适应保持器电路包括具有与电源电连通的第一端子和与内部动态节点电通信的第二端子的第一保持器晶体管。此外，包括与第一保持晶体管并联配置的第二保持晶体管。第二保持器晶体管还具有与电源电连通的第一端子。可以使用反馈位线将第二保持晶体管添加到第一保持晶体管，反馈位线被配置为基于反馈位线的状态来控制第二保持器晶体管和内部动态节点之间的电流。反馈位线的状态基于芯片的工艺角特性。可以将附加的保持器晶体管和相应的反馈位线添加到保持器电路以增加灵活性。

9. 发明授权

US06850856B1 I/O receiver thermal correction scheme 有权
标题翻译： I / O接收机热校正方案
公开(公告)号：US06850856B1
公开(公告)日：2005-02-01
申请号：US10299674
申请日：2002-11-18
申请人： Claude R. Gauthier , Shaishav A. Desai
发明人： Claude R. Gauthier , Shaishav A. Desai
IPC分类号： G01R19/00 , G06F1/20 , G06F1/32 , G06F19/00
CPC分类号： G06F1/32 , G06F1/206
摘要： A system and method of adjusting an I/O receiver includes providing an amplification control parameter to the I/O receiver. A temperature of the I/O receiver is monitored and the amplification control parameter to the I/O receiver is adjusted according to the temperature of the I/O receiver.
摘要翻译：调整I / O接收机的系统和方法包括向I / O接收机提供放大控制参数。监视I / O接收器的温度，并根据I / O接收器的温度调节I / O接收器的放大控制参数。

10. 发明授权

US06654301B2 Multiple discharge capable bit line 有权
标题翻译：多放电能力位线
公开(公告)号：US06654301B2
公开(公告)日：2003-11-25
申请号：US09965307
申请日：2001-09-27
申请人： Farzad Chehrazi , Shaishav A. Desai , Anup S. Mehta , Devendra N. Tawari
发明人： Farzad Chehrazi , Shaishav A. Desai , Anup S. Mehta , Devendra N. Tawari
IPC分类号： G11C700
CPC分类号： G11C7/18 , G11C7/12
摘要： A bit line that has a feedback path from the bit line to a storage cell on the bit line is provided. The feedback path allows the bit line to discharge through a discharge device that is connected to a non-discharging local bit line. Further, a discharge device capable of discharging a global bit line even when a storage cell connected to the discharge device is not being evaluated is provided. Further, a method to perform a memory array operation by discharging a bit line using multiple discharge devices is provided.
摘要翻译：提供了具有从位线到位线上的存储单元的反馈路径的位线。反馈路径允许位线通过连接到非放电局部位线的放电装置放电。此外，即使在没有评估连接到放电装置的存储单元的情况下，也能够提供能够对全局位线进行放电的放电装置。此外，提供了通过使用多个放电装置放电位线来执行存储器阵列操作的方法。

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