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1. 发明授权

US08373819B2 Backlight unit and liquid crystal display device having the same 有权
标题翻译：背光单元和具有该背光单元的液晶显示装置
公开(公告)号：US08373819B2
公开(公告)日：2013-02-12
申请号：US12629442
申请日：2009-12-02
申请人： Joo Hong Lee , Hong Sung Song , Seok Hwan Oh , Woong Ki Min , Ji Woon Min
发明人： Joo Hong Lee , Hong Sung Song , Seok Hwan Oh , Woong Ki Min , Ji Woon Min
IPC分类号： G02F1/1333 , G02F1/1335
CPC分类号： G02F1/133604 , G02F1/133615
摘要： A backlight unit capable of preventing an initial driving malfunction is disclosed. The backlight unit includes a bottom cover opened upwardly, a reflective sheet disposed in the inner surface of the bottom cover; a plurality of lamps arranged at a fixed interval on the reflective sheet; an auxiliary light source disposed at the outer side surface of the bottom cover; and a light guide member, opposite to the emitting surface of the auxiliary light source, configured to guide light emitted from the auxiliary light source to the lamps through first and second penetration holes formed on one of the side walls of the bottom cover and the reflective sheet.
摘要翻译：公开了能够防止初始驱动故障的背光单元。背光单元包括向上打开的底盖，设置在底盖的内表面中的反射片; 在反射片上以固定的间隔布置的多个灯; 辅助光源，设置在底盖的外侧表面; 以及与辅助光源的发射表面相对的导光构件，其被配置为通过形成在底盖的一个侧壁上的第一和第二穿透孔将引导从辅助光源发射的光引导到灯，并且反射片。

2. 发明申请

US20120244476A1 PHOTOLITHOGRAPHY METHOD INCLUDING TECHNIQUE OF DETERMINING DISTRIBUTION OF ENERGY OF EXPOSURE LIGHT PASSING THROUGH SLIT OF EXPOSURE APPARATUS 有权
标题翻译：曝光方法包括确定曝光能量分布的技术的光刻方法
公开(公告)号：US20120244476A1
公开(公告)日：2012-09-27
申请号：US13402902
申请日：2012-02-23
申请人： JIN-SEOK HEO , SEOK-HWAN OH , JEONG-HO YEO
发明人： JIN-SEOK HEO , SEOK-HWAN OH , JEONG-HO YEO
IPC分类号： G03F7/20
CPC分类号： G03F7/20 , G03F7/70075 , G03F7/70133 , G03F7/70608 , G03F7/70616
摘要： The energy distribution of exposure light directed passing through the slit of an exposure apparatus is determined. A photoresist layer on a substrate is exposed over a plurality of shots while changing the intensity of the exposure light for each shot. Then the photoresist layer is developed to form a sample photoresist layer. An image of the developed sample photoresist layer is analyzed for color intensity. Values of the color intensity across a selected one of the shots are correlated with values of the intensity of the exposure light to produce an energy distribution of the exposure light along the length of the slit. The energy distribution is used to change the slit so that a more desirable energy distribution may be realized when the slit is used in a process of manufacturing a semiconductor device.
摘要翻译：确定通过曝光装置的狭缝的曝光光的能量分布。衬底上的光致抗蚀剂层在多次照射下曝光，同时改变每次射击的曝光光的强度。然后将光致抗蚀剂层显影以形成样品光致抗蚀剂层。分析显影样品光致抗蚀剂层的图像的颜色强度。所选择的一个拍摄中的颜色强度的值与曝光光的强度的值相关，以产生沿着狭缝的长度的曝光光的能量分布。使用能量分布来改变狭缝，使得当在制造半导体器件的工艺中使用狭缝时可以实现更理想的能量分布。

3. 发明授权

US08263487B2 Method of forming patterns of semiconductor device 有权
标题翻译：形成半导体器件图案的方法
公开(公告)号：US08263487B2
公开(公告)日：2012-09-11
申请号：US12655344
申请日：2009-12-29
申请人： Dong-ki Yoon , Shi-yong Yi , Seong-woon Choi , Seok-hwan Oh , Kwang-sub Yoon , Myeong-cheol Kim , Young-ju Park
发明人： Dong-ki Yoon , Shi-yong Yi , Seong-woon Choi , Seok-hwan Oh , Kwang-sub Yoon , Myeong-cheol Kim , Young-ju Park
IPC分类号： H01L21/4763
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/0338 , H01L27/115 , H01L27/11517
摘要： A method of forming fine patterns of a semiconductor device by using carbon (C)-containing films includes forming an etching target film on a substrate including first and second regions; forming a plurality of first C-containing film patterns on the etching target film in the first region; forming a buffer layer which covers top and side surfaces of the plurality of first C-containing film patterns; forming a second C-containing film; removing the second C-containing film in the second region; exposing the plurality of first C-containing film patterns by removing a portion of the buffer layer in the first and second regions; and etching the etching target film by using the plurality of first C-containing film patterns, and portions of the second C-containing film which remain in the first region, as an etching mask.
摘要翻译：通过使用含碳（C）的膜来形成半导体器件的精细图案的方法包括在包括第一和第二区域的衬底上形成蚀刻靶膜; 在所述第一区域中的所述蚀刻目标膜上形成多个第一含C膜的图案; 形成覆盖所述多个第一含C膜图案的顶表面和侧表面的缓冲层; 形成第二含C膜; 去除第二区域中的第二含C膜; 通过去除第一和第二区域中的缓冲层的一部分来暴露多个第一含C膜的图案; 并且通过使用多个第一含C膜膜图案和残留在第一区域中的第二含C膜的部分来蚀刻蚀刻目标膜作为蚀刻掩模。

4. 发明授权

US08125617B2 Apparatus and method for manufacturing semiconductor device 有权
标题翻译：半导体器件制造装置及方法
公开(公告)号：US08125617B2
公开(公告)日：2012-02-28
申请号：US12292731
申请日：2008-11-25
申请人： Sang-Yoon Woo , Yong-Jin Cho , Seok-Hwan Oh
发明人： Sang-Yoon Woo , Yong-Jin Cho , Seok-Hwan Oh
IPC分类号： G03B27/60 , G03B27/52
CPC分类号： G03F7/70341
摘要： An apparatus for manufacturing a semiconductor device and a method for manufacturing a semiconductor device using the apparatus may be provided. The manufacturing apparatus may include a liquid supplying portion for forming a liquid film, and a gas supplying unit that may rotate to discharge gas at a wide range of angles. The manufacturing method may include forming a shape and size of a liquid film common to the shape and size of an exposure region through adjusting the direction and pressure in which gas may be discharged to the substrate. Thus, the speed at which a substrate may be moved may be increased, and morphology differences of a substrate may be reduced.
摘要翻译：可以提供一种用于制造半导体器件的设备和使用该设备制造半导体器件的方法。制造装置可以包括用于形成液膜的液体供应部分和可以旋转以在宽范围角度排出气体的气体供应单元。制造方法可以包括通过调节将气体排出到基板的方向和压力来形成与曝光区域的形状和尺寸共同的液膜的形状和尺寸。因此，衬底可能被移动的速度可能增加，并且可能降低衬底的形态差异。

5. 发明申请

US20110053362A1 METHOD OF FORMING A MASK PATTERN, METHOD OF FORMING A MINUTE PATTERN, AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME 有权
标题翻译：形成掩模图案的方法，形成分钟图案的方法和使用其制造半导体器件的方法
公开(公告)号：US20110053362A1
公开(公告)日：2011-03-03
申请号：US12873574
申请日：2010-09-01
申请人： Hyoung-Hee KIM , Yool Kang , Seong-Ho Moon , Seok-Hwan Oh , So-Ra Han , Seong-Woon Choi
发明人： Hyoung-Hee KIM , Yool Kang , Seong-Ho Moon , Seok-Hwan Oh , So-Ra Han , Seong-Woon Choi
IPC分类号： H01L21/28 , G03F7/20
CPC分类号： H01L21/28123 , H01L21/76229 , H01L27/11526 , H01L27/11529
摘要： A method of forming a mask pattern, a method of forming a minute pattern, and a method of manufacturing a semiconductor device using the same, the method of forming the mask pattern including forming first mask patterns on a substrate; forming first preliminary capping layers on the first mask patterns; irradiating energy to the first preliminary capping patterns to form second preliminary capping layers ionically bonded with the first mask patterns; applying an acid to the second preliminary capping layers to form capping layers; forming a second mask layer between the capping layers, the second mask layer having a solubility lower than that of the capping layers; and removing the capping layers to form second mask patterns.
摘要翻译：形成掩模图案的方法，形成微小图案的方法以及使用其形成半导体器件的方法，所述掩模图案的形成方法包括在基板上形成第一掩模图案; 在第一掩模图案上形成第一初步封盖层; 向第一初步封盖图案照射能量以形成与第一掩模图案离子键合的第二初步封盖层; 向第二初步封盖层施加酸以形成封盖层; 在所述封盖层之间形成第二掩模层，所述第二掩模层的溶解度低于所述封盖层的溶解度; 并去除覆盖层以形成第二掩模图案。

6. 发明授权

US07678650B2 Nonvolatile memory device and method of manufacturing the same 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US07678650B2
公开(公告)日：2010-03-16
申请号：US12453721
申请日：2009-05-20
申请人： Cha-Won Koh , Byung-Hong Chung , Sang-Gyun Woo , Jeong-Lim Nam , Seok-Hwan Oh , Jai-Hyuk Song , Hyun Park , Yool Kang
发明人： Cha-Won Koh , Byung-Hong Chung , Sang-Gyun Woo , Jeong-Lim Nam , Seok-Hwan Oh , Jai-Hyuk Song , Hyun Park , Yool Kang
IPC分类号： H01L21/8247
CPC分类号： H01L29/42324 , H01L27/115 , H01L27/11521
摘要： Example embodiments provide a nonvolatile memory device and a method of manufacturing the same. A floating gate electrode of the nonvolatile memory device may have a cross-shaped section as taken along a direction extending along a control gate electrode. The floating gate electrode may have an inverse T-shaped section as taken along a direction extending along an active region perpendicular to the control gate electrode. The floating gate electrode may include a lower gate pattern, a middle gate pattern and an upper gate pattern sequentially disposed on a gate insulation layer, in which the middle gate pattern is larger in width than the lower gate pattern and the upper gate pattern. A boundary between the middle gate pattern and the upper gate pattern may have a rounded corner.
摘要翻译：示例性实施例提供了一种非易失性存储器件及其制造方法。非易失性存储器件的浮置栅极可以沿着沿着控制栅电极延伸的方向截取十字形截面。浮置栅极可以具有沿着垂直于控制栅电极的有源区延伸的方向的T形截面。浮栅电极可以包括顺序地设置在栅绝缘层上的下栅极图案，中栅极图案和上栅极图案，其中中间栅极图案的宽度大于下栅极图案和上栅极图案。中间栅极图案和上部栅极图案之间的边界可以具有圆角。

7. 发明申请

US20090258473A1 Nonvolatile memory device and method of manufacturing the same 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20090258473A1
公开(公告)日：2009-10-15
申请号：US12453721
申请日：2009-05-20
申请人： Cha-Won Koh , Byung-Hong Chung , Sang-Gyun Woo , Jeong-Lim Nam , Seok-Hwan Oh , Jai-Hyuk Song , Hyun Park , Yool Kang
发明人： Cha-Won Koh , Byung-Hong Chung , Sang-Gyun Woo , Jeong-Lim Nam , Seok-Hwan Oh , Jai-Hyuk Song , Hyun Park , Yool Kang
IPC分类号： H01L21/762
CPC分类号： H01L29/42324 , H01L27/115 , H01L27/11521
摘要： Example embodiments provide a nonvolatile memory device and a method of manufacturing the same. A floating gate electrode of the nonvolatile memory device may have a cross-shaped section as taken along a direction extending along a control gate electrode. The floating gate electrode may have an inverse T-shaped section as taken along a direction extending along an active region perpendicular to the control gate electrode. The floating gate electrode may include a lower gate pattern, a middle gate pattern and an upper gate pattern sequentially disposed on a gate insulation layer, in which the middle gate pattern is larger in width than the lower gate pattern and the upper gate pattern. A boundary between the middle gate pattern and the upper gate pattern may have a rounded corner.
摘要翻译：示例性实施例提供了一种非易失性存储器件及其制造方法。非易失性存储器件的浮置栅极可以沿着沿着控制栅电极延伸的方向截取十字形截面。浮置栅极可以具有沿着垂直于控制栅电极的有源区延伸的方向的T形截面。浮栅电极可以包括顺序地设置在栅绝缘层上的下栅极图案，中栅极图案和上栅极图案，其中中间栅极图案的宽度大于下栅极图案和上栅极图案。中间栅极图案和上部栅极图案之间的边界可以具有圆角。

8. 发明申请

US20080194097A1 Method of reworking a semiconductor substrate and method of forming a pattern of a semiconductor device 有权
标题翻译：半导体衬底的再加工方法以及形成半导体器件的图案的方法
公开(公告)号：US20080194097A1
公开(公告)日：2008-08-14
申请号：US12068410
申请日：2008-02-06
申请人： Eun-Sung Kim , Tae-Kyu Kim , Seok-Hwan Oh
发明人： Eun-Sung Kim , Tae-Kyu Kim , Seok-Hwan Oh
IPC分类号： H01L21/4757 , H01L21/4763
CPC分类号： H01L21/31133 , H01L21/32139
摘要： A method of reworking a semiconductor substrate and a method of forming a pattern of semiconductor device using the same without damage to an organic anti-reflective coating (ARC) is provided. The method of reworking a semiconductor substrate includes forming a photoresist pattern on a substrate having the organic ARC formed thereon. An entire surface of the substrate having the photoresist pattern formed thereon may be exposed when a defect is present in the photoresist pattern. The entire-surface-exposed photoresist pattern may be removed by performing a developing process without damage to the organic ARC.
摘要翻译：提供了对半导体衬底进行再加工的方法和使用其形成半导体器件的图案而不损坏有机抗反射涂层（ARC）的方法。半导体衬底的再加工方法包括在其上形成有机ARC的衬底上形成光致抗蚀剂图案。当在光致抗蚀剂图案中存在缺陷时，可以暴露出其上形成有光致抗蚀剂图案的基板的整个表面。可以通过执行显影过程而不损坏有机ARC来去除全表面暴露的光致抗蚀剂图案。

9. 发明申请

US20070077524A1 Method for forming patterns of semiconductor device 失效
标题翻译：半导体器件形成方法
公开(公告)号：US20070077524A1
公开(公告)日：2007-04-05
申请号：US11529310
申请日：2006-09-29
申请人： Cha-Won Koh , Yool Kang , Sang-Gyun Woo , Seok-Hwan Oh , Gi-Sung Yeo , Ji-Young Lee
发明人： Cha-Won Koh , Yool Kang , Sang-Gyun Woo , Seok-Hwan Oh , Gi-Sung Yeo , Ji-Young Lee
IPC分类号： G03F7/26
CPC分类号： G03F7/40 , H01L21/0273 , H01L21/0337 , H01L21/0338
摘要： Provided is a method for forming patterns of a semiconductor device. According to the method, first mask patterns may be formed on a substrate, and second mask patterns may be formed on sidewalls of each first mask pattern. Third mask patterns may fill spaces formed between adjacent second mask patterns, and the second mask patterns may be removed. A portion of the substrate may then be removed using the first and third mask patterns as etch masks.
摘要翻译：提供了一种用于形成半导体器件的图案的方法。根据该方法，可以在衬底上形成第一掩模图案，并且可以在每个第一掩模图案的侧壁上形成第二掩模图案。第三掩模图案可以填充在相邻的第二掩模图案之间形成的空间，并且可以去除第二掩模图案。然后可以使用第一和第三掩模图案作为蚀刻掩模去除衬底的一部分。

10. 发明授权

US08492058B2 Photolithography method including technique of determining distribution of energy of exposure light passing through slit of exposure apparatus 有权
标题翻译：光刻方法，包括确定通过曝光装置的狭缝的曝光光的能量分布的技术
公开(公告)号：US08492058B2
公开(公告)日：2013-07-23
申请号：US13710643
申请日：2012-12-11
申请人： Jin-Seok Heo , Seok-Hwan Oh , Jeong-Ho Yeo
发明人： Jin-Seok Heo , Seok-Hwan Oh , Jeong-Ho Yeo
IPC分类号： G03F9/00
CPC分类号： G03F7/20 , G03F7/70075 , G03F7/70133 , G03F7/70608 , G03F7/70616
摘要： The energy distribution of exposure light directed passing through the slit of an exposure apparatus is determined. A photoresist layer on a substrate is exposed over a plurality of shots while changing the intensity of the exposure light for each shot. Then the photoresist layer is developed to form a sample photoresist layer. An image of the developed sample photoresist layer is analyzed for color intensity. Values of the color intensity across a selected one of the shots are correlated with values of the intensity of the exposure light to produce an energy distribution of the exposure light along the length of the slit. The energy distribution is used to change the slit so that a more desirable energy distribution may be realized when the slit is used in a process of manufacturing a semiconductor device.
摘要翻译：确定通过曝光装置的狭缝的曝光光的能量分布。衬底上的光致抗蚀剂层在多次照射下曝光，同时改变每次射击的曝光光的强度。然后将光致抗蚀剂层显影以形成样品光致抗蚀剂层。分析显影样品光致抗蚀剂层的图像的颜色强度。所选择的一个拍摄中的颜色强度的值与曝光光的强度的值相关，以产生沿着狭缝的长度的曝光光的能量分布。使用能量分布来改变狭缝，使得当在制造半导体器件的工艺中使用狭缝时可以实现更理想的能量分布。

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