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1. 发明申请

US20030170944A1 Electro-optical device 有权
公开(公告)号：US20030170944A1
公开(公告)日：2003-09-11
申请号：US10289511
申请日：2002-11-05
申请人： Semiconductor Energy Laboratory Co. Ltd., a Japanese corporation
发明人： Hajime Kimura
IPC分类号： H01L021/8238
CPC分类号： G09G3/3225 , G09G3/2018 , G09G3/2022 , G09G3/3233 , G09G3/325 , G09G3/3258 , G09G2300/0426 , G09G2300/0465 , G09G2300/0842 , G09G2300/0861 , G09G2300/0876 , G09G2310/0251 , G09G2310/0262 , G09G2310/06 , G09G2310/061 , H01L27/3244 , H01L27/3262 , H01L27/3276 , H01L51/005 , H01L51/0077 , H01L51/0078 , H01L51/0084 , H01L2251/5315
摘要： An object of the present invention is to realize a numerical aperture higher than that of a pixel having a conventional construction by using a pixel circuit having a novel construction in an electro-optical device. Therefore, it is utilized that the electric potential of a gate signal line in a row except for an i-th row is set to a constant electric potential in a period except for when a gate signal line (106) in the i-th row is selected. A gate signal line 111 in an (inull1)-th row is also used as an electric current supply line for an EL element (103) controlled by the gate signal line (106) in the i-th row. Thus, wiring number is reduced and high numerical aperture is realized.

2. 发明申请

US20030071953A1 Display device and method of fabricating the same 审中-公开
标题翻译：显示装置及其制造方法
公开(公告)号：US20030071953A1
公开(公告)日：2003-04-17
申请号：US10300226
申请日：2002-11-19
申请人： Semiconductor Energy Laboratory Co., Ltd., a Japanese corporation
发明人： Shunpei Yamazaki , Yasuhiko Takemura , Setsuo Nakajima , Yasuyuki Arai
IPC分类号： G02F001/1345
CPC分类号： G02F1/13452 , G02F1/1303 , G02F1/133305 , G02F1/1345 , G02F1/13454 , H01L21/67132 , H01L2221/68363 , H01L2224/16 , H01L2924/01079
摘要： A method of fabricating a driver circuit for use with a passive matrix or active matrix electrooptical display device such as a liquid crystal display. The driver circuit occupies less space than heretofore. A circuit (stick crystal) having a length substantially equal to the length of one side of the matrix of the display device is used as the driver circuit. The circuit is bonded to one substrate of the display device, and then the terminals of the circuit are connected with the terminals of the display device. Subsequently, the substrate of the driver circuit is removed. This makes the configuration of the circuit much simpler than the configuration of the circuit heretofore required by the TAB method or COG method, because conducting lines are not laid in a complex manner. The driver circuit can be formed on a large-area substrate such as a glass substrate. The display device can be formed on a lightweight material having a high shock resistance such as a plastic substrate. Hence, a display device having excellent portability can be obtained.
摘要翻译：一种制造用于无源矩阵或有源矩阵电光显示装置如液晶显示器的驱动电路的方法。驱动电路占用的空间比以前少。使用具有与显示装置的矩阵的一侧的长度大致相等的长度的电路（棒状晶体）作为驱动电路。电路接合到显示装置的一个基板，然后电路的端子与显示装置的端子连接。随后，驱动电路的基板被去除。这使得电路的配置比TAB方法或COG方法所要求的电路的配置简单得多，因为导线不是以复杂的方式铺设。驱动电路可以形成在诸如玻璃基板的大面积基板上。显示装置可以形成在具有高抗冲击性的轻质材料上，例如塑料基板。因此，可以获得具有优异便携性的显示装置。

3. 发明申请

US20030062565A1 Semiconductor device and method of fabricating same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20030062565A1
公开(公告)日：2003-04-03
申请号：US10202500
申请日：2002-07-23
申请人： Semiconductor Energy Laboratory Co., Ltd., a Japanese corporation
发明人： Shunpei Yamazaki , Yasuhiko Takemura
IPC分类号： H01L029/788
CPC分类号： H01L27/11556 , H01L27/115
摘要： The present invention relates to a nonvolatile semiconductor vertical channel semiconductor device and a method of fabricating the same. The method starts with forming an insulator for device isolating having a depth D in a semiconductor substrate. The semiconductor substrate is etched with an etch depth d so that elevated portions are formed. A first conductive film is formed covering the elevated portions. After selectively and isotropically etched, the first conductive film is anisotropically etched so as to form floating gates on the side surfaces of the elevated portions. Sequently, a device insulating may be performed by selective oxidation technology. Further, a second conductive film is formed and anisotropically etched so that control gates are fabricated on the side surfaces of the elevated portions. In this case, forming a mask on predetermined regions of the elevated portions, the second conductive film may be etched to form gates of planar transistors or wirings. Then, a nonvolatile memory device is completed. If the depth D of the insulator and the etch depth d satisfy the following equation: D>d, a NAND circuit can be fabricated. Furthermore, a NAND circuit comprising planar MOS transistors for selective transistors and vertical channel transistors for memory cells may be manufactured.
摘要翻译：非易失性半导体垂直沟道半导体器件及其制造方法技术领域本发明涉及一种非易失性半导体垂直沟道半导体器件及其制造方法。该方法开始于在半导体衬底中形成具有深度D的器件隔离绝缘体。用蚀刻深度d蚀刻半导体衬底，从而形成升高的部分。形成覆盖升高部分的第一导电膜。在选择性和各向同性蚀刻之后，第一导电膜被各向异性蚀刻，以便在升高部分的侧表面上形成浮栅。接下来，可以通过选择性氧化技术进行绝缘的器件。此外，形成第二导电膜并各向异性蚀刻，使得控制栅极制造在升高部分的侧表面上。在这种情况下，在升高部分的预定区域上形成掩模，可以蚀刻第二导电膜以形成平面晶体管或布线的栅极。然后，完成非易失性存储装置。如果绝缘体的深度D和蚀刻深度d满足以下等式：D> d，则可以制造NAND电路。此外，可以制造包括用于选择性晶体管的平面MOS晶体管和用于存储单元的垂直沟道晶体管的NAND电路。

4. 发明申请

US20020197866A1 Fabrication method of a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20020197866A1
公开(公告)日：2002-12-26
申请号：US10176206
申请日：2002-06-18
申请人： Semiconductor Energy Laboratory Co. Ltd., a Japanese corporation
发明人： Shunpei Yamazaki , Hideomi Suzawa , Kunihiko Fukuchi
IPC分类号： H01L021/44
CPC分类号： H01L23/53223 , H01L21/2855 , H01L21/76843 , H01L21/76847 , H01L21/76882 , H01L23/53219 , H01L2924/0002 , Y10S438/933 , H01L2924/00
摘要： To form a wiring electrode having excellent contact function, in covering a contact hole formed in an insulting film, a film of a wiring material comprising aluminum or including aluminum as a major component is firstly formed and on top of the film, a film having an element belonging to 12 through 15 groups as a major component is formed and by carrying out a heating treatment at 400null C. for 0.5 through 2 hr in an atmosphere including hydrogen, the wiring material is provided with fluidity and firm contact is realized.
摘要翻译：为了形成具有优异接触功能的布线电极，在覆盖形成在绝缘膜中的接触孔时，首先形成包括铝或包括铝作为主要成分的布线材料的膜，并且在膜的顶部上形成具有形成属于12〜15组的元素作为主要成分，通过在包含氢的气氛中在400℃下进行0.5〜2小时的加热处理，配线材料具有流动性并且实现牢固的接触。

5. 发明申请

US20020121640A1 Active matrix electro-luminescent display with an organic leveling layer 失效
标题翻译：有源矩阵电致发光显示器与有机调平层
公开(公告)号：US20020121640A1
公开(公告)日：2002-09-05
申请号：US10137040
申请日：2002-04-30
申请人： Semiconductor Energy Laboratory Co., Ltd., a Japanese corporation
发明人： Shunpei Yamazaki
IPC分类号： H01L029/04
CPC分类号： H01L29/78633 , G02F1/136209 , G02F1/136227 , H01L27/12 , H01L27/1248
摘要： A resin material having a small relative dielectric constant is used as a layer insulation film 114. The resin material has a flat surface. A black matrix or masking film for thin film transistors is formed thereon using a metal material. Such a configuration prevents the problem of a capacity generated between the masking film and a thin film transistor.
摘要翻译：使用相对介电常数小的树脂材料作为层间绝缘膜114.树脂材料具有平坦的表面。使用金属材料在其上形成用于薄膜晶体管的黑色矩阵或掩模膜。这样的配置可以防止在掩模膜和薄膜晶体管之间产生的容量的问题。

6. 发明申请

US20020089755A1 Apparatus and method for laser radiation 有权
公开(公告)号：US20020089755A1
公开(公告)日：2002-07-11
申请号：US10024855
申请日：2001-12-18
申请人： Semiconductor Energy Laboratory Co., Ltd., a Japanese corporation
发明人： Shunpei Yamazaki , Satoshi Teramoto , Naoto Kusumoto , Koichiro Tanaka
IPC分类号： G02B027/10
CPC分类号： G02B19/0057 , B23K26/0613 , B23K26/067 , B23K26/0738 , G02B19/0014 , G02B19/0095 , G02B27/09 , G02B27/0905 , G02B27/0927 , G02B27/0961 , G02B27/0966 , H01L21/02532 , H01L21/02672 , H01L21/02678 , H01L21/02686 , H01L27/1285 , H01L27/1296
摘要： There is provided an improvement on homogeneity of annealing performed utilizing radiation of a laser beam on a silicon film having a large area. In a configuration wherein a linear laser beam is applied to a surface to be irradiated, optimization is carried out on the width and number of cylindrical lenses forming homogenizers 103 and 104 for controlling the distribution of radiation energy density in the longitudinal direction of the linear beam. For example, the width of the cylindrical lenses forming the homogenizers 103 and 104 is set in the range from 0.1 mm to 5 mm, and the number of the lenses is chosen such that one lens is provided for every 5 mm-15 mm along the length of the linear laser beam in the longitudinal direction thereof. This makes it possible to improve homogeneity of the radiation energy density of the linear laser in the longitudinal direction thereof.

7. 发明申请

US20020041341A1 PROJECTION TYPE COLOR IMAGE DISPLAY UNIT 失效
标题翻译：投影类型彩色图像显示单元
公开(公告)号：US20020041341A1
公开(公告)日：2002-04-11
申请号：US10014567
申请日：2001-12-11
申请人： Semiconductor Energy Laboratory Co., Ltd., a Japanese corporation
发明人： Shunpei Yamazaki
IPC分类号： H04N009/31 , H04N005/74
CPC分类号： H04N9/3182
摘要： In a projection type color display unit having three optical shutters formed on substrates corresponding to three primary colors, a color separation circuit and a digitalizing circuit are provided on each substrate having the optical shutter, and signals corresponding to the respective colors which are outputted from those three digitalizing circuits are compared with each other and arithmetically operated, to thereby reduce a noise.
摘要翻译：在具有形成在对应于三原色的基板上的三个光学快门的投影型彩色显示单元中，在具有光学快门的每个基板上设置色分离电路和数字化电路，以及对应于从那些输出的相应颜色的信号将三个数字化电路相互比较并进行算术运算，从而降低噪声。

8. 发明申请

US20020019147A1 Plasma CVD method 失效
标题翻译：等离子体CVD法
公开(公告)号：US20020019147A1
公开(公告)日：2002-02-14
申请号：US09917095
申请日：2001-07-26
申请人： Semiconductor Energy Laboratory Co., Ltd., a Japanese corporation
发明人： Shunpei Yamazaki , Mitsunori Sakama , Masaaki Hiroki
IPC分类号： H01L021/31
CPC分类号： H01L21/02164 , C23C16/401 , C23C16/402 , C23C16/505 , H01L21/02274 , H01L21/31608 , H01L21/31612 , H01L29/66757 , H01L29/78621
摘要： In a process of forming a silicon oxide film 116 that constitutes an interlayer insulating film with TEOS as a raw material through the plasma CVD method, the RF output is oscillated at 50 W, and the RF output is gradually increased from 50 W to 250 W (an output value at the time of forming a film) after discharging (after the generation of O2-plasma). A TEOS gas is supplied to start the film formation simultaneously when the RF output becomes 250 W, or while the timing is shifted. As a result, because the RF power supply is oscillated at a low output when starting discharging, a voltage between the RF electrodes can be prevented from changing transitionally and largely.
摘要翻译：在通过等离子体CVD法形成以TEOS为原料的层间绝缘膜形成氧化硅膜116的过程中，RF输出以50W振荡，RF输出从50W逐渐升高到250W （形成膜时的输出值）（放电后）（O 2等离子体生成后）。当RF输出变为250W时，或当定时偏移时，提供TEOS气体同时开始成膜。结果，由于在开始放电时RF电源以低输出振荡，因此可以防止RF电极之间的电压在很大程度上发生变化。

9. 发明申请

US20020014626A1 Substrate of semiconductor device and fabrication method thereof as well as semiconductor device and fabrication method thereof 失效
标题翻译：半导体器件的基板及其制造方法以及半导体器件及其制造方法
公开(公告)号：US20020014626A1
公开(公告)日：2002-02-07
申请号：US09953483
申请日：2001-09-14
申请人： Semiconductor Energy Laboratory Co., Ltd. a Japanese corporation
发明人： Setsuo Nakajima , Shunpei Yamazaki , Hisashi Ohtani , Satoshi Teramoto , Toshiji Hamatani
IPC分类号： H01L029/04 , H01L031/036
CPC分类号： H01L29/78603 , G02F1/13454 , H01L27/12 , H01L27/1248 , Y10S438/928
摘要： There are provided a substrate of a semiconductor device and a fabrication method thereof which allow to suppress impurity from turning around from a glass or quartz substrate in fabrication steps of a TFT. An insulating film is deposited so as to surround the glass substrate by means of reduced pressure thermal CVD. It allows to suppress the impurity from infiltrating from the glass substrate to an active region of the TFT in the later process.
摘要翻译：提供了一种半导体器件的衬底及其制造方法，其可以在TFT的制造步骤中抑制杂质从玻璃或石英衬底转向。沉积绝缘膜，以便通过减压热CVD围绕玻璃基板。这允许在稍后的工艺中抑制杂质从玻璃衬底渗透到TFT的有源区。

10. 发明申请

US20010007368A1 Semiconductor devices and manufacturing methods thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20010007368A1
公开(公告)日：2001-07-12
申请号：US09774427
申请日：2001-01-30
申请人： Semiconductor Energy Laboratory Co., Ltd.,a Japanese corporation
发明人： Shunpei Yamazaki , Takeshi Fukunaga
IPC分类号： H01L021/00 , G02F001/136 , H01L029/04 , H01L031/036 , H01L027/01 , H01L029/94 , H01L031/113 , H01L031/062 , H01L031/0376
CPC分类号： H01L29/78621 , H01L27/1222 , H01L27/127 , H01L2029/7863
摘要： In a circuit configuration comprising an n-channel thin-film transistor and a p-channel thin-film transistor integrally produced on a single substrate, a lightly-doped drain (LDD) region is formed selectively in the n-channel thin-film transistor, and damages to semiconductor layers caused when implanting impurity ions are balanced between the n- and p-channel thin-film transistors. This configuration achieves a balance between the n- and p-channel thin-film transistors and thereby provides high characteristics CMOS circuit.
摘要翻译：在包括在单个基板上整体制造的n沟道薄膜晶体管和p沟道薄膜晶体管的电路结构中，在n沟道薄膜晶体管中选择性地形成轻掺杂漏极（LDD）区域并且在注入杂质离子时引起的对半导体层的损伤在n沟道和p沟道薄膜晶体管之间平衡。该配置实现了n沟道和p沟道薄膜晶体管之间的平衡，从而提供了高特性CMOS电路。

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