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    • 3. 发明授权
    • Computer system with blade system and management server
    • 具有刀片系统和管理服务器的计算机系统
    • US08745425B2
    • 2014-06-03
    • US13122518
    • 2008-10-31
    • Yasuhiro KamedaHirofumi FujitaSatoshi OguniMorihide Nakaya
    • Yasuhiro KamedaHirofumi FujitaSatoshi OguniMorihide Nakaya
    • G06F1/26G06F1/32
    • G06F1/32G06F9/5088G06F9/5094Y02D10/22Y02D10/32
    • Provided is a computer system in which power consumption of the system can be reduced and which can smoothly supply data for a request from a client and avoid increase in a failure rate. In the computer system, by maintaining a power activation threshold for activating a stopping server blade and load balance threshold for assigning the request to a server blade, a server blade whose power is activated but to which the request from the client is not assigned is previously arranged. Priorities of the server blades are maintained, and are periodically changed or are changed in accordance with operation information such as total operation time and the number of times of activation/stop. Further, by maintaining the power activation threshold and a power stop threshold, possibilities of the unbalance among the activated/stopped server blades and frequent control of the activation/stop only in a part of server blades are avoided.
    • 提供了一种可以减少系统的功耗并且可以顺利地提供来自客户端的请求的数据并避免增加故障率的计算机系统。 在计算机系统中,通过维持用于激活停止服务器刀片的功率激活阈值和用于将请求分配给服务器刀片的负载平衡阈值,其功率已被激活但未被分配来自客户机的请求的服务器刀片 安排。 维护服务器刀片的优先级,并且根据诸如总操作时间和激活/停止次数的操作信息被周期性地改变或改变。 此外,通过维持功率激活阈值和停电阈值,可以避免仅在一部分服务器刀片中激活/停止的服务器刀片之间的不平衡的可能性和激活/停止的频繁控制。
    • 4. 发明申请
    • COMPUTER SYSTEM
    • 电脑系统
    • US20110252254A1
    • 2011-10-13
    • US13122518
    • 2008-10-31
    • Yasuhiro KamedaHirofumi FujitaSatoshi OguniMorihide Nakaya
    • Yasuhiro KamedaHirofumi FujitaSatoshi OguniMorihide Nakaya
    • G06F1/32
    • G06F1/32G06F9/5088G06F9/5094Y02D10/22Y02D10/32
    • Provided is a computer system in which power consumption of the system can be reduced and which can smoothly supply data for a request from a client and avoid increase in a failure rate. In the computer system, by maintaining a power activation threshold for activating a stopping server blade and load balance threshold for assigning the request to a server blade, a server blade whose power is activated but to which the request from the client is not assigned is previously arranged. Priorities of the server blades are maintained, and are periodically changed or are changed in accordance with operation information such as total operation time and the number of times of activation/stop. Further, by maintaining the power activation threshold and a power stop threshold, possibilities of the unbalance among the activated/stopped server blades and frequent control of the activation/stop only in a part of server blades are avoided.
    • 提供了一种可以减少系统的功耗并且可以顺利地提供来自客户端的请求的数据并避免增加故障率的计算机系统。 在计算机系统中,通过维持用于激活停止服务器刀片的功率激活阈值和用于将请求分配给服务器刀片的负载平衡阈值,其功率已被激活但未被分配来自客户机的请求的服务器刀片 安排。 维护服务器刀片的优先级,并且根据诸如总操作时间和激活/停止次数的操作信息被周期性地改变或改变。 此外,通过维持功率激活阈值和停电阈值,可以避免仅在一部分服务器刀片中激活/停止的服务器刀片之间的不平衡的可能性和激活/停止的频繁控制。
    • 6. 发明授权
    • Memory with sequential data transfer scheme
    • 具有顺序数据传输方案的存储器
    • US5600819A
    • 1997-02-04
    • US207744
    • 1994-03-09
    • Eiki KamadaSatoshi Oguni
    • Eiki KamadaSatoshi Oguni
    • G06F13/16G06F12/00G06F12/06G11C7/10
    • G11C7/1039
    • A memory array area of a semiconductor chip is divided into a plurality of partial memories. Each partial memory is provided with a register. The distance between adjacent registers is set shorter than a maximum distance which that data can travel in the memory in one data transfer cycle defined by a clock signal. These registers are serially connected and provides a path through which addresses, input data, and control signals are transferred to desired partial memories in synchronism with the clock signal. Output data and status signals are also transferred through these registers to a memory output terminal in synchronism with the clock signal.
    • 半导体芯片的存储器阵列区域被分成多个部分存储器。 每个部分存储器都配有一个寄存器。 相邻寄存器之间的距离设定为短于该数据可以在由时钟信号定义的一个数据传输周期内在存储器中行进的最大距离。 这些寄存器被串行连接,并且提供了与时钟信号同步地址,输入数据和控制信号被传送到期望的部分存储器的路径。 输出数据和状态信号也通过这些寄存器与时钟信号同步传送到存储器输出端。