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1. 发明申请

US20090153165A1 High Density Interconnect System Having Rapid Fabrication Cycle 失效
标题翻译：高密度互连系统具有快速制造周期
公开(公告)号：US20090153165A1
公开(公告)日：2009-06-18
申请号：US12354520
申请日：2009-01-15
申请人： Fu Chiung Chong , Andrew Kao , Douglas McKay , Anna Litza , Douglas Modlin , Sammy Mok , Nitin Parekh , Frank John Swiatowiec , Zhaohui Shan
发明人： Fu Chiung Chong , Andrew Kao , Douglas McKay , Anna Litza , Douglas Modlin , Sammy Mok , Nitin Parekh , Frank John Swiatowiec , Zhaohui Shan
IPC分类号： G01R31/02
CPC分类号： G01R31/02 , G01R1/073 , G01R1/07378 , G01R31/2889 , Y10T29/49117 , Y10T29/49222
摘要： An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.
摘要翻译：描述了改进的互连系统和方法，例如用于连接器，插座组件和/或探针卡系统。示例性系统包括用于建立到安装在探测器中的半导体晶片的电连接的探针卡接口组件（PCIA）。 PCIA包括平行于具有上表面和相对的下平面安装表面的半导体晶片的母板，由位于母板的下表面和晶片之间的至少三个点限定的参考平面，至少一个位于主板安装表面和用于调整参考平面相对于晶片的平面度的机构。具有从其延伸的多个弹簧探针的探针芯片可从PCIA安装和拆卸，而不需要进一步的平面度调节。互连结构和方法优选地提供改进的制造周期。

2. 发明申请

US20090064498A1 Membrane spring fabrication process 审中-公开
标题翻译：膜弹簧制造工艺
公开(公告)号：US20090064498A1
公开(公告)日：2009-03-12
申请号：US12288169
申请日：2008-10-16
申请人： Sammy Mok , Frank J. Swiatowiec
发明人： Sammy Mok , Frank J. Swiatowiec
IPC分类号： G01R3/00
CPC分类号： C23C26/00 , G01R1/0735 , G01R3/00 , H05K3/4092 , Y10T29/49204
摘要： Processes are described for building low compliance MEMS type C-spring probes in a coupon form that can be used as replaceable probes in probe card applications. The coupons have plated spring structures and a plated frame that holds a thin polyimide film in tension. The film keeps the probes and their tips of the top probes aligned to the pads of an IC being tested and the probes and tips of bottom probes aligned to the pads of a probe card high density interconnect that routes to an IC tester.
摘要翻译：描述了用于以优惠券形式构建低顺应性MEMS型C型弹簧探针的方法，可用作探针卡应用中的可替换探针。优惠券具有电镀弹簧结构和电镀框架，其保持薄的聚酰亚胺薄膜处于张力状态。该膜保持探头及其顶部探针的尖端与正在测试的IC的焊盘对齐，并将底部探针的探头和尖端与探针卡的焊盘对准高密度互连，从而路由至IC测试仪。

3. 发明授权

US07138818B2 Massively parallel interface for electronic circuit 失效
公开(公告)号：US07138818B2
公开(公告)日：2006-11-21
申请号：US11327728
申请日：2006-01-05
申请人： Fu Chiung Chong , Sammy Mok
发明人： Fu Chiung Chong , Sammy Mok
IPC分类号： G01R31/02
CPC分类号： G01R31/2863 , G01R1/06722 , G01R1/07342 , G01R3/00 , G01R31/2874 , G01R31/2889
摘要： Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form.

4. 发明申请

US20050051353A1 Massively parallel interface for electronic circuit 失效
标题翻译：大容量电子电路并联接口
公开(公告)号：US20050051353A1
公开(公告)日：2005-03-10
申请号：US10918511
申请日：2004-08-12
申请人： Fu Chong , Sammy Mok
发明人： Fu Chong , Sammy Mok
IPC分类号： G01R31/28 , H02G3/08
CPC分类号： G01R31/2863 , G01R1/06722 , G01R1/07342 , G01R3/00 , G01R31/2874 , G01R31/2889
摘要： Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form.
摘要翻译：公开了大量并行接口结构的几个实施例，其可以用于各种永久或临时应用中，例如用于互连集成电路（IC）以测试和老化设备，用于互连电子设备内的模块，用于互连计算机和其他外围设备，或用于互连其他电子电路。大规模并行接口结构的优选实施例提供大规模并行集成电路测试组件。大规模并行接口结构优选地使用一个或多个衬底来建立半导体晶片上的一个或多个集成电路与一个或多个测试模块之间的连接。中间基板上的一层或多层优选地包括MEMS和/或薄膜制造的弹簧探针。并联接口组件提供紧密的信号垫间距和柔顺性，并且优选地使用商业晶圆探测设备实现多个IC的并行测试或老化。在一些优选实施例中，并行接口组件结构包括可分离的标准电连接器部件，这降低了组装制造成本和制造时间。这些结构和组件能够以晶圆形式进行高速测试。

5. 发明申请

US20050042932A1 Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies 有权
标题翻译：集成电路晶圆探针卡组件的结构和制造工艺
公开(公告)号：US20050042932A1
公开(公告)日：2005-02-24
申请号：US10951314
申请日：2004-09-27
申请人： Sammy Mok , Fu Chong
发明人： Sammy Mok , Fu Chong
IPC分类号： G01R1/073 , G01R3/00 , G01R31/28 , H05K3/40 , H05K7/10 , H01R13/24
CPC分类号： G01R1/07371 , G01R1/07378 , G01R3/00 , G01R31/2886 , G01R31/2887 , H05K3/4092 , H05K7/1061
摘要： Several embodiments of integrated circuit probe card assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates. Interleaved spring probe tip designs are defined which allow multiple probe contacts on very small integrated circuit pads. The shapes of probe tips are preferably defined to control the depth of probe tip penetration between a probe spring and a pad or trace on an integrated circuit device. Improved protective coating techniques for spring probes are also disclosed, offering increased reliability and extended useful service lives for probe card assemblies.
摘要翻译：公开了集成电路探针卡组件的几个实施例，其延伸了MEMS和薄膜制造的探针的机械顺应性，使得这些类型的弹簧探针结构可用于测试半导体晶片上的一个或多个集成电路。公开了在商业晶片探测设备中提供紧密的信号垫间距顺应性和/或实现高水平并行测试的探针卡组件的几个实施例。在一些优选实施例中，探针卡组件结构包括可分离的标准部件，这降低了组装制造成本和制造时间。这些结构和组件能够以晶圆形式进行高速测试。这些探头还内置了集成电路和MEMS或薄膜制造的弹簧尖端和基板上的探针布局结构的机械保护。定义了交错的弹簧探针尖端设计，允许在非常小的集成电路板上进行多个探针接触。探针尖端的形状优选地被限定以控制探针尖端在探针弹簧和集成电路器件上的焊盘或迹线之间的深度的深度。还公开了用于弹簧探针的改进的保护涂层技术，为探针卡组件提供增加的可靠性和延长的有用的使用寿命。

6. 发明授权

US07812626B2 High density interconnect system for IC packages and interconnect assemblies 有权
标题翻译：用于IC封装和互连组件的高密度互连系统
公开(公告)号：US07812626B2
公开(公告)日：2010-10-12
申请号：US12546432
申请日：2009-08-24
申请人： Wilmer R. Bottoms , Fu Chiung Chong , Sammy Mok , Douglas Modlin
发明人： Wilmer R. Bottoms , Fu Chiung Chong , Sammy Mok , Douglas Modlin
IPC分类号： G01R31/02
CPC分类号： G01R1/06711 , G01R1/07342 , G01R3/00
摘要： An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.
摘要翻译：描述了改进的互连系统，例如用于电接触器和连接器，电子设备或模块封装组件，插座组件和/或探针卡组件系统。示例性连接器包括第一连接器结构，其包括具有接触表面和接合表面的接触器基板以及从探针表面延伸的一个或多个导电的微制造弹簧触头，第二连接器结构，包括至少一个基板，并具有设置在连接器表面上并对应于该组弹簧触点的至少一个导电接触垫，以及用于在至少第一位置和第二位置之间可移动地定位和对准第一连接器结构和第二连接器结构的装置，使得在至少一个位置中，至少一个导电微制造的弹簧触头电连接到至少一个导电接触垫。

7. 发明申请

US20100213960A1 Probe Card Test Apparatus And Method 失效
标题翻译：探针卡测试仪和方法
公开(公告)号：US20100213960A1
公开(公告)日：2010-08-26
申请号：US12682391
申请日：2008-10-10
申请人： Sammy Mok , Frank Swiatowiec , Fariborz Agahdel
发明人： Sammy Mok , Frank Swiatowiec , Fariborz Agahdel
IPC分类号： G01R31/02
CPC分类号： G01R31/2889 , G01R35/00
摘要： A probe card analyzer mounts on a probe card in a wafer prober and a use a fixture in the wafer probe and switch electronics in place of an ATE head. Methods of testing can confirm that probe cards are operating within their specifications over large temperature ranges and the mechanical force ranges seen in real manufacturing environments. This reduces the cost and improves the accuracy and speed of analyzing probe cards and improves diagnosing problems with probe cards.
摘要翻译：探针卡分析仪安装在晶片探针中的探针卡上，并使用晶片探针中的夹具和开关电子元件代替ATE头。测试方法可以确认探针卡在大温度范围内在其规格范围内运行，并且在实际制造环境中可以看到机械力范围。这降低了成本，提高了探针卡分析的准确性和速度，并提高了探针卡诊断的难度。

8. 发明申请

US20100066393A1 HIGH DENSITY INTERCONNECT SYSTEM FOR IC PACKAGES AND INTERCONNECT ASSEMBLIES 有权
标题翻译：用于IC封装和互连组件的高密度互连系统
公开(公告)号：US20100066393A1
公开(公告)日：2010-03-18
申请号：US12546432
申请日：2009-08-24
申请人： W. R. Bottoms , Fu Chiung Chong , Sammy Mok , Douglas Modlin
发明人： W. R. Bottoms , Fu Chiung Chong , Sammy Mok , Douglas Modlin
IPC分类号： G01R31/02
CPC分类号： G01R1/06711 , G01R1/07342 , G01R3/00
摘要： An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.
摘要翻译：描述了改进的互连系统，例如用于电接触器和连接器，电子设备或模块封装组件，插座组件和/或探针卡组件系统。示例性连接器包括第一连接器结构，其包括具有接触表面和接合表面的接触器基板以及从探针表面延伸的一个或多个导电的微制造弹簧触头，第二连接器结构，包括至少一个基板，并具有设置在连接器表面上并对应于该组弹簧触点的至少一个导电接触垫，以及用于在至少第一位置和第二位置之间可移动地定位和对准第一连接器结构和第二连接器结构的装置，使得在至少一个位置中，至少一个导电微制造的弹簧触头电连接到至少一个导电接触垫。

9. 发明授权

US07382142B2 High density interconnect system having rapid fabrication cycle 失效
标题翻译：具有快速制造周期的高密度互连系统
公开(公告)号：US07382142B2
公开(公告)日：2008-06-03
申请号：US11133021
申请日：2005-05-18
申请人： Fu Chiung Chong , Andrew Kao , Douglas McKay , Anna Litza , Douglas Modlin , Sammy Mok , Nitin Parekh , Frank John Swiatowiec , Zhaohui Shan
发明人： Fu Chiung Chong , Andrew Kao , Douglas McKay , Anna Litza , Douglas Modlin , Sammy Mok , Nitin Parekh , Frank John Swiatowiec , Zhaohui Shan
IPC分类号： G01R31/02
CPC分类号： G01R31/02 , G01R1/073 , G01R1/07378 , G01R31/2889 , Y10T29/49117 , Y10T29/49222
摘要： An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.
摘要翻译：描述了改进的互连系统和方法，例如用于连接器，插座组件和/或探针卡系统。示例性系统包括用于建立到安装在探测器中的半导体晶片的电连接的探针卡接口组件（PCIA）。 PCIA包括平行于具有上表面和相对的下平面安装表面的半导体晶片的母板，由位于母板的下表面和晶片之间的至少三个点限定的参考平面，至少一个位于主板安装表面和用于调整参考平面相对于晶片的平面度的机构。具有从其延伸的多个弹簧探针的探针芯片可从PCIA安装和拆卸，而不需要进一步的平面度调节。互连结构和方法优选地提供改进的制造周期。

10. 发明授权

US07247035B2 Enhanced stress metal spring contactor 有权
标题翻译：增强应力金属弹簧接触器
公开(公告)号：US07247035B2
公开(公告)日：2007-07-24
申请号：US10932552
申请日：2004-09-01
申请人： Sammy Mok , Fu Chiung Chong , Roman Milter
发明人： Sammy Mok , Fu Chiung Chong , Roman Milter
IPC分类号： H01R12/00 , H05K1/00
CPC分类号： G01R31/2889 , C23C18/00 , C25D7/00 , G01R1/06727 , G01R1/06755 , G01R1/07342 , G01R3/00 , G01R31/2863 , G01R31/2874 , H01L2924/01027 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H04L43/50 , H05K3/4092
摘要： Several embodiments of stress metal springs are disclosed, which typically comprise a plurality of stress metal layers that are established on a substrate, which are then controllably patterned and partially released from the substrate. An effective rotation angle is typically created in the formed stress metal springs, defining a looped spring structure. The formed springs provide high pitch compliant electrical contacts for a wide variety of interconnection systems, including chip scale semiconductor packages, high density interposer connectors, and probe contactors. Several embodiments of massively parallel interface integrated circuit test assemblies are also disclosed, comprising one or more substrates having stress metal spring contacts, to establish connections between one or more separated integrated circuits on a compliant wafer carrier.
摘要翻译：公开了应力金属弹簧的几个实施例，其通常包括建立在衬底上的多个应力金属层，然后可控制地构图并从衬底部分地释放衬底。通常在形成的应力金属弹簧中产生有效的旋转角度，从而限定环形弹簧结构。形成的弹簧为各种各样的互连系统提供高音调兼容的电触点，包括芯片级半导体封装，高密度插入器连接器和探针接触器。还公开了大规模并行接口集成电路测试组件的几个实施例，包括具有应力金属弹簧触点的一个或多个衬底，以在柔性晶片载体上建立一个或多个分离的集成电路之间的连接。

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