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1. 发明申请

WO2009008923A3 METHODS OF MAKING NANO-SCALE STRUCTURES HAVING CONTROLLED SIZE, NANOWIRE STRUCTURES AND METHODS OF MAKING THE NANOWIRE STRUCTURES 审中-公开
标题翻译：纳米结构纳米结构的制备方法，纳米结构和纳米结构的制备方法
公开(公告)号：WO2009008923A3
公开(公告)日：2009-08-20
申请号：PCT/US2008004423
申请日：2008-04-02
申请人： HEWLETT PACKARD DEVELOPMENT CO , KOBAYASHI NOBUHIKO , WU WEI , STEWART DUNCAN , SHARMA SHASHANK , WANG SHIH-YUAN , WILLIAMS R STANLEY
发明人： KOBAYASHI NOBUHIKO , WU WEI , STEWART DUNCAN , SHARMA SHASHANK , WANG SHIH-YUAN , WILLIAMS R STANLEY
IPC分类号： B82B3/00 , B82B1/00
CPC分类号： H01L31/035281 , B82Y10/00 , B82Y30/00 , H01L29/0665 , H01L29/0673 , H01L29/068 , H01L31/036 , H01L31/09 , H01L31/101 , H01L31/105 , Y02E10/50 , Y10S977/762 , Y10S977/814
摘要： Methods of making nanometer-scale semiconductor structures with controlled size are disclosed. Semiconductor structures (200, 300, 400, 500, 600. 700) that include one or ore nanowires (104, 204, 304, 404, 504, 604, 704) are also disclosed. The nanowires can include a passivation layer or have a hollow tube structure.
摘要翻译：公开了制造具有可控尺寸的纳米级半导体结构的方法。还公开了包括一个或多个纳米线（104,204,304,404,504,604,704）的半导体结构（200,300,400,500,600,700）。纳米线可以包括钝化层或具有中空管结构。

2. 发明申请

WO2009008923A2 METHODS OF MAKING NANO-SCALE STRUCTURES HAVING CONTROLLED SIZE, NANOWIRE STRUCTURES AND METHODS OF MAKING THE NANOWIRE STRUCTURES 审中-公开
标题翻译：制造具有控制尺寸的纳米尺度结构的方法，纳米结构和制备纳米结构的方法
公开(公告)号：WO2009008923A2
公开(公告)日：2009-01-15
申请号：PCT/US2008/004423
申请日：2008-04-02
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P. , KOBAYASHI, Nobuhiko , WU, Wei , STEWART, Duncan , SHARMA, Shashank , WANG, Shih-yuan , WILLIAMS, R. Stanley,
发明人： KOBAYASHI, Nobuhiko , WU, Wei , STEWART, Duncan , SHARMA, Shashank , WANG, Shih-yuan , WILLIAMS, R. Stanley,
CPC分类号： H01L31/035281 , B82Y10/00 , B82Y30/00 , H01L29/0665 , H01L29/0673 , H01L29/068 , H01L31/036 , H01L31/09 , H01L31/101 , H01L31/105 , Y02E10/50 , Y10S977/762 , Y10S977/814
摘要： Methods of making nanometer-scale semiconductor structures with controlled size are disclosed. Semiconductor structures (200, 300, 400, 500, 600. 700) that include one or ore nanowires (104, 204, 304, 404, 504, 604, 704) are also disclosed. The nanowires can include a passivation layer or have a hollow tube structure.
摘要翻译：公开了制备具有受控尺寸的纳米级半导体结构的方法。还公开了包括一个或纳米线（104,204,304,404,504,604,704）的半导体结构（200,300,400,500,600.707）。纳米线可以包括钝化层或具有中空管结构。

3. 发明申请

WO2007058909A2 METHOD OF CONTROLLING NANOWIRE GROWTH AND DEVICE WITH CONTROLLED-GROWTH NANOWIRE 审中-公开
标题翻译：控制生长的纳米生长方法和装置
公开(公告)号：WO2007058909A2
公开(公告)日：2007-05-24
申请号：PCT/US2006/043688
申请日：2006-11-08
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P. , WU, Wei , KAMINS, Theodore I, , SHARMA, Shashank , WILLIAMS, R Stanley,
发明人： WU, Wei , KAMINS, Theodore I, , SHARMA, Shashank , WILLIAMS, R Stanley,
IPC分类号： H01L23/532 , H01L21/768 , B82B3/00
CPC分类号： H01L21/76879 , H01L21/28525 , H01L23/53276 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： Nanowire (260, 360) growth in situ on a planar surface, which is one of a crystalline surface having any crystal orientation, a polycrystalline surface and a non-crystalline surface, is controlled by guiding (160) catalyzed growth from the planar surface in a nano-throughhole (224, 324) of a patterned layer (220, 320) formed on the planar surface, such that the nanowire (260, 360) grows in situ perpendicular to the planar surface. An electronic device (200, 300) includes first and second regions of electronic circuitry (280, 370, 380) vertically spaced by the patterned layer (220, 320). The nano-throughhole (224, 324) of the patterned layer (220, 320) extends perpendicularly between the regions. The first region (324, 376) has the planar surface. The device (200, 300) further includes a nanowire (260, 360) extending perpendicular from a catalyst location on the planar surface of the first region (374, 376) in the nano-throughhole (224, 324). The nanowire (260, 360) forms a component of a nano-scale circuit that connects the regions.
摘要翻译：通过从平坦表面引导（160）催化生长来控制在平坦表面上原位生长的纳米线（260,360），其是具有任何晶体取向，多晶表面和非结晶表面的晶体表面之一，形成在所述平面表面上的图案化层（220,320）的纳米通孔（224,324），使得所述纳米线（260,360）垂直于所述平面表面原位生长。电子设备（200,300）包括由图案化层（220,320）垂直间隔开的电子电路（280,370,380）的第一和第二区域。图案化层（220,320）的纳米通孔（224,324）在区域之间垂直延伸。第一区域（324,376）具有平坦表面。装置（200,300）还包括从纳米通孔（224,324）中的第一区域（374,386）的平坦表面上的催化剂位置垂直延伸的纳米线（260,360）。纳米线（260,360）形成连接这些区域的纳米级电路的部件。

4. 发明申请

WO2008121172A2 ELECTRODE ISOLATION METHOD AND NANOWIRE-BASED DEVICE HAVING ISOLATED ELECTRODE PAIR 审中-公开
标题翻译：电极隔离方法和具有隔离电极对的基于纳米级的器件
公开(公告)号：WO2008121172A2
公开(公告)日：2008-10-09
申请号：PCT/US2008/000578
申请日：2008-01-16
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P. , SHARMA, Shashank , KAMINS, Theodore, I.
发明人： SHARMA, Shashank , KAMINS, Theodore, I.
IPC分类号： H01L21/20
CPC分类号： H01L29/045 , A01H5/10 , B81C1/00095 , B82Y10/00 , H01L21/02381 , H01L21/02433 , H01L21/02521 , H01L21/02603 , H01L21/02609 , H01L21/02639 , H01L21/02645 , H01L21/02647 , H01L21/02653 , H01L21/28525 , H01L21/76838 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： Methods (100) of creating isolated electrodes and integrating (600) a nanowire there between each employ laterial epitaxial of a overgrowth of a semiconductor material on a semiconductor layer (210) to form isolated electrodes (260, 270) having the same crystal orientation. The methods (100, 600) include selective epitaxial growth (140) of a semiconductor feature (250) through a window (242) in an insulating film (240) on the semiconductor layer. A vertical stem (252) is in contact with the semiconductor layer through the window and a ledge (254) is a lateral epitaxial overgrowth of the vertical stem on the insulating film. The methods further include creating (160) a pair of isolated electrodes (260, 270) from the semiconductor feature and the semiconductor layer. A nanowire-based device (800) includes the pair of isolated electrodes and a nanowire (280) bridging between respective surfaces of the isolated electrodes of the pair.
摘要翻译：产生隔离电极并在其间整合（600）纳米线的方法（100）在半导体层（210）上的半导体材料的过度生长之间进行材料外延以形成具有相同晶体取向的隔离电极（260,270）。方法（100,600）包括通过半导体层上的绝缘膜（240）中的窗口（242）的半导体特征（250）的选择性外延生长（140）。垂直杆（252）通过窗口与半导体层接触，并且凸缘（254）是垂直杆在绝缘膜上的横向外延过度生长。所述方法还包括从半导体特征和半导体层产生（160）一对隔离电极（260,270）。基于纳米线的器件（800）包括一对隔离电极和在该对的隔离电极的各个表面之间桥接的纳米线（280）。

5. 发明申请

WO2007058909A3 METHOD OF CONTROLLING NANOWIRE GROWTH AND DEVICE WITH CONTROLLED-GROWTH NANOWIRE 审中-公开
标题翻译：控制生长纳米线的纳米线生长和器件的控制方法
公开(公告)号：WO2007058909A3
公开(公告)日：2007-07-26
申请号：PCT/US2006043688
申请日：2006-11-08
申请人： HEWLETT PACKARD DEVELOPMENT CO , WU WEI , KAMINS THEODORE I , SHARMA SHASHANK , WILLIAMS R STANLEY
发明人： WU WEI , KAMINS THEODORE I , SHARMA SHASHANK , WILLIAMS R STANLEY
IPC分类号： H01L21/283 , H01L21/768 , H01L23/52
CPC分类号： H01L21/76879 , H01L21/28525 , H01L23/53276 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： Nanowire (260, 360) growth in situ on a planar surface, which is one of a crystalline surface having any crystal orientation, a polycrystalline surface and a non-crystalline surface, is controlled by guiding (160) catalyzed growth from the planar surface in a nano-throughhole (224, 324) of a patterned layer (220, 320) formed on the planar surface, such that the nanowire (260, 360) grows in situ perpendicular to the planar surface. An electronic device (200, 300) includes first and second regions of electronic circuitry (280, 370, 380) vertically spaced by the patterned layer (220, 320). The nano-throughhole (224, 324) of the patterned layer (220, 320) extends perpendicularly between the regions. The first region (324, 376) has the planar surface. The device (200, 300) further includes a nanowire (260, 360) extending perpendicular from a catalyst location on the planar surface of the first region (374, 376) in the nano-throughhole (224, 324). The nanowire (260, 360) forms a component of a nano-scale circuit that connects the regions.
摘要翻译：在具有任何晶体取向的晶体表面，多晶表面和非晶体表面之一的平面表面上原位生长的纳米线（260,360）通过引导（160）来自平面表面的催化生长来控制形成在所述平坦表面上的图案化层（220,320）的纳米通孔（224,324），使得所述纳米线（260,360）垂直于所述平坦表面原位生长。电子设备（200,300）包括由图案化层（220,320）垂直间隔开的电子电路（280,370,380）的第一和第二区域。图案化层（220,320）的纳米通孔（224,324）在区域之间垂直延伸。第一区域（324,376）具有平坦表面。装置（200,300）还包括从纳米通孔（224,324）中的第一区域（374,376）的平坦表面上的催化剂位置垂直延伸的纳米线（260,360）。纳米线（260,360）形成连接区域的纳米级电路的组件。

6. 发明申请

WO2006137860A3 REDUCTION OF A FEATURE DIMENSION IN A NANO-SCALE DEVICE 审中-公开
标题翻译：减少纳米尺度设备中的特征尺寸
公开(公告)号：WO2006137860A3
公开(公告)日：2007-04-19
申请号：PCT/US2005032910
申请日：2005-09-13
申请人： HEWLETT PACKARD DEVELOPMENT CO , SHARMA SHASHANK
发明人： SHARMA SHASHANK
IPC分类号： B81C1/00 , G03F7/00
CPC分类号： G03F7/0002 , B81C99/009 , B81C2201/0153 , B82Y10/00 , B82Y40/00 , Y10T428/31612
摘要： Nano-scale devices (200', 300) and methods (100) provide reduced feature dimensions of features on the devices. A surface of a device substrate (202, 202', 302, 302a) having a pattern of spaced apart first nanowires (202, 202', 304) is consumed (110), such that a dimension of the first nanowires (202', 304) is reduced (100). A second nanowire (224, 324) is formed in a trench or gap (306) between adjacent ones of the first nanowires (202, 202', 304), such that the nano-scale device includes a set of features that includes the first nanowires (202', 304) with the reduced dimension and the second nanowire (224, 324) spaced from the adjacent first nanowires by sub-trenches (226, 326).
摘要翻译：纳米级设备（200'，300）和方法（100）提供了设备上特征的减小的特征尺寸。具有间隔开的第一纳米线（202,202'，304）的图案的器件衬底（202,202'，302,302a）的表面被消耗（110），使得第一纳米线（202'，302） 304）减少（100）。第二纳米线（224,324）形成在相邻的第一纳米线（202,202'，304）之间的沟槽或间隙（306）中，使得纳米级器件包括一组特征，其包括第一纳米线具有减小的尺寸的纳米线（202'，304）和通过子沟槽（226,326）与相邻的第一纳米线间隔开的第二纳米线（224,324）。

7. 发明申请

WO2006137860A2 REDUCTION OF A FEATURE DIMENSION IN A NANO-SCALE DEVICE 审中-公开
标题翻译：减少纳米尺度设备中的特征尺寸
公开(公告)号：WO2006137860A2
公开(公告)日：2006-12-28
申请号：PCT/US2005/032910
申请日：2005-09-13
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , SHARMA, Shashank
发明人： SHARMA, Shashank
IPC分类号： B81C1/00
CPC分类号： G03F7/0002 , B81C99/009 , B81C2201/0153 , B82Y10/00 , B82Y40/00 , Y10T428/31612
摘要： Nano-scale devices (200', 300) and methods (100) provide reduced feature dimensions of features on the devices. A surface of a device substrate (202, 202', 302, 302a) having a pattern of spaced apart first nanowires (202, 202', 304) is consumed (110), such that a dimension of the first nanowires (202', 304) is reduced (100). A second nanowire (224, 324) is formed in a trench or gap (306) between adjacent ones of the first nanowires (202, 202', 304), such that the nano-scale device includes a set of features that includes the first nanowires (202', 304) with the reduced dimension and the second nanowire (224, 324) spaced from the adjacent first nanowires by sub-trenches (226, 326).
摘要翻译：纳米级设备（200'，300）和方法（100）提供了设备上特征的减小的特征尺寸。具有间隔开的第一纳米线（202,202'，304）的图案的器件衬底（202,202'，302,302a）的表面被消耗（110），使得第一纳米线（202'，302） 304）减少（100）。第二纳米线（224,324）形成在相邻的第一纳米线（202,202'，304）之间的沟槽或间隙（306）中，使得纳米级器件包括一组特征，其包括第一纳米线具有减小的尺寸的纳米线（202'，304）和通过子沟槽（226,326）与相邻的第一纳米线间隔开的第二纳米线（224,324）。

8. 发明申请

WO2005062384A3 METHOD OF FORMING BRIDGING LATERAL NANOWIRES AND DEVICE MANUFACTURED THEREBY 审中-公开
标题翻译：形成桥梁纳米线的方法及其制造的器件
公开(公告)号：WO2005062384A3
公开(公告)日：2005-09-15
申请号：PCT/US2004040597
申请日：2004-12-03
申请人： HEWLETT PACKARD DEVELOPMENT CO , ISLAM M SAIFUL , KAMINS THEODORE I , SHARMA SHASHANK
发明人： ISLAM M SAIFUL , KAMINS THEODORE I , SHARMA SHASHANK
IPC分类号： D01F9/127 , H01L21/768 , H01L23/532 , H01L51/30
CPC分类号： G11C13/025 , B82Y10/00 , B82Y30/00 , G11C2213/16 , G11C2213/17 , H01L21/76838 , H01L23/53271 , H01L2221/1094 , H01L2924/0002 , Y10S977/721 , Y10S977/742 , H01L2924/00
摘要： A semiconductor nanowire (162, 660) is grown laterally. A method of growing (100) the nanowire forms (120) a vertical surface (118a, 118b, 610, 620) on a substrate (102, 630, 690), and activates (130) the vertical surface with a nanoparticle catalyst (160, 640, 642). A method of laterally bridging (200) the nanowire grows (210) the nanaowire from the activated vertical surface to connect to an opposite vertical surface (118a, 118b, 610, 620) on the substrate. A method of connecting (300) electrodes (610, 620) of a semiconductor device (600) grows (330) the nanowire from an activated (320) device electrode to an opposing device electrode. A method of bridging (400) semiconductor nanowires grows (410, 420, 430) nanowires between an electrode pairs opposing lateral directions. A method of self-assembling (500) the nanowire bridges (530) the nanowire between an activated electrode pair. A method of controlling nanowire growth forms a surface irregularity (170) in the vertical surface. An electronic device (600) includes a laterally grown nano-scale interconnection (660).
摘要翻译：横向生长半导体纳米线（162,660）。在衬底（102,630,690）上生长（100）纳米线形成（120）垂直表面（118a，118b，610,620）的方法，并用纳米颗粒催化剂（160）激活垂直表面（130），640,642）。横向桥接（200）纳米线的方法从激活的垂直表面生长（210）纳米线，以连接到衬底上的相对的垂直表面（118a，118b，610,620）。连接（300）半导体器件（600）的电极（610,620）的方法从纳米线从激活的（320）器件电极生长（330）到相对的器件电极。桥接（400）半导体纳米线的方法在相对于横向方向的电极对之间生长（410,420,430）纳米线。一种在活化电极对之间自组装（500）纳米线桥（530）纳米线的方法。控制纳米线生长的方法在垂直表面形成表面不规则（170）。电子设备（600）包括横向生长的纳米级互连（660）。

9. 发明申请

WO2012099700A1 DEPOSITION SYSTEMS AND PROCESSES 审中-公开
标题翻译：沉积系统和工艺
公开(公告)号：WO2012099700A1
公开(公告)日：2012-07-26
申请号：PCT/US2011/068267
申请日：2011-12-31
申请人： SOLEXEL, INC. , KRAMER, Karl-Josef , MOSLEHI, Mehrdad, M. , YOKOI, Seiichi , KAMIAN, George, D. , SHARMA, Shashank , ASHJAEE, Jay
发明人： KRAMER, Karl-Josef , MOSLEHI, Mehrdad, M. , YOKOI, Seiichi , KAMIAN, George, D. , SHARMA, Shashank , ASHJAEE, Jay
IPC分类号： H01L21/205 , H01L21/20
CPC分类号： C23C16/45502 , C23C16/4412 , C23C16/45517 , C23C16/4582 , C23C16/4583 , C23C16/4587 , C23C16/481 , C30B25/12 , C30B25/14 , C30B29/06
摘要： This disclosure enables gas recovery and utilization for use in deposition systems and processes. The system includes a thin-film semiconductor layer deposition system comprising a deposition reactor, precursor gas feeds, and a gas recovery system.
摘要翻译：本公开使得气体回收和利用可用于沉积系统和工艺。该系统包括薄膜半导体层沉积系统，其包括沉积反应器，前体气体进料和气体回收系统。

10. 发明申请

WO2008121172A3 ELECTRODE ISOLATION METHOD AND NANOWIRE-BASED DEVICE HAVING ISOLATED ELECTRODE PAIR 审中-公开
标题翻译：具有隔离电极对的电极隔离方法和基于纳米线的装置
公开(公告)号：WO2008121172A3
公开(公告)日：2008-11-27
申请号：PCT/US2008000578
申请日：2008-01-16
申请人： HEWLETT PACKARD DEVELOPMENT CO , SHARMA SHASHANK , KAMINS THEODORE I
发明人： SHARMA SHASHANK , KAMINS THEODORE I
IPC分类号： H01L21/20
CPC分类号： H01L29/045 , A01H5/10 , B81C1/00095 , B82Y10/00 , H01L21/02381 , H01L21/02433 , H01L21/02521 , H01L21/02603 , H01L21/02609 , H01L21/02639 , H01L21/02645 , H01L21/02647 , H01L21/02653 , H01L21/28525 , H01L21/76838 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： Methods (100) of creating isolated electrodes and integrating (600) a nanowire there between each employ laterial epitaxial of a overgrowth of a semiconductor material on a semiconductor layer (210) to form isolated electrodes (260, 270) having the same crystal orientation. The methods (100, 600) include selective epitaxial growth (140) of a semiconductor feature (250) through a window (242) in an insulating film (240) on the semiconductor layer. A vertical stem (252) is in contact with the semiconductor layer through the window and a ledge (254) is a lateral epitaxial overgrowth of the vertical stem on the insulating film. The methods further include creating (160) a pair of isolated electrodes (260, 270) from the semiconductor feature and the semiconductor layer. A nanowire-based device (800) includes the pair of isolated electrodes and a nanowire (280) bridging between respective surfaces of the isolated electrodes of the pair.
摘要翻译：制造隔离电极并在其间集成（600）纳米线的方法（100）均采用半导体层（210）上的半导体材料的过度生长的外延外延以形成具有相同晶体取向的隔离电极（260,270）。方法（100,600）包括通过半导体层上的绝缘膜（240）中的窗口（242）的半导体特征（250）的选择性外延生长（140）。垂直杆（252）通过窗口与半导体层接触，凸缘（254）是绝缘膜上垂直杆的侧向外延过生长。该方法还包括从半导体特征和半导体层产生（160）一对隔离电极（260,270）。基于纳米线的器件（800）包括一对隔离电极和桥接在该对隔离电极的相应表面之间的纳米线（280）。

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