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1. 发明申请

US20070240137A1 Method of compiling source code 失效
标题翻译：编译源代码的方法
公开(公告)号：US20070240137A1
公开(公告)日：2007-10-11
申请号：US11402556
申请日：2006-04-11
申请人： Roch Archambault , Shimin Cui , Yaoqing Gao , Raul Silvera
发明人： Roch Archambault , Shimin Cui , Yaoqing Gao , Raul Silvera
IPC分类号： G06F9/45
CPC分类号： G06F8/4442
摘要： A method of compiling source code. The method includes converting pointer-based access in the source code to array-based access in the source code in a first pass compilation of the source code. Information is collected for objects in the source code during the first pass compilation. Candidate objects in the source code are selected based on the collected information to form selected candidate objects. Global stride variables are created for the selected candidate objects. Memory allocation operations are updated for the selected candidate objects in a second pass compilation of the source code. Multiple-level pointer indirect references are replaced in the source code with multi-dimensional array indexed references for the selected candidate objects in the second pass compilation of the source code.
摘要翻译：一种编译源代码的方法。该方法包括在源代码的第一遍编译中将源代码中的基于指针的访问转换为源代码中的基于数组的访问。在第一次编译期间，为源代码中的对象收集信息。基于收集的信息来选择源代码中的候选对象以形成所选择的候选对象。为所选候选对象创建全局步幅变量。在源代码的第二遍编译中，针对所选候选对象更新内存分配操作。在源代码的第二遍编译中，多级指针间接引用被替换为所选候选对象的多维数组索引引用的源代码。

2. 发明申请

US20060048103A1 Method and apparatus for improving data cache performance using inter-procedural strength reduction of global objects 失效
公开(公告)号：US20060048103A1
公开(公告)日：2006-03-02
申请号：US10930037
申请日：2004-08-30
申请人： Roch Archambault , Shimin Cui , Yaoqing Gao , Raul Silvera
发明人： Roch Archambault , Shimin Cui , Yaoqing Gao , Raul Silvera
IPC分类号： G06F9/44
CPC分类号： G06F8/4442
摘要： Inter-procedural strength reduction is provided by a mechanism of the present invention to improve data cache performance. During a forward pass, the present invention collects information of global variables and analyzes the usage pattern of global objects to select candidate computations for optimization. During a backward pass, the present invention remaps global objects into smaller size new global objects and generates more cache efficient code by replacing candidate computations with indirect or indexed reference of smaller global objects and inserting store operations to the new global objects for each computation that references the candidate global objects.

3. 发明申请

US20050246700A1 Compiler with cache utilization optimizations 失效
标题翻译：具有缓存利用率优化的编译器
公开(公告)号：US20050246700A1
公开(公告)日：2005-11-03
申请号：US10835756
申请日：2004-04-30
申请人： Roch Archambault , Robert Blainey , Yaoqing Gao
发明人： Roch Archambault , Robert Blainey , Yaoqing Gao
IPC分类号： G06F9/45
CPC分类号： G06F8/4442
摘要： A compiling program with cache utilization optimizations employs an inter-procedural global analysis of the data access patterns of compile units to be processed. The global analysis determines sufficient information to allow intelligent application of optimization techniques to be employed to enhance the operation and utilization of the available cache systems on target hardware.
摘要翻译：具有缓存利用率优化的编译程序采用对要处理的编译单元的数据访问模式的跨过程全局分析。全局分析确定足够的信息，以允许智能应用优化技术来增强目标硬件上可用的高速缓存系统的操作和利用。

4. 发明申请

US20050149903A1 Scalable runtime system for global address space languages on shared and distributed memory machines 有权
标题翻译：可扩展运行时系统，用于共享和分布式内存机器上的全局地址空间语言
公开(公告)号：US20050149903A1
公开(公告)日：2005-07-07
申请号：US10734690
申请日：2003-12-12
申请人： Roch Archambault , Anthony Bolmarcich , G. Calin Cascaval , Siddhartha Chatterjee , Maria Eleftheriou , Raymond Mak
发明人： Roch Archambault , Anthony Bolmarcich , G. Calin Cascaval , Siddhartha Chatterjee , Maria Eleftheriou , Raymond Mak
IPC分类号： G06F9/44 , G06F9/50
CPC分类号： G06F9/5016
摘要： An improved scalability runtime system for a global address space language running on a distributed or shared memory machine uses a directory of shared variables having a data structure for tracking shared variable information that is shared by a plurality of program threads. Allocation and de-allocation routines are used to allocate and de-allocate shared variable entries in the directory of shared variables. Different routines can be used to access different types of shared data. A control structure is used to control access to the shared data such that all threads can access the data at any time. Since all threads see the same objects, synchronization issues are eliminated. In addition, the improved efficiency of the data sharing allows the number of program threads to be vastly increased.
摘要翻译：用于在分布式或共享存储器机器上运行的全局地址空间语言的改进的可扩展性运行时系统使用具有用于跟踪由多个程序线程共享的共享变量信息的数据结构的共享变量的目录。分配和解除分配例程用于在共享变量目录中分配和取消分配共享变量条目。可以使用不同的例程来访问不同类型的共享数据。控制结构用于控制对共享数据的访问，以便所有线程可以随时访问数据。由于所有线程都看到相同的对象，因此消除了同步问题。另外，提高数据共享的效率使得程序线程的数量大大增加。

5. 发明申请

US20060048118A1 Method and apparatus for optimizing code with artificial statements 审中-公开
标题翻译：用人造语句优化代码的方法和装置
公开(公告)号：US20060048118A1
公开(公告)日：2006-03-02
申请号：US10930041
申请日：2004-08-30
申请人： Roch Archambault , Peng Zhao
发明人： Roch Archambault , Peng Zhao
IPC分类号： G06F9/45
CPC分类号： G06F8/443
摘要： A method, apparatus, and computer instructions for facilitating optimization of code. An artificial statement is placed into the code. The artificial statement encodes information. The code is optimized with a compiler. The compiler performs an action based on the artificial statement in the code.
摘要翻译：一种用于促进代码优化的方法，装置和计算机指令。代码中放置了一个人工语句。人工语句对信息进行编码。代码使用编译器进行了优化。编译器根据代码中的人工语句执行一个操作。

6. 发明申请

US20060048117A1 Method and apparatus for optimizing software program using inter-procedural strength reduction 失效
标题翻译：使用程序间强度降低优化软件程序的方法和装置
公开(公告)号：US20060048117A1
公开(公告)日：2006-03-02
申请号：US10930038
申请日：2004-08-30
申请人： Roch Archambault , Shimin Cui , Raul Silvera
发明人： Roch Archambault , Shimin Cui , Raul Silvera
IPC分类号： G06F9/45
CPC分类号： G06F8/443
摘要： Inter-procedural strength reduction is provided by a mechanism of the present invention to optimize software program. During a forward pass, the present invention collects information of global variables and analyzes the information to select candidate computations for optimization. During a backward pass, the present invention replaces costly computations with less costly or weaker computations using pre-computed values and inserts store operations of new global variables to pre-compute the costly computations at definition points of the global variables used in the costly computations.
摘要翻译：通过本发明的机制来优化软件程序来提供程序间强度降低。在正向通过期间，本发明收集全局变量的信息并分析该信息以选择用于优化的候选计算。在反向传递期间，本发明使用预先计算的值替代使用成本较低或较弱计算的昂贵的计算，并插入新的全局变量的存储操作，以在昂贵的计算中使用的全局变量的定义点处预先计算昂贵的计算。

7. 发明申请

US20050268039A1 Aggregate bandwidth through store miss management for cache-to-cache data transfer 失效
标题翻译：通过存储管理缓存到缓存数据传输的聚合带宽
公开(公告)号：US20050268039A1
公开(公告)日：2005-12-01
申请号：US10853304
申请日：2004-05-25
申请人： Roch Archambault , Robert Blainey , Yaoging Gao , Randall Heisch , Steven White
发明人： Roch Archambault , Robert Blainey , Yaoging Gao , Randall Heisch , Steven White
IPC分类号： G06F9/30 , G06F9/312 , G06F9/38 , G06F12/00 , G06F12/08
CPC分类号： G06F12/0833 , G06F9/30047 , G06F9/3455 , G06F9/383
摘要： A method and system for reducing or avoiding store misses with a data cache block zero (DCBZ) instruction in cooperation with the underlying hardware load stream prefetching support for helping to increase effective aggregate bandwith. The method identifies and classifies unique streams in a loop based on dependency and reuse analysis, and performs loop transformations, such as node splitting, loop distribution or stream unrolling to get the proper number of streams. Static prediction and run-time profile information are used to guide loop and stream selection. Compile-time loop cost analysis and run-time check code and versioning are used to determine the number of cache lines ahead of each reference for data cache line zeroing and to tolerate required data alignment relative to data cache lines.
摘要翻译：与底层硬件负载流预取支持协作，通过数据缓存块零（DCBZ）指令减少或避免存储错误的方法和系统，以帮助增加有效的聚合带宽。该方法基于依赖和重用分析在循环中识别和分类唯一流，并执行循环转换，例如节点分割，循环分布或流展开以获得适当数量的流。静态预测和运行时间轮廓信息用于指导循环和流选择。编译时循环成本分析和运行时检查代码和版本控制用于确定数据高速缓存行归零的每个引用之前的高速缓存行数，并允许相对于数据高速缓存行的所需数据对齐。

8. 发明申请

US20080028381A1 OPTIMIZING SOURCE CODE FOR ITERATIVE EXECUTION 审中-公开
标题翻译：优化源代码进行迭代执行
公开(公告)号：US20080028381A1
公开(公告)日：2008-01-31
申请号：US11870121
申请日：2007-10-10
申请人： ROCH ARCHAMBAULT , ROBERT BLAINEY , CHARLES HALL , YINGWEI ZHANG
发明人： ROCH ARCHAMBAULT , ROBERT BLAINEY , CHARLES HALL , YINGWEI ZHANG
IPC分类号： G06F9/45
CPC分类号： G06F8/4441
摘要： An embodiment of the present invention provides an optimizer for optimizing source code to generate optimized source code having instructions for instructing a central processing unit (CPU) to iteratively compute values for a primary recurrence element. A computer programmed loop for computing the primary recurrence element and subsequent recurrence elements is an example of a case involving iteratively computing the primary recurrence element. The CPU is operatively coupled to fast operating memory (FOM) and operatively coupled to slow operating memory (SOM). SOM stores the generated optimized source code. The optimized source code includes instructions for instructing said CPU to store a computed value of the primary recurrence element in a storage location of FOM. The instructions also includes instructions to consign the computed value of the primary recurrence element from the storage location to another storage location of the FOM.
摘要翻译：本发明的一个实施例提供一种用于优化源代码以产生优化的源代码的优化器，其具有用于指示中央处理单元（CPU）迭代地计算初级重复元件的值的指令。用于计算主要递归元素和随后的递归元素的计算机编程回路是涉及迭代地计算主要复发元素的情况的示例。 CPU可操作地耦合到快速操作存储器（FOM）并且可操作地耦合到慢速操作存储器（SOM）。 SOM存储生成的优化源代码。优化的源代码包括用于指示所述CPU将计算的主循环元素的值存储在FOM的存储位置中的指令。指令还包括将计算的主循环元素的值从存储位置委托给FOM的另一个存储位置的指令。

9. 发明申请

US20070088915A1 Method and apparatus for software-assisted data cache and prefetch control 有权
标题翻译：用于软件辅助数据缓存和预取控制的方法和装置
公开(公告)号：US20070088915A1
公开(公告)日：2007-04-19
申请号：US11250054
申请日：2005-10-13
申请人： Roch Archambault , Yaoqing Gao , Francis O' Connell , Robert Tremaine , Michael Wazlowski , Steven White , Lixin Zhang
发明人： Roch Archambault , Yaoqing Gao , Francis O' Connell , Robert Tremaine , Michael Wazlowski , Steven White , Lixin Zhang
IPC分类号： G06F13/00
CPC分类号： G06F9/3879 , G06F8/4442 , G06F9/30047 , G06F9/3455 , G06F12/0862 , G06F2212/6028
摘要： The present invention provides a computer implemented method, apparatus, and computer usable program code for compiling instructions to manage a cache system. Loop constructs are analyzed to identify data usage characteristics for cache and prefetching conditions in instructions to form identified prefetch conditions. A set of control instructions are inserted into the instructions based on the data usage characteristics and the identified prefetch conditions to form multiple modified instructions. The set of multiple modified instructions are compiled to generate code for execution to form compiled instructions. The set of control instructions in the compiled instructions form a cache management policy to control movement of data in a memory system during execution of the compiled instructions.
摘要翻译：本发明提供了一种用于编译用于管理高速缓存系统的指令的计算机实现的方法，装置和计算机可用程序代码。分析循环结构以识别指令中的缓存和预取条件的数据使用特征以形成识别的预取条件。基于数据使用特性和识别的预取条件将一组控制指令插入到指令中以形成多个修改的指令。编译多组修改指令的集合以生成用于执行的代码以形成编译指令。编译指令中的一组控制指令形成高速缓存管理策略以在执行编译指令期间控制存储器系统中数据的移动。

10. 发明授权

US07380086B2 Scalable runtime system for global address space languages on shared and distributed memory machines 有权
标题翻译：可扩展运行时系统，用于共享和分布式内存机器上的全局地址空间语言
公开(公告)号：US07380086B2
公开(公告)日：2008-05-27
申请号：US10734690
申请日：2003-12-12
申请人： Roch Archambault , Anthony Simon Bolmarcich , G. Calin Cascaval , Siddhartha Chatterjee , Maria Eleftheriou , Raymond Mak
发明人： Roch Archambault , Anthony Simon Bolmarcich , G. Calin Cascaval , Siddhartha Chatterjee , Maria Eleftheriou , Raymond Mak
IPC分类号： G06F12/00 , G06F9/45 , G06F9/46
CPC分类号： G06F9/5016
摘要： An improved scalability runtime system for a global address space language running on a distributed or shared memory machine uses a directory of shared variables having a data structure for tracking shared variable information that is shared by a plurality of program threads. Allocation and de-allocation routines are used to allocate and de-allocate shared variable entries in the directory of shared variables. Different routines can be used to access different types of shared data. A control structure is used to control access to the shared data such that all threads can access the data at any time. Since all threads see the same objects, synchronization issues are eliminated. In addition, the improved efficiency of the data sharing allows the number of program threads to be vastly increased.
摘要翻译：用于在分布式或共享存储器机器上运行的全局地址空间语言的改进的可扩展性运行时系统使用具有用于跟踪由多个程序线程共享的共享变量信息的数据结构的共享变量的目录。分配和解除分配例程用于在共享变量目录中分配和取消分配共享变量条目。可以使用不同的例程来访问不同类型的共享数据。控制结构用于控制对共享数据的访问，以便所有线程可以随时访问数据。由于所有线程都看到相同的对象，因此消除了同步问题。另外，提高数据共享的效率使得程序线程的数量大大增加。

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