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1. 发明授权

US4058711A Asynchronous dual function multiprocessor machine control 失效
标题翻译：异步双功能多处理器机器控制
公开(公告)号：US4058711A
公开(公告)日：1977-11-15
申请号：US677712
申请日：1976-04-16
申请人： Robert Michael Ondercin , Paul Stephen Borzcik
发明人： Robert Michael Ondercin , Paul Stephen Borzcik
IPC分类号： G05B15/02 , G05B19/05 , G06F19/00 , G06F15/46 , G06F15/16
CPC分类号： G05B19/052 , G05B2219/1105 , G05B2219/1125 , G05B2219/1159 , G05B2219/13004 , G05B2219/13017 , G05B2219/13092 , G05B2219/13128 , G05B2219/13159 , G05B2219/14144 , G05B2219/15018 , G05B2219/15055 , G05B2219/15081 , G05B2219/15127
摘要： A multiprocessor system is disclosed for controlling a cycle of operation of a machine. The cycle of operation of the machine is governed by a first set of devices and is monitored by a second set of devices. The multiprocessor system includes a logic processor unit containing a first program of logic instructions defining the cycle of operation of the machine. A bus and associated circuits are connected between the logic processor and the devices on the machine. The logic processor is responsive to the second set of devices and makes logic decisions in a continuous and cyclic manner to control the operation of the first devices thereby causing the cycle of operation of the machine to conform with the first program. The multiprocessor system further includes one or more independent data processors which are connected to the bus and operate asynchronously with the logic processor. The data processors respond to output signals from the logic processor which select preprogrammed sets of arithmetic instructions. The data processors execute the selected sets of arithmetic instructions and produce control signals which are accepted by the logic processor at the appropriate time in its own cycle of operation.
摘要翻译：公开了一种用于控制机器的操作循环的多处理器系统。机器的操作周期由第一组设备控制，并由第二组设备监控。多处理器系统包括逻辑处理器单元，其包含限定机器的操作周期的逻辑指令的第一程序。总线和相关电路连接在逻辑处理器和机器上的设备之间。逻辑处理器响应于第二组设备并以连续和循环的方式进行逻辑决定以控制第一设备的操作，从而使机器的操作循环与第一程序一致。多处理器系统还包括连接到总线并与逻辑处理器异步操作的一个或多个独立数据处理器。数据处理器对逻辑处理器的输出信号进行响应，逻辑处理器选择预编程的算术指令集。数据处理器执行所选择的算术指令集并且产生在其自身的操作周期中在适当时间被逻辑处理器接受的控制信号。

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