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1. 发明授权

US06937117B2 High-frequency device 失效
标题翻译：高频设备
公开(公告)号：US06937117B2
公开(公告)日：2005-08-30
申请号：US10890211
申请日：2004-07-14
申请人： Yoshiaki Terashima , Fumihiko Aiga , Mutsuki Yamazaki , Hiroyuki Fuke , Hiroyuki Kayano , Riichi Katoh
发明人： Yoshiaki Terashima , Fumihiko Aiga , Mutsuki Yamazaki , Hiroyuki Fuke , Hiroyuki Kayano , Riichi Katoh
IPC分类号： H01P1/203 , H01P1/20
CPC分类号： H01P1/20381 , H01P1/203 , H01P1/20363
摘要： A high-frequency device comprises a dielectric substrate, a filter element which has a plurality of resonating elements made of a first superconductor film on the dielectric substrate, a dielectric plate which faces the dielectric substrate substantially in parallel with the substrate and covers the plurality of resonating elements, and a spacing adjusting member configured to control the spacing between the dielectric plate and the dielectric substrate. The high-frequency device enables the pass-band frequency of the filter to be adjusted with high accuracy without variations in the skirt characteristic or ripple characteristic.
摘要翻译：高频器件包括电介质衬底，滤波器元件，其具有由电介质衬底上的第一超导体膜制成的多个谐振元件，与介质基片基本上平行于衬底覆盖的绝缘板，谐振元件，以及配置成控制电介质板和电介质基板之间的间隔的间隔调节构件。高频器件使得能够以高精度调节滤波器的通带频率，而不会在裙部特性或纹波特性上发生变化。

2. 发明授权

US6060743A Semiconductor memory device having multilayer group IV nanocrystal quantum dot floating gate and method of manufacturing the same 失效
标题翻译：具有多层IV族纳米晶体量子点浮栅的半导体存储器件及其制造方法
公开(公告)号：US6060743A
公开(公告)日：2000-05-09
申请号：US82613
申请日：1998-05-20
申请人： Naoharu Sugiyama , Tsutomu Tezuka , Riichi Katoh , Atsushi Kurobe , Tetsufumi Tanamoto
发明人： Naoharu Sugiyama , Tsutomu Tezuka , Riichi Katoh , Atsushi Kurobe , Tetsufumi Tanamoto
IPC分类号： H01L29/788 , H01L21/336 , H01L29/06 , H01L29/15
CPC分类号： B82Y10/00 , H01L29/7883 , H01L29/7888 , Y10S438/962
摘要： The semiconductor device comprises a first insulating layer formed on the semiconductor substrate, at least one double-deck semiconductor nanocrystal formed on the first insulating layer, the at least one double-deck semiconductor nanocrystal comprising a first semiconductor nanocrystal and a second semiconductor nanocrystal stacked one upon the other via a second insulating layer, and a third insulating layer selectively formed on the first insulating layer so as to cover the at least one double-deck semiconductor nanocrystal.
摘要翻译：所述半导体器件包括形成在所述半导体衬底上的第一绝缘层，形成在所述第一绝缘层上的至少一个双层半导体纳米晶体，所述至少一个双层半导体纳米晶体包括第一半导体纳米晶体和第二半导体纳米晶体，另一方面通过第二绝缘层，以及选择性地形成在第一绝缘层上以覆盖至少一个双层半导体纳米晶体的第三绝缘层。

3. 发明授权

US5844279A Single-electron semiconductor device 失效
标题翻译：单电子半导体器件
公开(公告)号：US5844279A
公开(公告)日：1998-12-01
申请号：US713365
申请日：1996-09-13
申请人： Tetsufumi Tanamoto , Riichi Katoh
发明人： Tetsufumi Tanamoto , Riichi Katoh
IPC分类号： H01L21/84 , H01L27/12 , H01L29/76 , H01L27/01
CPC分类号： B82Y10/00 , H01L21/84 , H01L27/1203 , H01L29/7613 , Y10S977/937
摘要： A semiconductor device which includes, a substrate, an insulating layer formed on the substrate, a silicon layer having an exposed surface constituted by a Si (100) face, the silicon layer being provided with a tapered recess having a bottom at which a part of the silicon layer is remained without exposing the insulating layer, a first conductive region constituted by the silicon layer remaining at the bottom of the tapered recess, a second and a third conductive regions formed on both sides of the tapered recess respectively, a first insulating film formed on an inner surface of the tapered recess, and an electrode formed in the tapered recess. A flow of electron resulting from the tunneling effect from the second conductive region via the first insulating film to the third conductive region is controlled by controlling a voltage to be impressed onto the electrode.
摘要翻译：一种半导体器件，包括：衬底，形成在所述衬底上的绝缘层，具有由Si（100）面构成的暴露表面的硅层，所述硅层设置有具有底部的锥形凹部，在不暴露绝缘层的情况下保留硅层，由保留在锥形凹部的底部的硅层构成的第一导电区域，分别形成在锥形凹槽两侧的第二和第三导电区域，第一绝缘膜形成在锥形凹部的内表面上，以及形成在锥形凹部中的电极。通过控制施加到电极上的电压来控制从第二导电区域经由第一绝缘膜到第三导电区域的隧穿效应所产生的电子流。

4. 发明授权

US5010382A Heterojunction bipolar transistor having double hetero structure 失效
标题翻译：具有双异质结构的异质结双极晶体管
公开(公告)号：US5010382A
公开(公告)日：1991-04-23
申请号：US445984
申请日：1989-12-04
申请人： Riichi Katoh
发明人： Riichi Katoh
IPC分类号： H01L29/73 , H01L21/331 , H01L29/10 , H01L29/205 , H01L29/737
CPC分类号： H01L29/7371 , H01L29/1004
摘要： A double heterojunction bipolar transistor which comprises a first conductivity type emitter layer, a second conductivity type base layer which is in contact with the emitter layer and forms a first heterojunction in conjunction with the emitter layer, and a collector layer which is in contact with the base layer and is made up of a first conductivity type semiconductor layer and a second conductivity type semiconductor layer. The collector layer includes a low-impurity concentration layer which is in contact with the base layer. The low-impurity concentration layer has the same conductivity type as the base layer and has an impurity concentration lower than that of the base layer. The collector layer forms a second heterojunction in conjunction with the base layer. The emitter layer and the collector layer are formed of a semiconductor material having a band gap wider than that of the base layer.
摘要翻译：一种双异质结双极晶体管，包括第一导电型发射极层，与发射极层接触并与发射极层结合形成第一异质结的第二导电型基极层和与该发射极层接触的集电极层并且由第一导电类型半导体层和第二导电类型半导体层构成。集电极层包括与基极层接触的低杂质浓度层。低杂质浓度层具有与基底层相同的导电类型，并且其杂质浓度低于基底层的杂质浓度。集电极层与基极层结合形成第二异质结。发射极层和集电极层由具有比基极层宽的带隙的半导体材料形成。

5. 发明授权

US06778042B2 High-frequency device 失效
标题翻译：高频设备
公开(公告)号：US06778042B2
公开(公告)日：2004-08-17
申请号：US09983891
申请日：2001-10-26
申请人： Yoshiaki Terashima , Fumihiko Aiga , Mutsuki Yamazaki , Hiroyuki Fuke , Hiroyuki Kayano , Riichi Katoh
发明人： Yoshiaki Terashima , Fumihiko Aiga , Mutsuki Yamazaki , Hiroyuki Fuke , Hiroyuki Kayano , Riichi Katoh
IPC分类号： H01P120
CPC分类号： H01P1/20381 , H01P1/203 , H01P1/20363
摘要： A high-frequency device comprises a dielectric substrate, a filter element which has a plurality of resonating elements made of a first superconductor film on the dielectric substrate, a dielectric plate which faces the dielectric substrate substantially in parallel with the substrate and covers the plurality of resonating elements, and a spacing adjusting member configured to control the spacing between the dielectric plate and the dielectric substrate. The high-frequency device enables the pass-band frequency of the filter to be adjusted with high accuracy without variations in the skirt characteristic or ripple characteristic.
摘要翻译：高频器件包括电介质衬底，滤波器元件，其具有由电介质衬底上的第一超导体膜制成的多个谐振元件，与介质基片基本上平行于衬底覆盖的绝缘板，谐振元件，以及配置成控制电介质板和电介质基板之间的间隔的间隔调节构件。高频器件使得能够以高精度调节滤波器的通带频率，而不会在裙部特性或纹波特性上发生变化。

6. 发明授权

US5177583A Heterojunction bipolar transistor 失效
标题翻译：异相双极晶体管
公开(公告)号：US5177583A
公开(公告)日：1993-01-05
申请号：US639264
申请日：1991-01-10
申请人： Takahiko Endo , Riichi Katoh
发明人： Takahiko Endo , Riichi Katoh
IPC分类号： H01L29/737
CPC分类号： H01L29/7378
摘要： In a first heterojunction bipolar transistor (HBT) of the present invention, base layers and collector layers are respectively divided into a plurality of layers and one of the base layers provided closer to the collector layer reiogn is set lower in impurity concentration than the other thereof provided closer to an emitter layer, thus solving a problem that thermal histories during epitaxial growth or during processes cause a set impurity distribution to be destroyed due to diffusion and thus a heterojunction is shifted from a p-n junction. Since minority carriers in the base can smoothly flow toward the collector, there can be realized an excellent HBT having a very high current gain and a very high cut-off frequency. In a second HBT of the invention, a base region comprises a first base layer of a low concentration having the same energy band gap as an emitter region and to be changed to a complete depletion layer in a thermally balanced state and a graded second base layer of a high concentration, and the first and second base layers form a heterojunction, thereby realizing an excellent HBT having a high speed performance which can exhibit a sufficient grading effect while preventing deterioration of an emitter-base voltage withstanding characteristic.

7. 发明授权

US4933732A Heterojunction bipolar transistor 失效
公开(公告)号：US4933732A
公开(公告)日：1990-06-12
申请号：US214058
申请日：1988-06-30
申请人： Riichi Katoh , Mamoru Kurata , Kouhei Morizuka
发明人： Riichi Katoh , Mamoru Kurata , Kouhei Morizuka
IPC分类号： H01L29/205 , H01L21/331 , H01L21/8222 , H01L27/06 , H01L29/73 , H01L29/737
CPC分类号： H01L29/7371
摘要： A heterojunction bipolar transistor comprises a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the first semiconductor layer, a third semiconductor layer of a second conductivity type formed on the second semiconductor layer, the first, second and third semiconductor layers serving as a collector, a fourth semiconductor layer of the second conductivity type formed on the third semiconductor layer, the fourth semiconductor layer serving as a base, and a fifth semiconductor layer of the first conductivity type formed on the fourth semiconductor layer, the fifth semiconductor layer serving as an emitter, the fourth and fifth semiconductor layers together forming a heterojunction, and the fifth semiconductor layer having a larger band gap than the fourth semiconductor layer, wherein the first, second, third and fourth semiconductor layers are related as follows: ##EQU1## where N.sub.1, N.sub.2, N.sub.3, and N.sub.4 are impurity concentrations of the first, second, third, and fourth semiconductor layers, respectively, e is the unit charge, .epsilon. is the dielectric constant of the collector, V.sub.bi is the built-in potential between the second and third semiconductor layers, and W.sub.3 is the thickness of the third semiconductor layer.

8. 发明授权

US06333516B1 Quantum effect device 失效
标题翻译：量子效应器件
公开(公告)号：US06333516B1
公开(公告)日：2001-12-25
申请号：US08764275
申请日：1996-12-12
申请人： Riichi Katoh , Tetsufumi Tanamoto , Francis Minoru Saba , Yujiro Naruse , Shigeki Takahashi , Masao Mashita
发明人： Riichi Katoh , Tetsufumi Tanamoto , Francis Minoru Saba , Yujiro Naruse , Shigeki Takahashi , Masao Mashita
IPC分类号： H01L2906
CPC分类号： B82Y10/00 , H01L29/127 , H01L29/7613
摘要： An inverter comprising four quantum dot cells. When the quantum dot cells are arranged in 9 o'clock direction, 12 o'clock direction and 3 o'clock direction, the quantum dot cell is arranged in 6 o'clock direction.
摘要翻译：一种包括四个量子点单元的逆变器。当量子点单元被布置在9点钟方向，12点方向和3点钟方向时，量子点单元被布置在6点方向。

9. 发明授权

US5710436A Quantum effect device 失效
标题翻译：量子效应器件
公开(公告)号：US5710436A
公开(公告)日：1998-01-20
申请号：US533744
申请日：1995-09-26
申请人： Tetsufumi Tanamoto , Riichi Katoh , Li Zhang , Tadashi Sakai , Shigeki Takahashi , Taketoshi Suzuki
发明人： Tetsufumi Tanamoto , Riichi Katoh , Li Zhang , Tadashi Sakai , Shigeki Takahashi , Taketoshi Suzuki
IPC分类号： H01L29/12 , H01L29/76 , H01L33/06 , H01L29/06 , H01L31/0328 , H01L31/0336 , H01L31/072
CPC分类号： H01L33/06 , B82Y10/00 , H01L29/127 , H01L29/7613
摘要： A quantum effect device includes a first layer having a plurality of charge confinement regions, a second layer opposing the first layer and separated from the first layer, the second layer having charges at a high concentration and consisting of a metal layer or a semiconductor layer, and a third layer consisting of an insulating layer or a semiconductor layer having a large band gap between the first layer and the second layer.
摘要翻译：量子效应器件包括具有多个电荷限制区域的第一层，与第一层相对并与第一层分离的第二层，第二层具有高浓度的电荷并由金属层或半导体层组成，以及由第一层和第二层之间具有大带隙的绝缘层或半导体层组成的第三层。

10. 发明授权

US5336909A Bipolar transistor with an improved collector structure 失效
标题翻译：具有改进的集电极结构的双极晶体管
公开(公告)号：US5336909A
公开(公告)日：1994-08-09
申请号：US929524
申请日：1992-08-14
申请人： Riichi Katoh , Kunio Tsuda
发明人： Riichi Katoh , Kunio Tsuda
IPC分类号： H01L29/205 , H01L21/331 , H01L29/08 , H01L29/73 , H01L29/737 , H01L31/072 , H01L27/082 , H01L27/102 , H01L31/109
CPC分类号： H01L29/0826 , H01L29/7371
摘要： In a very high speed bipolar transistor, an n.sup.+ -type GaAs collector layer and an n-type GaAs collector layer are stacked in an intrinsic transistor region, and an i-type GaAs collector layer is formed around the n.sup.+ -type GaAs collector layer and the n-type GaAs collector layer. An n-type GaAs collector layer is formed on the n.sup.+ -type GaAs collector layer such that a part of the n-type GaAs collector layer extends on the i-type GaAs collector layer. A p-type GaAs external base layer is formed outside the n-type GaAs collector layer. A p.sup.+ -type Al.sub.x Ga.sub.l-x As base layer is formed on the n-type GaAs collector layer. An emitter layer is formed such that it is arranged only in the intrinsic transistor region on the p.sup.+ -type Al.sub.x Ga.sub.l-x As base layer and constitutes a heterojunction together with the base layer. Design trade-off between the cutoff frequency and maximum oscillation frequency of the transistor is eliminated.
摘要翻译：在非常高速的双极型晶体管中，在本征晶体管区域堆叠n +型GaAs集电极层和n型GaAs集电极层，在n +型GaAs集电极层周围形成i型GaAs集电极层， n型GaAs集电极层。在n +型GaAs集电极层上形成n型GaAs集电极层，使得n型GaAs集电极层的一部分在i型GaAs集电极层上延伸。 p型GaAs外部基极层形成在n型GaAs集电体层的外部。在n型GaAs集电极层上形成p +型Al x Ga 1-x As基层。形成发射极层，使得其仅布置在p +型Al x Ga 1-x As基层上的本征晶体管区域中，并与基极层一起构成异质结。消除晶体管的截止频率和最大振荡频率之间的设计折衷。

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