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1. 发明申请

US20130297773A1 UNIFIED CLOUD COMPUTING INFRASTRUCTURE TO MANAGE AND DEPLOY PHYSICAL AND VIRTUAL ENVIRONMENTS 审中-公开
标题翻译：统一的云计算基础设施管理和部署物理和虚拟环境
公开(公告)号：US20130297773A1
公开(公告)日：2013-11-07
申请号：US13466224
申请日：2012-05-08
申请人： Rohith K. Ashok , Thomas M. Brey , Raymond J. Harrington , Matt R. Hogstrom , Matthew J. Sheard
发明人： Rohith K. Ashok , Thomas M. Brey , Raymond J. Harrington , Matt R. Hogstrom , Matthew J. Sheard
IPC分类号： G06F15/173
CPC分类号： G06F9/5072 , H04L41/0803 , H04L41/5096 , H04L67/10
摘要： A method, system and computer program product for managing and deploying physical and virtual environments across multiple hardware platforms. A single unit, referred to herein as a cloud construction block, contains both the hardware and software components used to build a cloud computing environment. By having such a single unit contain both the hardware and software components needed to build a cloud computing environment, the user no longer needs to purchase and integrate different hardware and software components. Furthermore, the cloud construction block contains modular pieces of hardware, such as compute hardware, memory hardware, storage hardware and network hardware, that are integrated with management software configured to manage both the hardware and the cloud computing environment in a seamlessly integrated package. Since there is a single management system, the management software allows the user to manage the modular pieces of hardware via a single user interface.
摘要翻译：一种用于在多个硬件平台上管理和部署物理和虚拟环境的方法，系统和计算机程序产品。这里称为云构造块的单个单元包含用于构建云计算环境的硬件和软件组件。通过使这样一个单元既包含构建云计算环境所需的硬件和软件组件，用户也不再需要购买和集成不同的硬件和软件组件。此外，云构建块包含与被配置为以无缝集成的包管理硬件和云计算环境的管理软件集成的模块化硬件，例如计算硬件，存储器硬件，存储硬件和网络硬件。由于存在单一管理系统，管理软件允许用户通过单个用户界面来管理模块化硬件。

2. 发明授权

US08527795B2 Changing processor performance from a throttled state during a power supply failure 有权
标题翻译：在电源故障期间，从处于节流状态的处理器性能改变
公开(公告)号：US08527795B2
公开(公告)日：2013-09-03
申请号：US12241134
申请日：2008-09-30
申请人： Derek Lee Howard , Martha Ann Broyles , Peter Adam Wendling , Raymond J Harrington , Todd Jon Rosedahl
发明人： Derek Lee Howard , Martha Ann Broyles , Peter Adam Wendling , Raymond J Harrington , Todd Jon Rosedahl
IPC分类号： G06F1/00 , G06F1/26 , G06F1/32
CPC分类号： G06F1/30
摘要： A method, system, and computer usable program product for improving processor performance during power supply failure are provided in the illustrative embodiments. A throttled condition of a processor is detected in a data processing system. A voltage of the electrical power being provided to the processor is reduced. The processor is un-throttled. Additionally, a frequency of electrical power being provided to the processor may also be reduced. A determination is made whether a condition that caused the throttling has been corrected. In response to the condition having been corrected, the frequency is returned to normal frequency and the voltage is returned to normal voltage. The reducing the frequency operation and reducing the voltage operation may each be performed by distinct components communicating over a data network external to the data processing system.
摘要翻译：在说明性实施例中提供了用于在电源故障期间改善处理器性能的方法，系统和计算机可用程序产品。在数据处理系统中检测到处理器的节流条件。提供给处理器的电力的电压降低。处理器不受限制。此外，还可以减少提供给处理器的电力频率。确定是否已经校正了引起节流的条件。响应于已经被校正的条件，频率返回到正常频率，并且电压恢复到正常电压。降低频率操作和降低电压操作可以各自由通过数据处理系统外部的数据网络进行通信的不同组件来执行。

3. 发明申请

US20110047350A1 PARTITION LEVEL POWER MANAGEMENT USING FULLY ASYNCHRONOUS CORES WITH SOFTWARE THAT HAS LIMITED ASYNCHRONOUS SUPPORT 有权
标题翻译：使用完全异步电源的分段电源管理软件，其软件具有无偿支持
公开(公告)号：US20110047350A1
公开(公告)日：2011-02-24
申请号：US12544541
申请日：2009-08-20
申请人： Andrew Geissler , Raymond J. Harrington , Hye-Young McCreary , Freeman Leigh Rawson, III , Malcolm Scott Ware
发明人： Andrew Geissler , Raymond J. Harrington , Hye-Young McCreary , Freeman Leigh Rawson, III , Malcolm Scott Ware
IPC分类号： G06F9/00 , G06F15/80
CPC分类号： G06F1/324 , G06F9/5061 , G06F9/5094 , Y02D10/126 , Y02D10/22
摘要： A partition that is executed by multiple processing nodes. Each node includes multiple cores and each of the cores has a frequency that can be set. A first frequency range is provided to the cores. Each core, when executing the identified partition, sets its frequency within the first frequency range. Frequency metrics are gathered from the cores running the partition by the nodes. The gathered frequency metrics are received and analyzed by a hypervisor that determines a second frequency range to use for the partition, with the second frequency range being different from the first frequency range. The second frequency range is provided to the cores at the nodes executing the identified partition. When the cores execute the identified partition, they use a frequencies within the second frequency range.
摘要翻译：由多个处理节点执行的分区。每个节点包括多个核心，每个核心都具有可设置的频率。第一频率范围被提供给核心。每个核心在执行识别的分区时，将其频率设置在第一个频率范围内。从节点运行分区的内核收集频率度量。收集的频率度量由管理程序接收和分析，管理程序确定用于分区的第二频率范围，其中第二频率范围不同于第一频率范围。将第二频率范围提供给执行识别的分区的节点处的核心。当核心执行识别的分区时，它们使用第二频率范围内的频率。

4. 发明授权

US07805618B2 Component indicators used during extended power-off service 失效
标题翻译：在延长关机服务期间使用的组件指示器
公开(公告)号：US07805618B2
公开(公告)日：2010-09-28
申请号：US11357147
申请日：2006-02-17
申请人： Kevin R. Covi , Gerald J. Fahr , Raymond J. Harrington , Raymond A. Longhi , Edward J. Seminaro
发明人： Kevin R. Covi , Gerald J. Fahr , Raymond J. Harrington , Raymond A. Longhi , Edward J. Seminaro
IPC分类号： G06F1/00 , G06F15/177
CPC分类号： G06F1/263 , G06F1/30 , G06F11/325
摘要： A method and related apparatus for servicing an electrical/electronic device during power shut offs is provided. The apparatus comprises a service logic having a memory and control component for storing device information during normal device operation and one or more indicators driven by the memory and control component after power shut off to provide service signals. The service logic also includes an auxiliary energy source selectively engageable to provide auxiliary power to the memory and control component during power shut off and to enable providing of service signals through the indicator(s).
摘要翻译：提供了一种用于在电源关闭期间维护电气/电子设备的方法和相关装置。该装置包括具有用于在正常设备操作期间存储设备信息的存储器和控制组件的服务逻辑以及在电源关闭之后由存储器和控制组件驱动以提供服务信号的一个或多个指示器。服务逻辑还包括辅助能量源，其选择性地可接合以在电源切断期间向存储器和控制部件提供辅助电力，并且能够通过指示器提供服务信号。

5. 发明授权

US07715215B1 Control of an AC-to-DC power supply assembly fed by a three-phase AC source 有权
标题翻译：控制由三相交流电源馈电的交流 - 直流电源组件
公开(公告)号：US07715215B1
公开(公告)日：2010-05-11
申请号：US12361639
申请日：2009-01-29
申请人： Frank E. Bosco , Kevin R. Covi , Anthony J. Cozzolino , Gary F. Goth , Raymond J. Harrington , Peter A. Hein , Raymond A. Longhi , Edward J. Seminaro , Peter A. Wendling
发明人： Frank E. Bosco , Kevin R. Covi , Anthony J. Cozzolino , Gary F. Goth , Raymond J. Harrington , Peter A. Hein , Raymond A. Longhi , Edward J. Seminaro , Peter A. Wendling
IPC分类号： H02M7/00 , H02M5/42
CPC分类号： H02M7/2173 , H02M2001/0012
摘要： Control of an AC-to-DC power supply assembly fed by a three-phase AC source is provided by: determining whether the power supply assembly includes greater than three single-phase power regulators feeding a common load, with multiple regulators being connected in parallel across a common phase of the AC source, and if so, summing currents provided by the regulators to the common load; and ascertaining whether the summed current is less than a predefined threshold, and if yes, operating the power supply assembly in a line balance mode to maintain power drawn on the phases of the AC source in balance, and if greater than the predefined threshold, operating the power supply assembly in a maximize power mode wherein power is provided to the common load without maintaining power drawn on the phases of the AC source in balance.
摘要翻译：由三相交流电源馈送的AC至DC电源组件的控制是通过以下方式来提供的：确定电源组件是否包括大于三个馈送公共负载的单相功率调节器，多个调节器并联跨越交流电源的公共相，如果是，则将调节器提供给公共负载的求和电流; 并且确定总和电流是否小于预定义的阈值，并且如果是，则以线路平衡模式操作电源组件以维持AC源的相位上的功率的平衡，并且如果大于预定阈值，则操作电源组件处于最大功率模式，其中功率被提供给公共负载，而不保持平衡地在AC源的相位上拉出的功率。

6. 发明申请

US20090196295A1 ONE OR MORE MULTIPORT SYSTEMS TO FACILITATE SERVICING OF ASYNCRHONOUS COMMUNICATIONS EVENTS 失效
标题翻译：一个或多个多媒体系统来促进非正式通信活动的服务
公开(公告)号：US20090196295A1
公开(公告)日：2009-08-06
申请号：US12419719
申请日：2009-04-07
申请人： Eileen M. Behrendt , Jeffrey R. Biamonte , Raymond J. Harrington
发明人： Eileen M. Behrendt , Jeffrey R. Biamonte , Raymond J. Harrington
IPC分类号： H04L12/56
CPC分类号： G06F13/4022 , G06F13/364 , H04L12/407 , H04L49/1553 , H04L2012/40273
摘要： One or more multiport systems are used to facilitate servicing of asynchronous communications events. A multiport system, such as an open collector multiport system, receives from one of a plurality of source components an asynchronous communications event directed to a target component coupled to the plurality of source components. The multiport system is controlled to provide, at any given time, a communications path between a plurality of ports of the multiport system to service the asynchronous communications event. One or more multiport systems are used to forward the event from the source to the target.
摘要翻译：使用一个或多个多端口系统来促进异步通信事件的服务。多端口系统，例如开放收集器多端口系统，从多个源组件中的一个源接收指向耦合到多个源组件的目标组件的异步通信事件。多端口系统被控制以在任何给定的时间提供多端口系统的多个端口之间的通信路径来服务异步通信事件。一个或多个多端口系统用于将事件从源转发到目标。

7. 发明授权

US07461291B2 Arbitration method and system for redundant controllers, with output interlock and automatic switching capabilities 失效
标题翻译：冗余控制器的仲裁方法和系统，具有输出互锁和自动切换功能
公开(公告)号：US07461291B2
公开(公告)日：2008-12-02
申请号：US11765143
申请日：2007-06-19
申请人： Gary D. Anderson , Gerald J. Fahr , Raymond J. Harrington
发明人： Gary D. Anderson , Gerald J. Fahr , Raymond J. Harrington
IPC分类号： G06F11/00
CPC分类号： G06F11/20 , G06F11/2017
摘要： A method of providing arbitration for redundant controllers is provided, which includes: providing logic for automatically determining which controller of redundant controllers is active controller, wherein outputs of the redundant controllers are electrically hardwired together and provided as input to a device; and providing first and second hardware arbitration components for first and second controllers of the redundant controllers, each hardware arbitration component ensuring that outputs of the respective controller are enabled only when the associated controller is active controller. The first and second hardware arbitration components are separate hardware components which communicate and cooperate as a distributed hardware interlock mechanism that ensures outputs of only one controller are enabled at a time. More particularly, the hardware arbitration components each include a hardware state machine to enable/disable outputs of the associated controller and ensure that outputs of only the active controller are enabled as input to the device.
摘要翻译：提供了一种为冗余控制器提供仲裁的方法，其包括：提供用于自动确定冗余控制器的哪个控制器是主动控制器的逻辑，其中冗余控制器的输出电连接在一起并作为设备的输入提供; 以及为冗余控制器的第一和第二控制器提供第一和第二硬件仲裁组件，每个硬件仲裁组件确保只有当相关联的控制器是主动控制器时才启用相应控制器的输出。第一和第二硬件仲裁组件是分开的硬件组件，其作为分布式硬件互锁机制进行通信和协作，确保一次只能启用一个控制器的输出。更具体地说，硬件仲裁组件各自包括硬件状态机以启用/禁用相关联的控制器的输出，并确保只有主动控制器的输出被启用作为设备的输入。

8. 发明授权

US09021097B2 Unified cloud computing infrastructure to manage and deploy physical and virtual environments 有权
公开(公告)号：US09021097B2
公开(公告)日：2015-04-28
申请号：US13466224
申请日：2012-05-08
申请人： Rohith K. Ashok , Thomas M. Brey , Raymond J. Harrington , Matt R. Hogstrom , Matthew J. Sheard
发明人： Rohith K. Ashok , Thomas M. Brey , Raymond J. Harrington , Matt R. Hogstrom , Matthew J. Sheard
IPC分类号： G06F15/173 , G06F3/00 , G06F9/50 , H04L29/08
CPC分类号： G06F9/5072 , H04L41/0803 , H04L41/5096 , H04L67/10
摘要： A method, system and computer program product for managing and deploying physical and virtual environments across multiple hardware platforms. A single unit, referred to herein as a cloud construction block, contains both the hardware and software components used to build a cloud computing environment. By having such a single unit contain both the hardware and software components needed to build a cloud computing environment, the user no longer needs to purchase and integrate different hardware and software components. Furthermore, the cloud construction block contains modular pieces of hardware, such as compute hardware, memory hardware, storage hardware and network hardware, that are integrated with management software configured to manage both the hardware and the cloud computing environment in a seamlessly integrated package. Since there is a single management system, the management software allows the user to manage the modular pieces of hardware via a single user interface.

9. 发明申请

US20110257802A1 POWER DISTRIBUTION CONSIDERING COOLING NODES 失效
标题翻译：考虑冷却点的功率分配
公开(公告)号：US20110257802A1
公开(公告)日：2011-10-20
申请号：US12762166
申请日：2010-04-16
申请人： ANDREAS BIESWANGER , Andrew J. Geissler , Raymond J. Harrington , Hye-Young McCreary , Freeman Leigh Rawson, III , Malcolm Scott Ware
发明人： ANDREAS BIESWANGER , Andrew J. Geissler , Raymond J. Harrington , Hye-Young McCreary , Freeman Leigh Rawson, III , Malcolm Scott Ware
IPC分类号： G06F1/32 , G05D23/19
CPC分类号： G06F1/3203 , G06F1/20
摘要： A method, system, and computer usable program product for power distribution considering cooling nodes in a data processing environment. A power demand of a data processing environment is determined for a period. The data processing environment includes a set of computing nodes and cooling nodes. A determination is made that the power demand will exceed a limit on electrical power available to the data processing environment for the period if the computing nodes and the cooling nodes in the data processing environment are operated in a first configuration. A first amount of power is redistributed from a cooling node in the data processing environment to a computing node in the data processing environment such that a temperature related performance threshold of a subset of computing nodes is at least met.
摘要翻译：一种考虑到数据处理环境中的冷却节点进行配电的方法，系统和计算机可用程序产品。数据处理环境的功率需求被确定一段时间。数据处理环境包括一组计算节点和冷却节点。如果数据处理环境中的计算节点和冷却节点在第一配置中操作，则确定功率需求将超过对于该周期的数据处理环境可用的电力的限制。将第一数量的功率从数据处理环境中的冷却节点重新分配到数据处理环境中的计算节点，使得至少满足计算节点的子集的温度相关的性能阈值。

10. 发明申请

US20090125659A1 Inter-Integrated Circuit (12C) Slave with Read/Write Access to Random Access Memory 审中-公开
标题翻译：具有读/写访问随机存取存储器的内部集成电路（12C）从机
公开(公告)号：US20090125659A1
公开(公告)日：2009-05-14
申请号：US12354979
申请日：2009-01-16
申请人： Eileen M. Behrendt , Jeffrey R. Biamonte , Raymond J. Harrington , Timothy M. Trifilo
发明人： Eileen M. Behrendt , Jeffrey R. Biamonte , Raymond J. Harrington , Timothy M. Trifilo
IPC分类号： G06F13/40
CPC分类号： G06F13/4291
摘要： A program and device for data access via an inter-integrated circuit (I2C) protocol are provided, which includes receiving an I2C read command at an I2C slave device from an I2C master device, and the I2C read command at the I2C slave device is altered such that the I2C read command causes stored data to be read from a storage device, being external to the I2C slave device, in place of reading from internal memory of I2C slave device. An I2C write command having master data and a slave device register address is intended to write to the internal memory of the I2C slave device, and I2C write command at the I2C slave device is altered such that the I2C write command causes the master data to write to the storage device, being external to the I2C slave device, in place of writing to internal memory of the I2C slave device.
摘要翻译：提供了通过集成电路（I2C）协议进行数据访问的程序和设备，其中包括从I2C主器件在I2C从器件处接收I2C读命令，I2C从器件上的I2C读命令被更改使得I2C读取命令使存储的数据从I2C从器件外部的存储器件读取，而不是从I2C从器件的内部存储器读取。具有主数据和从器件寄存器地址的I2C写命令旨在写入I2C从器件的内部存储器，I2C从器件上的I2C写命令被更改，使得I2C写命令使主数据写入到I2C从器件外部的存储设备，代替写入I2C从器件的内部存储器。

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