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    • 2. 发明申请
    • MIXER-TRANSCONDUCTANCE INTERFACE WITH SELECTABLE MIXER AND TRANCONDUCTANCE UNITS
    • 具有可选择的混合器和电阻单元的混合器 - 交叉接口
    • WO2011003094A1
    • 2011-01-06
    • PCT/US2010/040960
    • 2010-07-02
    • QUALCOMM IncorporatedCHOKSI, Ojas M.RANJAN, Mahim
    • CHOKSI, Ojas M.RANJAN, Mahim
    • H03D7/16
    • H03D7/165
    • Techniques for providing an efficient interface between a mixer block and a transconductance (Gm) block. In an exemplary embodiment, the output currents of at least two unit cells of the transconductance block are conductively coupled together, and coupled to the mixer block using a single conductive path. For a differential signal, the conductive path may include two conductive leads. Within the mixer block, the single conductive path may be fanned out to at least two unit cells of the mixer block. At least one Gm unit cell may be selectively enabled or disabled to control the gain setting of the mixer-transconductance block. The techniques may further be applied to transceiver architectures supporting in-phase and quadrature mixing, as well as multi-mode and/or multi-band operation.
    • 在混合器块和跨导(Gm)块之间提供有效接口的技术。 在示例性实施例中,跨导块的至少两个单位单元的输出电流被导电耦合在一起,并且使用单个导电路径耦合到混频器块。 对于差分信号,导电路径可以包括两个导电引线。 在混合器块内,单个导电路径可以扇形到混合器块的至少两个单元电池。 可以选择性地使能或禁用至少一个Gm单位单元来控制混频器 - 跨导块的增益设置。 这些技术可以进一步应用于支持同相和正交混合以及多模式和/或多频带操作的收发器架构。
    • 4. 发明申请
    • MIXER-TRANSCONDUCTANCE INTERFACE WITH SELECTABLE MIXER AND TRANSCONDUCTANCE UNITS
    • 具有可选择混合器和跨导单元的混合器 - 交叉接口
    • WO2011003092A1
    • 2011-01-06
    • PCT/US2010/040958
    • 2010-07-02
    • QUALCOMM IncorporatedCHOKSI, Ojas M.RANJAN, Mahim
    • CHOKSI, Ojas M.RANJAN, Mahim
    • H03D7/16
    • H03D7/165
    • Techniques for providing an efficient interface between a mixer block and a transconductance (Gm) block. In an exemplary embodiment, the output currents of at least two unit cells of the transconductance block are conductively coupled together, and coupled to the mixer block using a single conductive path. For a differential signal, the conductive path may include two conductive leads. Within the mixer block, the single conductive path may be fanned out to at least two unit cells of the mixer block. At least one Gm unit cell may be selectively enabled or disabled to control the gain setting of the mixer-transconductance block. The techniques may further be applied to transceiver architectures supporting in-phase and quadrature mixing, as well as multi-mode and/or multi-band operation.
    • 在混合器块和跨导(Gm)块之间提供有效接口的技术。 在示例性实施例中,跨导块的至少两个单位单元的输出电流被导电耦合在一起,并且使用单个导电路径耦合到混频器块。 对于差分信号,导电路径可以包括两个导电引线。 在混合器块内,单个导电路径可以扇形到混合器块的至少两个单元电池。 可以选择性地使能或禁用至少一个Gm单位单元来控制混频器 - 跨导块的增益设置。 这些技术可以进一步应用于支持同相和正交混合以及多模式和/或多频带操作的收发器架构。
    • 8. 发明申请
    • A CURRENT MIRROR, DEVICES INCLUDING SAME, AND METHODS OF OPERATION THEREOF
    • 电流镜,包括其的装置及其操作方法
    • WO2010151598A1
    • 2010-12-29
    • PCT/US2010/039680
    • 2010-06-23
    • QUALCOMM IncorporatedRANJAN, Mahim
    • RANJAN, Mahim
    • G05F3/26
    • G05F3/262
    • Exemplary embodiments are directed to a current mirror and method of operation thereof. A method may include biasing a first transistor with a voltage at a gate of a second transistor to cause the first transistor to conduct, wherein the first transistor has a source operably coupled to a drain of a third transistor and a drain operably coupled to a gate of the third transistor. The method may also include providing an input current at the drain of the third transistor. Moreover, the method may include decreasing or increasing a voltage at the gate of the first transistor when a voltage at the gate of the second transistor and the drain of the first transistor respectively decreases or increases. Furthermore, the method may include generating an output current in a drain of a fourth transistor having a gate operably coupled to the gate of the third transistor.
    • 示例性实施例涉及电流镜及其操作方法。 一种方法可以包括利用在第二晶体管的栅极处的电压来偏置第一晶体管以使第一晶体管导通,其中第一晶体管具有可操作地耦合到第三晶体管的漏极的源极和可操作地耦合到栅极的漏极 的第三晶体管。 该方法还可以包括在第三晶体管的漏极处提供输入电流。 此外,当第二晶体管的栅极处的电压和第一晶体管的漏极分别减小或增加时,该方法可以包括降低或增加第一晶体管的栅极处的电压。 此外,该方法可以包括在具有可操作地耦合到第三晶体管的栅极的栅极的第四晶体管的漏极中产生输出电流。