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1. 发明授权

US5767538A Integrated photodiode/transimpedance amplifier 失效
标题翻译：集成光电二极管/跨阻放大器
公开(公告)号：US5767538A
公开(公告)日：1998-06-16
申请号：US728347
申请日：1996-10-09
申请人： Edward Mullins , Rodney T. Burt , Walter B. Meinel , R. Mark Stitt, II
发明人： Edward Mullins , Rodney T. Burt , Walter B. Meinel , R. Mark Stitt, II
IPC分类号： H03F1/08 , H03F3/08 , H01L29/74 , H01L27/148 , H01L29/768 , H01L31/111
CPC分类号： H03F1/08 , H03F3/08
摘要： An integrated circuit photodetector includes a transimpedance amplifier including a differential amplifier stage with PNP emitter-coupled transistors and a PNP input transistor which are biased only by base currents of the emitter-coupled transistors, to achieve low input bias current. Low noise operation is achieved by bypass capacitors coupled between the bases and emitters of the input transistors, respectively. A constant current source supplies a current which develops a small pedestal voltage across a resistor to bias the non-inverting input of the transimpedance amplifier so as to avoid nonlinear amplification of low level light signals. A positively biased N-type guard tub surrounds the photodetector, which is formed in a junction-isolated N region on a P substrate, to collect electrons generated in the substrate by deep-penetrating IR light to prevent them from causing amplification errors. In one embodiment, a feedback network includes a resistor connected between the output of a buffer driven by the transimpedance amplifier and an inverting input thereof, and a capacitor connected between the output and inverting input of the transimpedance amplifier to provide low noise, fast settling operation.
摘要翻译：集成电路光电检测器包括跨阻抗放大器，其包括具有PNP发射极耦合晶体管的差分放大器级和仅由发射极耦合晶体管的基极电流偏置的PNP输入晶体管，以实现低输入偏置电流。分别通过耦合在输入晶体管的基极和发射极之间的旁路电容来实现低噪声操作。恒流源提供电流，该电流在电阻器两端产生小的基座电压，以偏置跨阻放大器的非反相输入，以避免低电平光信号的非线性放大。正偏置N型保护桶围绕形成在P基板上的结隔离N区域中的光电检测器，以通过深穿透IR光收集在衬底中产生的电子，以防止它们引起放大误差。在一个实施例中，反馈网络包括连接在由跨阻抗放大器驱动的缓冲器的输出与其反相输入之间的电阻器，以及连接在跨阻放大器的输出和反相输入端之间以提供低噪声，快速稳定操作。

2. 发明授权

US06507233B1 Method and circuit for compensating VT induced drift in monolithic logarithmic amplifier 有权
标题翻译：用于补偿单片对数放大器中VT诱发漂移的方法和电路
公开(公告)号：US06507233B1
公开(公告)日：2003-01-14
申请号：US09920220
申请日：2001-08-02
申请人： Jeffrey B. Parfenchuck , David M. Jones , R. Mark Stitt, II
发明人： Jeffrey B. Parfenchuck , David M. Jones , R. Mark Stitt, II
IPC分类号： H01L3500
CPC分类号： G06G7/24
摘要： A temperature-compensated monolithic logarithmic amplifier includes a logarithmic amplifier cell (26) configured to produce a logarithmic voltage signal (V3) representative of a difference between a first voltage (V1) developed across a first PN junction device (D1) in response to an input signal (Iin) and a second voltage (V2) developed across a second PN junction device (D2) in response to a reference signal (Iref) and an output circuit (36) including an output amplifier (19), a temperature-dependent first resistive element (R1) having a positive temperature coefficient, and a second resistive element (R2). The output circuit (36) produces a temperature-compensated output signal (Vout) in response to the logarithmic voltage signal (V3). The first resistive element (R1) is composed of conductive aluminum or aluminum alloy interconnection metallization that also is utilized as interconnection metallization throughout the monolithic logarithmic amplifier.
摘要翻译：温度补偿的单片对数放大器包括对数放大器单元（26），其被配置为产生对数电压信号（V3），该对数电压信号（V3）响应于第一PN结器件（D1）输入信号（Iin）和响应于参考信号（Iref）跨越第二PN结装置（D2）展开的第二电压（V2）和包括输出放大器（19）的输出电路（19），温度依赖性具有正温度系数的第一电阻元件（R1）和第二电阻元件（R2）。输出电路（36）响应于对数电压信号（V3）产生温度补偿输出信号（Vout）。第一电阻元件（R1）由导电铝或铝合金互连金属化组成，也可用作整个对数放大器的互连金属化。

3. 发明授权

US06225684B1 Low temperature coefficient leadframe 有权
标题翻译：低温系数引线框架
公开(公告)号：US06225684B1
公开(公告)日：2001-05-01
申请号：US09515300
申请日：2000-02-29
申请人： R. Mark Stitt, II , Larry D. Hobson
发明人： R. Mark Stitt, II , Larry D. Hobson
IPC分类号： H01L23495
CPC分类号： H01L24/06 , H01L23/495 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/05599 , H01L2224/48247 , H01L2224/49171 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01073 , H01L2924/014 , H01L2924/10161 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19043 , H01L2224/45099 , H01L2924/00
摘要： A leadframe is provided which has an integrated resistive element incorporated within the leadframe. The resistive element suitably comprises a material that can provide a temperature coefficient of under 500 ppm/° C., preferably approximating 100 ppm/° C. or less. Exemplary embodiments of the resistive material may include Constantan or Manganin. The leadframe and integrated resistive element may be utilized in a variety of integrated circuit applications, such as a current monitoring circuit. Accordingly, variations in temperature will not dramatically affect the accuracy of any integrated circuit devices during operation. Additionally, after encapsulation of the leadframe and integrated resistive element and any such integrated circuit device, the gain of the encapsulated circuit may be suitably adjusted by various calibration techniques.
摘要翻译：提供引线框架，其具有并入引线框内的集成电阻元件。电阻元件适当地包括可以提供低于500ppm /℃的温度系数，优选近似为100ppm /℃或更低的材料。电阻材料的示例性实施例可以包括Constantan或Manganin。引线框架和集成电阻元件可以用于各种集成电路应用中，例如电流监控电路。因此，在运行期间，温度的变化不会显着地影响任何集成电路器件的精度。此外，在封装引线框和集成电阻元件以及任何此类集成电路器件之后，可以通过各种校准技术适当地调整封装电路的增益。

4. 发明授权

US5327098A Programmable gain amplifier circuitry and method for biasing JFET gain switches thereof 失效
标题翻译：用于偏置JFET增益开关的可编程增益放大器电路和方法
公开(公告)号：US5327098A
公开(公告)日：1994-07-05
申请号：US98845
申请日：1993-07-29
申请人： Johnnie F. Molina , R. Mark Stitt, II , Rodney T. Burt
发明人： Johnnie F. Molina , R. Mark Stitt, II , Rodney T. Burt
IPC分类号： H03G1/04 , H03G3/00 , H03G3/30 , H03F3/45
CPC分类号： H03G3/001 , H03G1/04
摘要： A circuit for reducing input offset error and improving gain switching speed in a programmable gain amplifier includes a level shifting buffer that senses a signal on a common mode conductor in a differential input stage of an operational amplifier, and shifts the level of that signal up to the level corresponding to a level of an input signal applied to a non-inverting input of the operational amplifier. If a gain select signal is at a first logic level, the voltage produced by the buffer is applied to a gate electrode of one of a plurality of gain switching JFETs coupling a gain network to the inverting input of the operational amplifier, turning that JFET on. If the gain select signal is at a second logic level, the output of the buffer is isolated from the gain switching JFET and a turn off voltage is applied to the gate of the gain switching JFET.
摘要翻译：用于减小输入偏移误差并提高可编程增益放大器中的增益切换速度的电路包括电平移位缓冲器，其检测运算放大器的差分输入级中的共模导体上的信号，并将该信号的电平转移到该电平对应于施加到运算放大器的非反相输入端的输入信号的电平。如果增益选择信号处于第一逻辑电平，则由缓冲器产生的电压被施加到将增益网络耦合到运算放大器的反相输入端的多个增益切换JFET之一的栅电极，使该JFET导通。如果增益选择信号处于第二逻辑电平，则缓冲器的输出与增益切换JFET隔离，并且关断电压被施加到增益切换JFET的栅极。

5. 发明授权

US4901031A Common-base, source-driven differential amplifier 失效
标题翻译：共源，源驱动差分放大器
公开(公告)号：US4901031A
公开(公告)日：1990-02-13
申请号：US298116
申请日：1989-01-17
申请人： Timothy V. Kalthoff , Rodney T. Burt , R. Mark Stitt, II
发明人： Timothy V. Kalthoff , Rodney T. Burt , R. Mark Stitt, II
IPC分类号： H03F3/16 , H03F3/45
CPC分类号： H03F3/45278 , H03F3/45286 , H03F3/4586 , H03F2200/372 , H03F2203/45302 , H03F2203/45304 , H03F2203/45394 , H03F2203/45674 , H03F2203/45702
摘要： A common-base, source-driven differential amplifier achieves both high speed operation and low noise operation by providing an input stage including a pair of source follower JFETs that drive emitters of a pair of NPN input transistors having their bases connected together and to a bias circuit. The collectors of the NPN transistors each are connected to a corresponding load device and to a corresponding input of an output amplifier stage. The bias circuit includes a current source and a pair of diode-connected NPN transistors having their bases and collectors connected to the current source and to the bases of the input transistors. The emitters of the diode-connected NPN transistors are connected to sources of a second pair of source follower JFETs, the gates of which are connected to the input terminals.
摘要翻译：通用基极源驱动差分放大器通过提供包括一对源极跟随器JFET的输入级来实现高速运算和低噪声运算，该对源极跟随器JFET驱动其基极连接在一起的一对NPN输入晶体管的发射极和偏置电路。 NPN晶体管的集电极各自连接到相应的负载装置和输出放大器级的相应输入端。偏置电路包括电流源和一对二极管连接的NPN晶体管，其基极和集电极连接到电流源和输入晶体管的基极。二极管连接的NPN晶体管的发射极连接到第二对源极跟随器JFET的源极，其栅极连接到输入端子。

6. 发明授权

US5598327A Planar transformer assembly including non-overlapping primary and secondary windings surrounding a common magnetic flux path area 失效
标题翻译：平面变压器组件包括围绕公共磁通区域的不重叠的初级和次级绕组
公开(公告)号：US5598327A
公开(公告)日：1997-01-28
申请号：US188159
申请日：1994-01-28
申请人： Thomas A. Somerville , Walter B. Meinel , R. Mark Stitt, II
发明人： Thomas A. Somerville , Walter B. Meinel , R. Mark Stitt, II
IPC分类号： H01F17/00 , H01F19/04 , H02J7/00 , H02J7/02 , H02M3/335 , H04M19/08 , H05K1/16 , H02M7/537 , H01H85/02
CPC分类号： H02M3/33507 , H01F17/0006 , H01F19/04 , H02J7/0081 , H02J7/022 , H04M19/08 , H05K1/165 , H05K2201/086 , H05K2201/09063 , Y10T29/49073
摘要： A planar transformer assembly includes an insulative layer, a first spiral winding thereon circumscribing a magnetic flux path, a second spiral winding thereon in non-overlapping relation to the first spiral winding circumscribing the magnetic flux path, and a ferrite core assembly including first and second core sections defining a shallow gap or passage within which the spiral windings are disposed. In one embodiment, a plurality of laminated insulative layers are provided with a primary winding including a plurality of series-connected spiral subwindings and a non-overlapping secondary winding formed on the various insulative layers. The non-overlapping structure and the order of the various windings minimize electric field gradients and thereby minimize electric field coupled noise currents.
摘要翻译：平面变压器组件包括绝缘层，围绕磁通路径的第一螺旋绕组，与限定磁通路径的第一螺旋绕组不重叠的第二螺旋绕组，以及包括第一和第二芯部分限定出一个浅间隙或通道，螺旋绕组设置在该间隙或通道内。在一个实施例中，多个层压绝缘层设置有初级绕组，该初级绕组包括多个串联连接的螺旋子绕组和形成在各绝缘层上的非重叠次级绕组。不重叠结构和各种绕组的顺序使电场梯度最小化，从而最小化电场耦合噪声电流。

7. 发明授权

US5592124A Integrated photodiode/transimpedance amplifier 失效
标题翻译：集成光电二极管/跨阻放大器
公开(公告)号：US5592124A
公开(公告)日：1997-01-07
申请号：US494413
申请日：1995-06-26
申请人： Edward Mullins , Rodney T. Burt , Walter B. Meinel , R. Mark Stitt, II
发明人： Edward Mullins , Rodney T. Burt , Walter B. Meinel , R. Mark Stitt, II
IPC分类号： H03F1/08 , H03F3/08
CPC分类号： H03F1/08 , H03F3/08
摘要： An integrated circuit photodetector includes a transimpedance amplifier including a differential amplifier stage with PNP emitter-coupled transistors and a PNP input transistor which are biased only by base currents of the emitter-coupled transistors, to achieve low input bias current. Low noise operation is achieved by bypass capacitors coupled between the bases and emitters of the input transistors, respectively. A constant current source supplies a current which develops a small pedestal voltage across a resistor to bias the non-inverting input of the transimpedance amplifier so as to avoid nonlinear amplification of low level light signals. A positively biased N-type guard tub surrounds the photodetector, which is formed in a junction-isolated N region on a P substrate, to collect electrons generated in the substrate by deep-penetrating IR light to prevent them from causing amplification errors. In one embodiment, a feedback network includes a resistor connected between the output of a buffer driven by the transimpedance amplifier and an inverting input thereof, and a capacitor connected between the output and inverting input of the transimpedance amplifier to provide low noise, fast settling operation.
摘要翻译：集成电路光电检测器包括跨阻抗放大器，其包括具有PNP发射极耦合晶体管的差分放大器级和仅由发射极耦合晶体管的基极电流偏置的PNP输入晶体管，以实现低输入偏置电流。分别通过耦合在输入晶体管的基极和发射极之间的旁路电容来实现低噪声操作。恒流源提供电流，该电流在电阻器两端产生小的基座电压，以偏置跨阻放大器的非反相输入，以避免低电平光信号的非线性放大。正偏置N型保护桶围绕形成在P基板上的结隔离N区域中的光电检测器，以通过深穿透IR光收集在衬底中产生的电子，以防止它们引起放大误差。在一个实施例中，反馈网络包括连接在由跨阻抗放大器驱动的缓冲器的输出与其反相输入之间的电阻器，以及连接在跨阻放大器的输出和反相输入端之间以提供低噪声，快速稳定操作。

8. 发明授权

US5353001A Hybrid integrated circuit planar transformer 失效
标题翻译：混合集成电路平面变压器
公开(公告)号：US5353001A
公开(公告)日：1994-10-04
申请号：US969508
申请日：1992-10-30
申请人： Walter B. Meinel , R. Mark Stitt, II
发明人： Walter B. Meinel , R. Mark Stitt, II
IPC分类号： H01F19/00 , H01F17/00 , H01F19/04 , H01F27/255 , H01F27/28 , H05K1/16 , H01F27/26 , H01F27/30
CPC分类号： H01F19/04 , H01F17/0006 , H05K1/165 , H05K2201/086 , H05K2201/09063 , Y10T29/4902
摘要： A planar transformer includes a multilayer printed circuit board having a plurality of spiral windings formed by metalization on various surfaces of the printed circuit board. A ferrite core assembly includes first and second core sections disposed on opposite sides of the printed circuit board and completely confining the conductors of the spiral windings. Each core section includes a thin, flat plate. The two flat plates are integral with or abut thin post sections that are thick enough to allow the printed circuit board to be accommodated between the first and second core sections. In one embodiment of the invention, the planar transformer is incorporated on the printed circuit board with other circuitry to form a low noise battery charger which is encapsulated in a male power connector.
摘要翻译：平面变压器包括多层印刷电路板，其具有通过在印刷电路板的各个表面上的金属化形成的多个螺旋绕组。铁氧体磁芯组件包括设置在印刷电路板的相对侧上的第一和第二磁芯部分，并完全限制螺旋绕组的导体。每个芯部分包括一个薄的平板。两个平板与足够厚的薄柱部分是一体的或邻接的，使得印刷电路板能够容纳在第一和第二芯部之间。在本发明的一个实施例中，平面变压器与其他电路结合在印刷电路板上，以形成封装在公电源连接器中的低噪声电池充电器。

9. 发明授权

US4999585A Circuit technique for cancelling non-linear capacitor-induced harmonic distortion 失效
标题翻译：用于消除非线性电容器引起的谐波失真的电路技术
公开(公告)号：US4999585A
公开(公告)日：1991-03-12
申请号：US432544
申请日：1989-11-06
申请人： Rodney T. Burt , Timothy V. Kalthoff , David A. Heisley , R. Mark Stitt, II
发明人： Rodney T. Burt , Timothy V. Kalthoff , David A. Heisley , R. Mark Stitt, II
IPC分类号： H03F1/32
CPC分类号： H03F1/32 , H03F2200/261
摘要： Circuitry for reducing harmonic distortion in an amplifier includes a first transistor having a first non-linear collector-to-substrate capacitance, a first load device coupled to a collector of the first transistor, a first current source coupled to an emitter of the first transistor, a first conductor conducting an input voltage coupled to a base of the first transistor, and a second conductor coupled to the first load device and conducting an output voltage of the amplifier. The first transistor produces a first non-linear current in the first non-linear collector-to-substrate capacitance in response to the input voltage. A second transistor has a second non-linear collector-to-substrate capacitance. A second current source is coupled to an emitter of the second transistor. The first conductor is coupled to apply the input voltage to a base of the second transistor. The second transistor produces a second non-linear current in the second non-linear collector-to-substrate capacitance in response to the input voltage. A current mirror receives a collector current of the second transistor. The current mirror produces in the second conductor a correction signal substantially equal and opposite to the first non-linear current.
摘要翻译：用于减小放大器中的谐波失真的电路包括具有第一非线性集电极到衬底电容的第一晶体管，耦合到第一晶体管的集电极的第一负载装置，耦合到第一晶体管的发射极的第一电流源传导耦合到第一晶体管的基极的输入电压的第一导体和耦合到第一负载装置并传导放大器的输出电压的第二导体。第一晶体管响应于输入电压在第一非线性集电极到衬底电容中产生第一非线性电流。第二晶体管具有第二非线性集电极到衬底电容。第二电流源耦合到第二晶体管的发射极。第一导体被耦合以将输入电压施加到第二晶体管的基极。第二晶体管响应于输入电压在第二非线性集电极到基板电容中产生第二非线性电流。电流镜接收第二晶体管的集电极电流。电流镜在第二导体中产生与第一非线性电流基本相等和相反的校正信号。

10. 发明授权

US4897616A Wide band amplifier with current mirror feedback to bias circuit 失效
标题翻译：宽带放大器，电流镜反馈到偏置电路
公开(公告)号：US4897616A
公开(公告)日：1990-01-30
申请号：US223796
申请日：1988-07-25
申请人： Anthony D. Wang , R. Mark Stitt, II
发明人： Anthony D. Wang , R. Mark Stitt, II
IPC分类号： H03F1/42 , H03F1/30 , H03F1/52 , H03F3/30 , H03F3/343 , H03F3/347
CPC分类号： H03F3/3076 , H03F1/307
摘要： A wideband integrated circuit amplifier includes a pair of current mirror circuits sensing emitter currents of NPN and PNP transistors in the amplifier output stage. A pair of current mirror circuits divide the emitter currents, respectively, by a factor of 20. The current mirror output currents are summed, current splitter directs approximately 1/20 of the summed mirror currents through a transistor, the collector of which is coupled to the gate electrode of a field effect input transistor of a bias control circuit, to produce a scaled down feedback current. A high impedance current source is connected to the collector of the transistor. The bias circuit adjusts the DC bias voltage applied between the base electrodes of the transistors to cause the scaled down feedback current to equal the constant current. A very small compensation capacitor produces a low frequency pole that prevents the bias circuit from interfering with high frequency performance characteristics of a wide band amplifier.
摘要翻译：宽带集成电路放大器包括一对在放大器输出级中感测NPN和PNP晶体管的发射极电流的电流镜电路。一对电流镜电路分别将发射极电流分成20倍。电流反射镜输出电流相加，电流分流器将大约1/20的总和镜电流引导通过晶体管，其集电极耦合到偏置控制电路的场效应输入晶体管的栅电极，以产生按比例缩小的反馈电流。高阻抗电流源连接到晶体管的集电极。偏置电路调节施加在晶体管的基极之间的直流偏置电压，使缩小的反馈电流等于恒定电流。一个非常小的补偿电容产生一个低频极点，防止偏置电路干扰宽带放大器的高频性能特性。

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