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1. 发明申请

US20130029485A1 METHOD OF MAKING A DIE WITH RECESSED ALUMIUM DIE PADS 有权
标题翻译：制造具有凹陷的铝合金垫片的方法
公开(公告)号：US20130029485A1
公开(公告)日：2013-01-31
申请号：US13192976
申请日：2011-07-28
申请人： Gregory S. Spencer , Phillip E. Crabtree , Dean J. Denning , Kurt H. Junker , Gerald A. Martin
发明人： Gregory S. Spencer , Phillip E. Crabtree , Dean J. Denning , Kurt H. Junker , Gerald A. Martin
IPC分类号： H01L21/283
CPC分类号： H01L21/76879 , H01L21/31053 , H01L21/31056 , H01L21/76804 , H01L21/76885 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/0345 , H01L2224/0362 , H01L2224/0391 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05556 , H01L2224/05567 , H01L2224/05572 , H01L2224/05582 , H01L2224/05624 , H01L2224/05681 , H01L2224/05686 , H01L2924/00014 , H01L2924/1305 , H01L2924/1461 , H01L2924/00012 , H01L2924/04941 , H01L2924/01029 , H01L2924/00 , H01L2224/05552
摘要： A method for making a semiconductor device comprises forming an electrical interconnect layer, forming a first dielectric layer over the interconnect layer, forming an opening in the first dielectric layer over a first electrical interconnect of the interconnect layer, forming an aluminum layer over the first dielectric layer, etching the aluminum layer to form an aluminum die pad, forming a second dielectric layer over the aluminum die pad and the first dielectric layer, and forming a conductive via through the first and second dielectric layers to contact a second electrical interconnect of the interconnect layer.
摘要翻译：制造半导体器件的方法包括形成电互连层，在互连层上形成第一介电层，在互连层的第一电互连上在第一介电层中形成开口，在第一电介质上形成铝层蚀刻所述铝层以形成铝管芯焊盘，在所述铝管芯焊盘和所述第一介电层上形成第二电介质层，以及通过所述第一和第二电介质层形成导电通孔以接触所述互连的第二电互连层。

2. 发明授权

US07256113B1 System for forming a semiconductor device and method thereof 有权
标题翻译：用于形成半导体器件的系统及其方法
公开(公告)号：US07256113B1
公开(公告)日：2007-08-14
申请号：US10058708
申请日：2002-01-28
申请人： Kay Hellig , Phillip E. Crabtree , Massud Aminpur
发明人： Kay Hellig , Phillip E. Crabtree , Massud Aminpur
IPC分类号： H01L21/28
CPC分类号： H01L29/6659 , H01L29/665 , H01L29/6653 , H01L29/6656 , H01L29/66598 , H01L29/7833
摘要： A method for fabricating sidewall spacers in the manufacture of an integrated circuit device is disclosed. A dielectric spacer layer is formed over the semiconductor substrate. The dielectric spacer layer is etched prior to forming a layer subsequent to the dielectric layer, to form an L-shaped spacer. In another embodiment, a structure is formed on a substrate, the structure having a sidewall portion that is substantially orthogonal to a surface of the substrate. A dielectric layer is formed over the substrate. A spacer is formed over a portion of the dielectric layer and adjacent to the sidewall portion of the structure, wherein at least a portion of the dielectric layer over the substrate without an overlying oxide spacer is an unprotected portion of the dielectric. At least a part of the unprotected portion of the dielectric layer is removed. An intermediate source-drain region can be formed beneath a portion of the L-shaped spacer by controlling the thickness and/or the source drain doping levels.
摘要翻译：公开了一种在制造集成电路器件中制造侧壁间隔物的方法。在半导体衬底上形成电介质间隔层。在形成电介质层之后的层之前蚀刻电介质间隔层，以形成L形间隔物。在另一个实施例中，在衬底上形成结构，该结构具有基本上垂直于衬底表面的侧壁部分。介电层形成在衬底上。间隔物形成在电介质层的一部分上并与结构的侧壁部分相邻，其中绝缘层上的至少一部分电介质层没有上覆的氧化物间隔物是电介质的未被保护的部分。去除介电层的未保护部分的至少一部分。通过控制厚度和/或源极漏极掺杂水平，可以在L形间隔物的一部分之下形成中间源极 - 漏极区。

3. 发明授权

US06232134B1 Method and apparatus for monitoring wafer characteristics and/or semiconductor processing consistency using wafer charge distribution measurements 失效
标题翻译：使用晶片电荷分布测量来监测晶片特性和/或半导体处理一致性的方法和装置
公开(公告)号：US06232134B1
公开(公告)日：2001-05-15
申请号：US09490125
申请日：2000-01-24
申请人： David Gerald Farber , Wei E. Wu , Phillip E. Crabtree
发明人： David Gerald Farber , Wei E. Wu , Phillip E. Crabtree
IPC分类号： H01L2100
CPC分类号： H01L22/20
摘要： A method and apparatus for characterizing processing operations is presented. Following exposure of a wafer to plasma, the surface charge distribution pattern on the wafer is measured. The surface charge distribution pattern on the wafer is then compared with known surface charge distribution patterns to determine if the measured charge distribution pattern correlates to desirable patterns associated with successful performance of one or more processing steps. In some embodiments, the comparison of the measured charge distribution pattern can be used to detect specific problems in one or more processing steps such that corrective action can be taken in a timely manner. The comparison between the measured charge distribution pattern and known charge distribution patterns may be performed using image comparison or using quantitative comparisons based on charge levels measured within each pattern.
摘要翻译：提出了一种用于表征处理操作的方法和装置。在将晶片暴露于等离子体之后，测量晶片上的表面电荷分布图案。然后将晶片上的表面电荷分布图案与已知的表面电荷分布图案进行比较，以确定测量的电荷分布模式是否与一个或多个处理步骤的成功执行相关联的期望模式相关。在一些实施例中，所测量的电荷分布模式的比较可用于检测一个或多个处理步骤中的特定问题，从而能够及时地进行校正动作。可以使用图像比较或使用基于每个图案中测量的电荷水平的定量比较来执行所测量的电荷分布图案与已知电荷分布图案之间的比较。

4. 发明授权

US08722530B2 Method of making a die with recessed aluminum die pads 有权
标题翻译：用凹槽铝模片制作模具的方法
公开(公告)号：US08722530B2
公开(公告)日：2014-05-13
申请号：US13192976
申请日：2011-07-28
申请人： Gregory S. Spencer , Phillip E. Crabtree , Dean J. Denning , Kurt H. Junker , Gerald A. Martin
发明人： Gregory S. Spencer , Phillip E. Crabtree , Dean J. Denning , Kurt H. Junker , Gerald A. Martin
IPC分类号： H01L23/48 , H01L33/62 , H01L21/768 , H01L23/488
CPC分类号： H01L21/76879 , H01L21/31053 , H01L21/31056 , H01L21/76804 , H01L21/76885 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/0345 , H01L2224/0362 , H01L2224/0391 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05556 , H01L2224/05567 , H01L2224/05572 , H01L2224/05582 , H01L2224/05624 , H01L2224/05681 , H01L2224/05686 , H01L2924/00014 , H01L2924/1305 , H01L2924/1461 , H01L2924/00012 , H01L2924/04941 , H01L2924/01029 , H01L2924/00 , H01L2224/05552
摘要： A method for making a semiconductor device comprises forming an electrical interconnect layer, forming a first dielectric layer over the interconnect layer, forming an opening in the first dielectric layer over a first electrical interconnect of the interconnect layer, forming an aluminum layer over the first dielectric layer, etching the aluminum layer to form an aluminum die pad, forming a second dielectric layer over the aluminum die pad and the first dielectric layer, and forming a conductive via through the first and second dielectric layers to contact a second electrical interconnect of the interconnect layer.
摘要翻译：制造半导体器件的方法包括形成电互连层，在互连层上形成第一介电层，在互连层的第一电互连上在第一介电层中形成开口，在第一电介质上形成铝层蚀刻所述铝层以形成铝管芯焊盘，在所述铝管芯焊盘和所述第一介电层上形成第二电介质层，以及通过所述第一和第二电介质层形成导电通孔以接触所述互连的第二电互连层。

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