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1. 发明授权

US08689604B2 Offset error automatic calibration integrated circuit 有权
标题翻译：偏移误差自动校准集成电路
公开(公告)号：US08689604B2
公开(公告)日：2014-04-08
申请号：US13671951
申请日：2012-11-08
申请人： Peter S. Schultz , Sung-Jin Jo
发明人： Peter S. Schultz , Sung-Jin Jo
IPC分类号： G01D18/00
CPC分类号： G01D18/008
摘要： An integrated circuit includes a transducer and transducer circuitry and additional elements useful in testing the transducer and transducer circuitry. A first power supply terminal and a second power supply terminal are for being directly connected to an external power supply terminal. A power bus is connected to the first power supply terminal. A logic function is for determining if the second power supply terminal is receiving power and if an automatic calibration test of the transducer and transducer circuitry has been run. An automatic calibration is for running an automatic calibration test on the transducer and transducer circuitry if the logic means determines that the second power supply terminal is receiving power and the automatic calibration test of the transducer and transducer circuitry has not been run.
摘要翻译：集成电路包括换能器和换能器电路以及用于测试换能器和换能器电路的附加元件。第一电源端子和第二电源端子用于直接连接到外部电源端子。电源总线连接到第一电源端子。逻辑功能用于确定第二电源端子是否正在接收电力，以及是否已经运行了换能器和换能器电路的自动校准测试。如果逻辑手段确定第二个电源端子正在接收电力，并且换能器和换能器电路的自动校准测试尚未运行，则自动校准用于对换能器和换能器电路进行自动校准测试。

2. 发明申请

US20130061649A1 OFFSET ERROR AUTOMATIC CALIBRATION INTEGRATED CIRCUIT 有权
标题翻译：偏移自动校准集成电路
公开(公告)号：US20130061649A1
公开(公告)日：2013-03-14
申请号：US13671951
申请日：2012-11-08
申请人： PETER S. SCHULTZ , SUNG-JIN JO
发明人： PETER S. SCHULTZ , SUNG-JIN JO
IPC分类号： G01D18/00
CPC分类号： G01D18/008
摘要： An integrated circuit includes a transducer and transducer circuitry and additional elements useful in testing the transducer and transducer circuitry. A first power supply terminal and a second power supply terminal are for being directly connected to an external power supply terminal. A power bus is connected to the first power supply terminal. A logic function is for determining if the second power supply terminal is receiving power and if an automatic calibration test of the transducer and transducer circuitry has been run. An automatic calibration is for running an automatic calibration test on the transducer and transducer circuitry if the logic means determines that the second power supply terminal is receiving power and the automatic calibration test of the transducer and transducer circuitry has not been run.
摘要翻译：集成电路包括换能器和换能器电路以及用于测试换能器和换能器电路的附加元件。第一电源端子和第二电源端子用于直接连接到外部电源端子。电源总线连接到第一电源端子。逻辑功能用于确定第二电源端子是否正在接收电力，以及是否已经运行了换能器和换能器电路的自动校准测试。如果逻辑手段确定第二个电源端子正在接收电力，并且换能器和换能器电路的自动校准测试尚未运行，则自动校准用于对换能器和换能器电路进行自动校准测试。

3. 发明授权

US08321170B2 Offset error automatic calibration integrated circuit 有权
标题翻译：偏移误差自动校准集成电路
公开(公告)号：US08321170B2
公开(公告)日：2012-11-27
申请号：US12709063
申请日：2010-02-19
申请人： Peter S. Schultz , Sung-Jin Jo
发明人： Peter S. Schultz , Sung-Jin Jo
IPC分类号： G01D18/00 , G06F19/00
CPC分类号： G01D18/008
摘要： An integrated circuit includes a transducer and transducer circuitry and additional elements useful in testing the transducer and transducer circuitry. A first power supply terminal and a second power supply terminal are for being directly connected to an external power supply terminal. A power bus is connected to the first power supply terminal. A logic function is for determining if the second power supply terminal is receiving power and if an automatic calibration test of the transducer and transducer circuitry has been run. An automatic calibration is for running an automatic calibration test on the transducer and transducer circuitry if the logic means determines that the second power supply terminal is receiving power and the automatic calibration test of the transducer and transducer circuitry has not been run.
摘要翻译：集成电路包括换能器和换能器电路以及用于测试换能器和换能器电路的附加元件。第一电源端子和第二电源端子用于直接连接到外部电源端子。电源总线连接到第一电源端子。逻辑功能用于确定第二电源端子是否正在接收电力，以及是否已经运行了换能器和换能器电路的自动校准测试。如果逻辑手段确定第二个电源端子正在接收电力，并且换能器和换能器电路的自动校准测试尚未运行，则自动校准用于对换能器和换能器电路进行自动校准测试。

4. 发明申请

US20120216616A1 MEMS Device With Enhanced Resistance to Stiction 有权
标题翻译：具有增强的抗静电性的MEMS器件
公开(公告)号：US20120216616A1
公开(公告)日：2012-08-30
申请号：US13033854
申请日：2011-02-24
申请人： Peter S. Schultz
发明人： Peter S. Schultz
IPC分类号： G01P15/02
CPC分类号： G01P15/125 , G01P2015/0834 , G01P2015/0871
摘要： A MEMS device (20) includes a substrate (24) and a movable element (22) adapted for motion relative to the substrate (24). A secondary structure (46) extends from the movable element (22). The secondary structure (46) includes a secondary mass (54) and a spring (56) interconnected between the movable element (22) and the mass (54). The spring (56) is sufficiently stiff to prevent movement of the mass (54) when the movable element (22) is subjected to force within a sensing range of the device (20). When the device (20) is subjected to mechanical shock (66), the spring (56) deflects so that the mass (54) moves counter to the motion of the movable element (22). Movement of the mass (54) causes the movable element (22) to vibrate to mitigate stiction between the movable element (22) and other structures of the device (20) and/or to prevent breakage of components within the device (22).
摘要翻译： MEMS器件（20）包括适于相对于衬底（24）运动的衬底（24）和可移动元件（22）。二级结构（46）从可移动元件（22）延伸。二次结构（46）包括互连在可移动元件（22）和质量块（54）之间的二次质量块（54）和弹簧（56）。当可移动元件（22）在设备（20）的感测范围内受到力时，弹簧（56）足够坚固以防止质量块（54）的移动。当装置（20）经受机械冲击（66）时，弹簧（56）偏转，使得质量块（54）相对于可移动元件（22）的运动而移动。质量块（54）的移动导致可移动元件（22）振动以减轻可移动元件（22）和设备（20）的其他结构之间的静摩擦和/或防止元件（22）内的部件损坏。

5. 发明申请

US20070269926A1 METHOD AND APPARATUS FOR FORMING AN ELECTRICAL CONNECTION TO A SEMICONDUCTOR SUBSTRATE 有权
标题翻译：用于形成电连接到半导体衬底的方法和装置
公开(公告)号：US20070269926A1
公开(公告)日：2007-11-22
申请号：US11383659
申请日：2006-05-16
申请人： Peter S. Schultz
发明人： Peter S. Schultz
IPC分类号： H01L21/00
CPC分类号： B81B7/007 , H01L23/552 , H01L24/02 , H01L2924/14 , H01L2924/3025
摘要： A device (100) may use one or more conductive elements (112) to electrically couple a substrate (116) and a cap (114). In one embodiment, an acceleration sense element may be formed on the substrate (116), and the cap (114) may be used to provide hermetic protection to the acceleration sense element. In one embodiment, conductive elements (112) may be formed by dispensing conductive die attach material. Wire bonds (e.g. 322) bonded to bond pads (e.g. 332) on the substrate (e.g. 316) may be used to couple substrate (116), the conductive element pad (335), and the cap (114), to a desired predetermined potential.
摘要翻译：设备（100）可以使用一个或多个导电元件（112）来电耦合衬底（116）和帽（114）。在一个实施例中，可以在基板（116）上形成加速度感测元件，并且帽（114）可用于向加速度感测元件提供气密保护。在一个实施例中，导电元件（112）可以通过分配导电芯片附接材料而形成。结合到衬底（例如316）上的接合焊盘（例如332）的引线接合（例如322）可用于将衬底（116），导电元件衬垫（335）和帽（114）耦合到期望的预定潜在。

6. 发明申请

US20140122013A1 SENSOR SINGLE TRACK TRIM USING STATIONARY HARDWARE AND FIELDS 有权
标题翻译：传感器单轨跟踪使用静态硬件和字段
公开(公告)号：US20140122013A1
公开(公告)日：2014-05-01
申请号：US13663998
申请日：2012-10-30
申请人： PETER S. SCHULTZ
发明人： PETER S. SCHULTZ
IPC分类号： G01D7/00 , G01P15/18 , G01R33/02 , G06F15/00
CPC分类号： G01R33/0286 , G01D21/00 , G01L25/00 , G01P15/18 , G01P21/00 , G01R33/0035 , G01R33/0206 , G06F17/40 , G06F19/00
摘要： A testing environment is provided in which both accelerometers and magnetometers can be tested in parallel, thereby decreasing the total cycle time for testing a semiconductor device package containing those devices. Embodiments of the present invention can also be configured to test singulated packages, thereby providing a tested and trimmed product that more accurately reflects the package delivered to the customer. In one embodiment, a series of device test locations within a testing region are configured to provide a known relationship with multiple fields of force. The device test locations are configured to provide sensitivity data from the packaged sensors in response to the directional forces. Embodiments provide a mechanism to transport the sensor packages from a device test location to a next device test location.
摘要翻译：提供了测试环境，其中可以并行测试加速度计和磁力计，从而减少用于测试包含这些装置的半导体器件封装的总周期时间。本发明的实施例还可以被配置为测试单个包装，从而提供更准确地反映递送给顾客的包装的经过测试和修剪的产品。在一个实施例中，测试区域内的一系列设备测试位置被配置为提供与多个力场的已知关系。设备测试位置被配置为响应于定向力提供来自封装传感器的灵敏度数据。实施例提供了一种将传感器封装从设备测试位置传输到下一个设备测试位置的机制。

7. 发明授权

US08596123B2 MEMS device with impacting structure for enhanced resistance to stiction 有权
标题翻译：具有冲击结构的MEMS器件，用于增强抗静电性能
公开(公告)号：US08596123B2
公开(公告)日：2013-12-03
申请号：US13101793
申请日：2011-05-05
申请人： Peter S. Schultz
发明人： Peter S. Schultz
IPC分类号： G01P15/125
CPC分类号： B81B3/0016
摘要： A microelectromechanical systems (MEMS) device (20) includes a substrate (24) and a movable element (22) adapted for motion relative to the substrate (24). A secondary structure (58) extends from the movable element (22). The secondary structure (58) includes a secondary mass (70) and a spring (68) interconnected between the movable element (22) and the mass (70). The spring (68) is sufficiently stiff to prevent movement of the mass (70) when the movable element (22) is subjected to force within a sensing range of the device (20). However, the spring (68) deflects when the device (20) is subjected to mechanical shock (86), and the spring (68) rebounds thus causing the mass (70) to impact the movable element (22) in a direction that would be likely to dislodge a potentially stuck movable element (22).
摘要翻译：微机电系统（MEMS）装置（20）包括适于相对于衬底（24）运动的衬底（24）和可移动元件（22）。二级结构（58）从可移动元件（22）延伸。二次结构（58）包括互连在可移动元件（22）和质量块（70）之间的二次质量块（70）和弹簧（68）。当可移动元件（22）在设备（20）的感测范围内受到力时，弹簧（68）足够坚固以防止质量块（70）的移动。然而，当装置（20）受到机械冲击（86）时，弹簧（68）偏转，并且弹簧（68）反弹，从而导致质量块（70）在可能的方向上冲击可移动元件（22）可能会移动潜在的可移动元件（22）。

8. 发明申请

US20120280591A1 MEMS DEVICE WITH IMPACTING STRUCTURE FOR ENHANCED RESISTANCE TO STICTION 有权
标题翻译：具有增强电阻的影响结构的MEMS器件
公开(公告)号：US20120280591A1
公开(公告)日：2012-11-08
申请号：US13101793
申请日：2011-05-05
申请人： Peter S. Schultz
发明人： Peter S. Schultz
IPC分类号： H02N1/08
CPC分类号： B81B3/0016
摘要： A microelectromechanical systems (MEMS) device (20) includes a substrate (24) and a movable element (22) adapted for motion relative to the substrate (24). A secondary structure (58) extends from the movable element (22). The secondary structure (58) includes a secondary mass (70) and a spring (68) interconnected between the movable element (22) and the mass (70). The spring (68) is sufficiently stiff to prevent movement of the mass (70) when the movable element (22) is subjected to force within a sensing range of the device (20). However, the spring (68) deflects when the device (20) is subjected to mechanical shock (86), and the spring (68) rebounds thus causing the mass (70) to impact the movable element (22) in a direction that would be likely to dislodge a potentially stuck movable element (22).
摘要翻译：微机电系统（MEMS）装置（20）包括适于相对于衬底（24）运动的衬底（24）和可移动元件（22）。二级结构（58）从可移动元件（22）延伸。二次结构（58）包括互连在可移动元件（22）和质量块（70）之间的二次质量块（70）和弹簧（68）。当可移动元件（22）在设备（20）的感测范围内受到力时，弹簧（68）足够坚固以防止质量块（70）的移动。然而，当装置（20）受到机械冲击（86）时，弹簧（68）偏转，并且弹簧（68）反弹，从而导致质量块（70）在可能的方向上冲击可移动元件（22）可能会移动潜在的可移动元件（22）。

9. 发明申请

US20110208460A1 OFFSET ERROR AUTOMATIC CALIBRATION INTEGRATED CIRCUIT 有权
标题翻译：偏移自动校准集成电路
公开(公告)号：US20110208460A1
公开(公告)日：2011-08-25
申请号：US12709063
申请日：2010-02-19
申请人： Peter S. Schultz , Sung-Jin Jo
发明人： Peter S. Schultz , Sung-Jin Jo
IPC分类号： G01D18/00 , G06F19/00
CPC分类号： G01D18/008
摘要： An integrated circuit includes a transducer and transducer circuitry and additional elements useful in testing the transducer and transducer circuitry. A first power supply terminal and a second power supply terminal are for being directly connected to an external power supply terminal. A power bus is connected to the first power supply terminal. A logic function is for determining if the second power supply terminal is receiving power and if an automatic calibration test of the transducer and transducer circuitry has been run. An automatic calibration is for running an automatic calibration test on the transducer and transducer circuitry if the logic means determines that the second power supply terminal is receiving power and the automatic calibration test of the transducer and transducer circuitry has not been run.
摘要翻译：集成电路包括换能器和换能器电路以及用于测试换能器和换能器电路的附加元件。第一电源端子和第二电源端子用于直接连接到外部电源端子。电源总线连接到第一电源端子。逻辑功能用于确定第二电源端子是否正在接收电力，以及是否已经运行了换能器和换能器电路的自动校准测试。如果逻辑手段确定第二个电源端子正在接收电力，并且换能器和换能器电路的自动校准测试尚未运行，则自动校准用于对换能器和换能器电路进行自动校准测试。

10. 发明申请

US20140329344A1 TESTING AN ELECTRICAL CONNECTION OF A DEVICE CAP 有权
标题翻译：测试设备盖的电气连接
公开(公告)号：US20140329344A1
公开(公告)日：2014-11-06
申请号：US13887233
申请日：2013-05-03
申请人： Peter S. Schultz
发明人： Peter S. Schultz
IPC分类号： G01R31/04 , H01L21/66
CPC分类号： H01L22/14 , H01L2924/0002 , H01L2924/00
摘要： A method of testing a device includes setting a potential of a cap terminal of the device to a first voltage, setting a potential of a self test plate of the device to a testing voltage, and detecting a first displacement of a proof mass of the device when the cap terminal is set to the first voltage and the self test plate is set to the testing voltage. The method includes setting a potential of the cap terminal of the device to a second voltage, detecting a second displacement of the proof mass of the device when the cap terminal is set to the second voltage and the self test plate is set to the testing voltage, and comparing the first displacement and the second displacement to evaluate an electrical connection between the cap terminal and a cap of the device.
摘要翻译：一种测试装置的方法包括将装置的盖子端子的电位设置为第一电压，将装置的自测试板的电位设置为测试电压，以及检测装置的检验质量的第一位移当帽子端子被设置为第一电压并且自测试板被设置为测试电压时。所述方法包括将所述装置的所述盖子端子的电位设定为第二电压，当所述盖子端子被设定为所述第二电压时，检测所述装置的检验质量的第二位移，并且所述自检板被设定为所述测试电压，并且比较第一位移和第二位移以评估帽端子和装置的盖之间的电连接。

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