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1. 发明授权

US06549150B1 Integrated test structure and method for verification of microelectronic devices 失效
标题翻译：用于微电子器件验证的集成测试结构和方法
公开(公告)号：US06549150B1
公开(公告)日：2003-04-15
申请号：US09682536
申请日：2001-09-17
申请人： Raymond J. Bulaga , John K. Masi , Patrick W. Miller , Mark S. Styduhar , Donald L. Wheater
发明人： Raymond J. Bulaga , John K. Masi , Patrick W. Miller , Mark S. Styduhar , Donald L. Wheater
IPC分类号： H03M110
CPC分类号： H03M1/108 , H03M1/66
摘要： An integrated test structure adapted to facilitate manufacturing verification of microelectronic devices such as Digital to Analog Converters (DAC) is disclosed. The test circuitry and the Circuit Under Test (CUT) are placed on an IC along with an arbitrary amount of digital logic, which drives the input of the CUT. These inputs are translated into an analog output. During a manufacturing test, this output is measured in order to determine that the IC has been manufactured correctly. The analog input of the circuit is coupled to the analog output of the DAC. The digital output of the test circuitry is coupled to the digital logic on the IC. This configuration comprises a Built In Self Test (BIST) structure. The invention allows BIST by eliminating the need to measure the analog output of the DAC external to the IC, and enables testing the CUT by using standard digital BIST techniques.
摘要翻译：公开了一种适于促进诸如数模转换器（DAC）的微电子器件的制造验证的集成测试结构。测试电路和被测电路（CUT）放置在IC上以及任意数量的数字逻辑，驱动CUT的输入。这些输入被转换为模拟输出。在制造测试期间，测量该输出以确定IC已被正确地制造。电路的模拟输入耦合到DAC的模拟输出。测试电路的数字输出耦合到IC上的数字逻辑。该配置包括内置自检（BIST）结构。本发明通过消除对IC外部DAC的模拟输出的需求而允许BIST，并且能够使用标准数字BIST技术来测试CUT。

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