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1. 发明授权

US06558110B2 Tray input-output module 失效
公开(公告)号：US06558110B2
公开(公告)日：2003-05-06
申请号：US09867412
申请日：2001-05-31
申请人： Weng-Jung Lu , Chin-Yuan Liu , Chun-Kuei Lai , Pang-Min Chiang , Chih-Min Lin
发明人： Weng-Jung Lu , Chin-Yuan Liu , Chun-Kuei Lai , Pang-Min Chiang , Chih-Min Lin
IPC分类号： B65G5906
CPC分类号： H01L21/68707
摘要： A Tray input-output module, comprising a power unit, a clamp unit and a support unit, is capable of automatically retrieving a tray from a transport device and automatically delivering a tray to a transport device for facilitating automation in chip sorter operation, reducing manual work and raising productivity.

2. 发明授权

US06803329B2 Method for low temperature liquid-phase deposition and method for cleaning liquid-phase deposition apparatus 失效
标题翻译：低温液相沉积方法及清洗液相沉积装置的方法
公开(公告)号：US06803329B2
公开(公告)日：2004-10-12
申请号：US10342245
申请日：2003-01-15
申请人： Edward Y. Chang , Muh-Wang Liang , Shih-Ming Chiang , Chih-Yuan Tseng , Pang-Min Chiang
发明人： Edward Y. Chang , Muh-Wang Liang , Shih-Ming Chiang , Chih-Yuan Tseng , Pang-Min Chiang
IPC分类号： H01L2131
CPC分类号： H01L21/02282 , H01L21/316 , H01L23/3192 , H01L29/66462 , H01L2924/0002 , H01L2924/00
摘要： A method for low temperature liquid-phase deposition and a method for cleaning a liquid-phase deposition apparatus are disclosed. The method for low temperature liquid-phase deposition is employed so as to form a low-temperature grown film or a film with excellent step-coverage on the surface of a semiconductor device having independent circuit functions. The method for cleaning liquid-phase deposition apparatus is characterized in that a loop used exclusively for cleaning is employed so as to prevent SiO2 powders from remaining in the loop.
摘要翻译：公开了低温液相沉积的方法和清洗液相沉积设备的方法。采用低温液相沉积的方法，以便在具有独立电路功能的半导体器件的表面上形成低温生长膜或具有优异的阶梯覆盖的膜。清洗液相沉积装置的方法的特征在于，采用专门用于清洗的环，以防止SiO 2粉末残留在回路中。

3. 发明授权

US06653245B2 Method for liquid phase deposition 失效
标题翻译：液相沉积方法
公开(公告)号：US06653245B2
公开(公告)日：2003-11-25
申请号：US09874108
申请日：2001-06-06
申请人： Muh-Wang Liang , Pang-Min Chiang , Chen Max , Jen-Rong Huang , Ching-Fa Yeh
发明人： Muh-Wang Liang , Pang-Min Chiang , Chen Max , Jen-Rong Huang , Ching-Fa Yeh
IPC分类号： H01L2131
CPC分类号： H01L21/67086 , H01L21/316 , Y10T137/4643 , Y10T137/4891 , Y10T137/5386 , Y10T137/5474 , Y10T137/8593 , Y10T307/779
摘要： A method for liquid phase deposition, including the steps of providing at least two raw materials from at least two supply devices of a saturation reaction system into a mixture trough and stirring until saturation occurs, filtering out unnecessary solid-state particles, and providing saturated and filtered liquid into an over-saturation reaction trough of a steady-flow over-saturation loop reaction system and stopping the saturated and filtered liquid when the over-saturation reaction trough is filled and the saturated and filtered liquid over-flows into a liquid level control trough to a pre-determined level. The method also includes the steps of providing a substrate in the over-saturation reaction trough, providing reactants from at least two supply devices into the over-saturation reaction trough, and depositing a thin film onto the substrate when the saturated liquid becomes over-saturated.
摘要翻译：一种用于液相沉积的方法，包括以下步骤：将饱和反应体系的至少两个供应装置的至少两种原料提供到混合物槽中，并搅拌直到饱和发生，过滤不需要的固态颗粒，并提供饱和和过滤液体进入稳流过饱和环路反应系统的过饱和反应槽，当过饱和反应槽填满时停止饱和和过滤的液体，饱和和过滤的液体过量流入液位控制低谷达到预定水平。该方法还包括以下步骤：在过饱和反应槽中提供衬底，将反应物从至少两个供应装置提供到过饱和反应槽中，并且当饱和液体变得过度饱和时，将薄膜沉积到衬底上。

4. 发明授权

US06653235B2 Fabricating process for forming multi-layered metal bumps by electroless plating 有权
公开(公告)号：US06653235B2
公开(公告)日：2003-11-25
申请号：US09887074
申请日：2001-06-25
申请人： Muh-Wang Liang , Yi-Hsiu Tseng , Pang-Min Chiang
发明人： Muh-Wang Liang , Yi-Hsiu Tseng , Pang-Min Chiang
IPC分类号： H01L2100
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/05001 , H01L2224/05022 , H01L2224/05548 , H01L2224/1147 , H01L2224/13099 , H01L2224/131 , H01L2224/13155 , H01L2224/13644 , H01L2224/13647 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/00014 , H01L2224/05647 , H01L2224/05124 , H01L2224/05147
摘要： The present invention provides a fabricating process for forming multi-layered metal bumps by electroless plating, comprising the steps of: providing an IC chip or a semiconductor substrate on which there are provided a plurality of pads; dispensing a first dielectric layer, exposing the pads, roughing the surface to be redistributed by chemical or physical approaches, activating the surface in order to follow-up electroless plating deposition advantageously, and dispensing a second dielectric layer so as to define a redistribution path; depositing a conductive film on the redistribution path by electroless plating, in which the conductive film allows the positions of the pads to be changed so as to be connected to the external circuit; forming a photoresist pattern, exposing a plurality of pre-determined positions on the conductive film so as to redistribute the positions for the metal bumps formed later; performing activation on the pre-determined positions so as to generate an activator; forming initial metal bumps of a pre-determined thickness on the pads by electroless plating; removing the photoresist pattern, completely exposing the metal bumps; dispensing a third dielectric layer, having a thickness less than the height of the metal bumps and a window more than the size of the metal bumps, so as to expose the metal bumps; and forming a peripheral metal layer covering the periphery of the metal bumps, in which the conductivity and the RF characteristics of the peripheral metal layer are better than those of the metal bumps so as to be electrically connected to the conductive film.

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