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1. 发明申请

WO2009091664A1 IMPROVED UNIFORMITY FOR SEMICONDUCTOR PATTERNING OPERATIONS 审中-公开
标题翻译：改进了半导体图形操作的均匀性
公开(公告)号：WO2009091664A1
公开(公告)日：2009-07-23
申请号：PCT/US2009/030479
申请日：2009-01-08
申请人： CADENCE DESIGN SYSTEMS, INC. , PIERRAT, Christophe
发明人： PIERRAT, Christophe
IPC分类号： G06F17/50
CPC分类号： H01L21/3086 , H01L21/3088 , H01L27/118
摘要： Systems and methods of semiconductor device optimization include a system and method to determine a dataset for a layer of the semiconductor device, where the operation includes receiving a dataset defining a plurality of original patterns of sacrificial material in a layer of a semiconductor device, wherein the original patterns of sacrificial material are used to define placement of spacer material to define patterning of circuit elements for the semiconductor device; determining densities of the plurality of original patterns of sacrificial material in areas across a portion of the layer of the semiconductor device; and augmenting the dataset to include an additional pattern of sacrificial material in an area of the layer having a density lower than a threshold density.
摘要翻译：半导体器件优化的系统和方法包括确定半导体器件层的数据集的系统和方法，其中操作包括在半导体器件的层中接收限定牺牲材料的多个原始图案的数据集，其中，牺牲材料的原始图案用于限定间隔物材料的放置以限定用于半导体器件的电路元件的图案化; 确定在所述半导体器件的所述层的一部分的区域中的多个原始图案的牺牲材料的密度; 以及增加所述数据集以在所述层的具有低于阈值密度的密度的区域中包括牺牲材料的附加图案。

2. 发明申请

WO2002101465A2 PHASE CONFLICT RESOLUTION FOR PHOTOLITHOGRAPHIC MASKS 审中-公开
标题翻译：相位掩蔽的相位冲突分辨率
公开(公告)号：WO2002101465A2
公开(公告)日：2002-12-19
申请号：PCT/US2002/018306
申请日：2002-06-07
申请人： NUMERICAL TECHNOLOGIES, INC. , PIERRAT, Christophe , COTE, Michel, Luc
发明人： PIERRAT, Christophe , COTE, Michel, Luc
IPC分类号： G03F7/00
CPC分类号： G03F7/70466 , G03F1/26 , G03F7/70425 , G03F7/70433 , G03F7/70558
摘要： A photolithographic mask used for defining a layer in an integrated circuit, or other work piece, where the layer comprises a pattern including a plurality of features to be implemented with phase shifting in phase shift regions is laid out including for patterns comprising high density, small dimension features, and for "full shift" patterns. The method includes identifying cutting areas for phase shift regions based on characteristics of the pattern. Next, the process cuts the phase shift regions in selected ones of the cutting areas to define phase shift windows, and assigns phase values to the phase shift windows. The phase shift values assigned comprise φ and θ, so that destructive interference is caused in transitions between adjacent phase shift windows having respective phase shift values of φ and θ. In the preferred embodiment, φ is equal to approximately θ + 180 degrees. Results of the cutting and assigning steps are stored in a computer readable medium, used for manufacturing a mask, and used for manufacturing an integrated circuit. By identifying the cutting areas based on characteristics of the pattern to be formed, the problem of dividing phase shift regions into phase shift windows, and assigning phase shift values to the windows is simplified.
摘要翻译：布置用于在集成电路或其它工件中定义层的光刻掩模，其中该层包括在相移区域中具有相移实现的多个特征的图案，包括用于高密度，小的尺寸特征和“全移”图案。该方法包括基于图案的特性识别相移区域的切割区域。接下来，该处理切割选择的切割区域中的相移区域以限定相移窗口，并将相位值分配给相移窗口。分配的相移值包括phi和theta，使得在具有各自的phi和theta的相移值的相邻相移窗口之间的转变中引起相消干涉。在优选实施例中，phi等于大约θ+ 180度。切割和分配步骤的结果存储在用于制造掩模的计算机可读介质中，并用于制造集成电路。通过基于要形成的图案的特性来识别切割区域，简化了将相移区域划分为相移窗口并将相移值分配给窗口的问题。

3. 发明申请

WO2005036603A2 DESIGN-MANUFACTURING INTERFACE VIA A UNIFIED MODEL 审中-公开
标题翻译：设计制造界面通过统一的模型
公开(公告)号：WO2005036603A2
公开(公告)日：2005-04-21
申请号：PCT/US2004033092
申请日：2004-10-07
申请人： FORTIS SYSTEMS INC , PIERRAT CHRISTOPHE , WONG ALFRED KWOK-KIT
发明人： PIERRAT CHRISTOPHE , WONG ALFRED KWOK-KIT
IPC分类号： G06F17/50 , H01L
CPC分类号： G06F17/5081 , G06F17/5036 , G06F17/5068
摘要： Subtleties of advanced fabrication processes and nano-scale phenomena associated with integrated circuit miniaturization have exposed the insufficiencies of design rules. Such inadequacies have adverse impact on all parts of the integrated circuit creation flow where design rules are used. In addition, segregation of the various layout data modification steps required for deep sub-micrometer manufacturing are resulting in slack and inefficiencies. This invention describes methods to improve integrated circuit creation via the use of a unified model of fabrication processes and circuit elements that can complement or replace design rules. By capturing the interdependence among fabrication processes and circuit elements, the unified model enables efficient layout generation, resulting in better integrated circuits.
摘要翻译：与集成电路小型化相关的先进制造工艺和纳米尺度现象的小说暴露了设计规则的不足之处。这种不足之处对于使用设计规则的集成电路创建流程的所有部分都有不利影响。另外，深亚微米制造所需的各种布局数据修改步骤的分离导致松弛和低效率。本发明描述了通过使用可以补充或替代设计规则的制造过程和电路元件的统一模型来改进集成电路创建的方法。通过捕获制造工艺和电路元件之间的相互依赖性，统一模型可实现有效的布局生成，从而形成更好的集成电路。

4. 发明申请

WO2004093148A2 EFFECTIVE PROXIMITY EFFECT CORRECTION METHODOLOGY 审中-公开
标题翻译：有效的近似效应校正方法
公开(公告)号：WO2004093148A2
公开(公告)日：2004-10-28
申请号：PCT/US2004011298
申请日：2004-04-13
申请人： FORTIS SYSTEMS INC , PIERRAT CHRISTOPHE
发明人： PIERRAT CHRISTOPHE
IPC分类号： G03C5/00 , G06F17/50 , G06K9/00 , H01L20060101 , H01L
CPC分类号： G06F17/5068 , G06F2217/12 , Y02P90/265
摘要： Proximity effect correction has become a necessary step in the fabrication of integrated circuit in order to improve the pattern fidelity of current lithography processes. Current methodology is limited by data volume increase and correction inaccuracy due to extrapolation of the correction. The invention describes a methodology based on the interpolation of the correction between selected evaluation points of the target layout. By connecting the correction points this technique also provides a mean of reducing data volume and simplifying the mask writing, inspection and repair processes. The same methodology can be applied to layouts with non-printing assist features, where the correction of the assist features is based on the quality of the image of the main feature. For vector-scan mask write tool the segments interpolating the corrections can be fractured in segments with suitable angles.
摘要翻译：接近效应校正已经成为制造集成电路的必要步骤，以提高当前光刻工艺的图案保真度。目前的方法受限于数据量增加和校正误差由于外推校正。本发明描述了基于目标布局的所选评估点之间的校正的内插的方法。通过连接校正点，该技术还提供了减少数据量并简化掩模写入，检查和修复过程的平均值。相同的方法可以应用于具有非打印辅助特征的布局，其中辅助特征的校正基于主要特征的图像的质量。对于矢量扫描掩模写入工具，内插校正的段可以以适当的角度在段中断裂。

5. 发明申请

WO2002101464A3 OPTICAL PROXIMITY CORRECTION FOR PHASE SHIFTING PHOTOLITHOGRAPHIC MASKS 审中-公开
公开(公告)号：WO2002101464A3
公开(公告)日：2002-12-19
申请号：PCT/US2002/017667
申请日：2002-06-07
申请人： NUMERICAL TECHNOLOGIES, INC. , PIERRAT, Christophe , COTE, Michel, Luc
发明人： PIERRAT, Christophe , COTE, Michel, Luc
IPC分类号： G03F1/00
摘要： A method for producing a computer readable definition of photolithographic mask used to define a target pattern is provided. The phase shift mask patterns include phase shift windows, and the trim mask patterns include trim shapes, which have boundaries defined by such sets of line segments. For a particular pair of phase shift windows used to define a target feature in a target pattern, each of the phase shift windows in the pair can be considered to have a boundary that includes at least one line segment that abuts the target feature. Likewise, a complementary trim shape used in definition of the target feature, for example by including a transmissive region used to clear an unwanted phase transition between the particular pair of phase shift windows, includes at least one line segment that can be considered to abut the target feature. Proximity correction is provided by adjusting the position of the at least one line segment on the boundary of a phase shift windows in said pair which abuts the target feature, and by adjusting the position of the at least one line segment on the boundary of the complementary trim shape which abuts the target feature.

6. 发明申请

WO2010117626A3 LITHOGRAPHY MODELLING AND APPLICATIONS 审中-公开
标题翻译： LITHOGRAPHY建模与应用
公开(公告)号：WO2010117626A3
公开(公告)日：2011-03-31
申请号：PCT/US2010028398
申请日：2010-03-24
申请人： PIERRAT CHRISTOPHE
发明人： PIERRAT CHRISTOPHE
IPC分类号： H01L21/027 , G03F1/08
CPC分类号： G06F17/5045 , G03F1/36 , G03F1/70 , G03F7/70125 , G03F7/70441 , G03F7/705
摘要： The manufacturing of integrated circuits relies on the use of lithography simulation to predict the image of the mask created on the wafer. Such predictions can be used for example to assess the quality of the images, verify the manufacturability of such images, perform using OPC necessary correction of the mask data to achieve images close to the targets, optimize the printing parameters such as the illumination source, or globally optimize the source and the mask to achieve better printability. This disclosure provides a technique based on the association of at least one kernel function per source region or source point. Each kernel function can be directly convoluted with a mask image to create a prediction of the wafer image. As the kernel functions are associated with the source, the source can be easily changed to create new models. The optical system can be fully described by computing the possible kernels for all possible source points and all possible numerical apertures. Therefore this technique is ideally suited for source -mask optimization as well as source-mask-numerical aperture optimization, and their associated applications.
摘要翻译：集成电路的制造依赖于使用光刻模拟来预测在晶片上产生的掩模的图像。这样的预测可以用于例如评估图像的质量，验证这些图像的可制造性，使用OPC对掩模数据进行必要的校正以实现靠近目标的图像，优化诸如照明源的打印参数，或者全面优化源码和掩码以实现更好的可打印性。本公开提供了一种基于每个源区域或源点至少一个核心功能的关联的技术。每个内核函数可以直接与掩模图像卷积，以创建晶片图像的预测。由于内核功能与源相关联，源可以轻松更改以创建新模型。可以通过计算所有可能的源点和所有可能的数值孔径的可能的内核来完全描述光学系统。因此，该技术非常适用于源掩码优化以及源掩码数值孔径优化及其相关应用。

7. 发明申请

WO2004093148A3 EFFECTIVE PROXIMITY EFFECT CORRECTION METHODOLOGY 审中-公开
公开(公告)号：WO2004093148A3
公开(公告)日：2004-10-28
申请号：PCT/US2004/011298
申请日：2004-04-13
申请人： FORTIS SYSTEMS, INC. , PIERRAT, Christophe
发明人： PIERRAT, Christophe
IPC分类号： G06F17/50
摘要： The invention describes a methodology based on the interpolation (503) of the correction (501 and 502) between selected evaluation points (505 and 506) of the target layout (504). By connecting the correction points this technique provides a means of reducing data volume and simplifying the mask writing, inspection and repair process. The same methodology can be applied to layouts with non-printing features, where the correction is based on the quality of the image of the main feature. For vector-scan mask writing tools the segments interpolating the corrections can be fractured in segments suitable with angles.

8. 发明申请

WO02101466A2 EXPOSURE CONTROL FOR PHASE SHIFTING PHOTOLITHOGRAPHIC MASKS 审中-公开
标题翻译：曝光控制用于相移图像掩模
公开(公告)号：WO02101466A2
公开(公告)日：2002-12-19
申请号：PCT/US0218480
申请日：2002-06-07
申请人： NUMERICAL TECH INC , PIERRAT CHRISTOPHE , COTE MICHEL LUC
发明人： PIERRAT CHRISTOPHE , COTE MICHEL LUC
IPC分类号： G03F1/00 , G03F7/20 , G03F7/22 , H01L21/027 , G03F7/00
CPC分类号： G03F7/70466 , G03F1/26 , G03F1/70 , G03F7/70425 , G03F7/70433 , G03F7/70558
摘要： Mask and integrated circuit fabrication approaches are described to facilitate use of so called "full phase" masks. This facilitates use of masks where substantially all of a layout is defined using phase shifting. More specifically, exposure settings including relative dosing between the phase shift mask and the trim masks are described. Additionally, single reticle approaches for accommodating both masks are considered. In one embodiment, the phase shifting mask and the trim mask are exposed using the same exposure conditions, except for relative dosing. In another embodiment, the relative dosing between the phase and trim patterns is 1.0:r, 2.0
摘要翻译：描述掩模和集成电路制造方法以便于使用所谓的“全相”掩模。这有助于使用掩模，其中使用相移来定义基本上所有的布局。更具体地，描述包括相移掩模和修剪蒙版之间的相对配量的曝光设置。另外，考虑了用于容纳两个掩模的单个掩模版方法。在一个实施例中，除了相对剂量之外，使用相同的曝光条件使相移掩模和修剪掩模曝光。在另一个实施方案中，相位和修剪图案之间的相对剂量为1.0：r，2.0

9. 发明申请

WO1990015363A1 RESIN COMPOSITION SENSITIVE TO UV RADIATION AND TO ELECTRONS 审中-公开
标题翻译：树脂组合物对紫外线辐射和电子敏感
公开(公告)号：WO1990015363A1
公开(公告)日：1990-12-13
申请号：PCT/FR1990000373
申请日：1990-05-29
申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE , PIERRAT, Christophe , ROSILIO, Charles , VINET, Françoise
发明人： COMMISSARIAT A L'ENERGIE ATOMIQUE
IPC分类号： G03F07/023
CPC分类号： G03F7/0233
摘要： The composition comprises a polymeric base and a photosensitizer dissolved in an organic solvent, the polymeric base including at least one polymeric base including at least one polymer or copolymer having a base unit of the formula (I), wherein A is H or a chemical bond; R1 is -CH2-, (a), (b), with R being H or an alkyl radical; R2 is H or OH; R3 is H or an alkyl radical and Z is a halogen, a halogenomethyl, or -O-Y wherein Y is -CH2-CH=CH2, (c), (d) or (e), with the proviso that when R1 is -CH2-, R2 is OH and R3 is an alkyl radical, Z is different from a halogen.

10. 发明申请

WO2010117626A2 LITHOGRAPHY MODELLING AND APPLICATIONS 审中-公开
标题翻译： LITHOGRAPHY建模与应用
公开(公告)号：WO2010117626A2
公开(公告)日：2010-10-14
申请号：PCT/US2010/028398
申请日：2010-03-24
申请人： PIERRAT, Christophe
发明人： PIERRAT, Christophe
IPC分类号： H01L21/027 , G03F1/08
CPC分类号： G06F17/5045 , G03F1/36 , G03F1/70 , G03F7/70125 , G03F7/70441 , G03F7/705
摘要： The manufacturing of integrated circuits relies on the use of lithography simulation to predict the image of the mask created on the wafer. Such predictions can be used for example to assess the quality of the images, verify the manufacturability of such images, perform using OPC necessary correction of the mask data to achieve images close to the targets, optimize the printing parameters such as the illumination source, or globally optimize the source and the mask to achieve better printability. This disclosure provides a technique based on the association of at least one kernel function per source region or source point. Each kernel function can be directly convoluted with a mask image to create a prediction of the wafer image. As the kernel functions are associated with the source, the source can be easily changed to create new models. The optical system can be fully described by computing the possible kernels for all possible source points and all possible numerical apertures. Therefore this technique is ideally suited for source -mask optimization as well as source-mask-numerical aperture optimization, and their associated applications.
摘要翻译：集成电路的制造依赖于使用光刻模拟来预测在晶片上产生的掩模的图像。这样的预测可以用于例如评估图像的质量，验证这些图像的可制造性，使用OPC对掩模数据进行必要的校正以实现靠近目标的图像，优化诸如照明源的打印参数，或者全面优化源码和掩码以实现更好的可打印性。本公开提供了一种基于每个源区域或源点至少一个核心功能的关联的技术。每个内核函数可以直接与掩模图像卷积，以创建晶片图像的预测。由于内核功能与源相关联，源可以轻松更改以创建新模型。可以通过计算所有可能的源点和所有可能的数值孔径的可能的内核来完全描述光学系统。因此，该技术非常适用于源掩码优化以及源掩码数值孔径优化及其相关应用。

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