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1. 发明授权

US09015219B2 Apparatus for signal processing 有权
标题翻译：信号处理装置
公开(公告)号：US09015219B2
公开(公告)日：2015-04-21
申请号：US13468924
申请日：2012-05-10
申请人： Ankur Bal , Anupam Jain , Neha Bhargava
发明人： Ankur Bal , Anupam Jain , Neha Bhargava
IPC分类号： G06F17/10 , H03H17/06
CPC分类号： H03H17/0664
摘要： A signal processor includes one or more memory banks, wherein each memory bank stores filter coefficients; and one or more coefficient multiplexer units; each coefficient multiplexer unit being associated with a memory bank, and retrieves a filter coefficient based on a number of received input samples. The processor includes one or more multiply and accumulate (MAC) units, each MAC unit being associated with a coefficient multiplexer unit and determines a product of the retrieved filter coefficient with an input sample; retrieves a previous value stored in an associated register; computes a summation of the previous value and the product; and stores the summation in the associated register. The processor includes an output multiplexer unit to select a register, and to provide a value stored in the register as an output.
摘要翻译：信号处理器包括一个或多个存储体，其中每个存储体存储滤波器系数; 和一个或多个系数多路复用器单元; 每个系数多路复用器单元与存储器组相关联，并且基于所接收的输入采样的数量来检索滤波器系数。处理器包括一个或多个乘法和累积（MAC）单元，每个MAC单元与系数多路复用器单元相关联，并且确定所检索的滤波器系数与输入采样的乘积; 检索存储在相关联寄存器中的先前值; 计算以前的值和乘积的总和; 并将求和存储在相关联的寄存器中。处理器包括输出多路复用器单元，用于选择寄存器，并将存储在寄存器中的值提供为输出。

2. 发明申请

US20130110898A1 APPARATUS FOR SIGNAL PROCESSING 有权
标题翻译：信号处理装置
公开(公告)号：US20130110898A1
公开(公告)日：2013-05-02
申请号：US13468924
申请日：2012-05-10
申请人： Ankur BAL , Anupam JAIN , Neha BHARGAVA
发明人： Ankur BAL , Anupam JAIN , Neha BHARGAVA
IPC分类号： G06F17/10
CPC分类号： H03H17/0664
摘要： A signal processor includes one or more memory banks, wherein each memory bank stores filter coefficients; and one or more coefficient multiplexer units; each coefficient multiplexer unit being associated with a memory bank, and retrieves a filter coefficient based on a number of received input samples. The processor includes one or more multiply and accumulate (MAC) units, each MAC unit being associated with a coefficient multiplexer unit and determines a product of the retrieved filter coefficient with an input sample; retrieves a previous value stored in an associated register; computes a summation of the previous value and the product; and stores the summation in the associated register. The processor includes an output multiplexer unit to select a register, and to provide a value stored in the register as an output.
摘要翻译：信号处理器包括一个或多个存储体，其中每个存储体存储滤波器系数; 和一个或多个系数多路复用器单元; 每个系数多路复用器单元与存储器组相关联，并且基于所接收的输入采样的数量来检索滤波器系数。处理器包括一个或多个乘法和累积（MAC）单元，每个MAC单元与系数多路复用器单元相关联，并且确定所检索的滤波器系数与输入采样的乘积; 检索存储在相关联寄存器中的先前值; 计算以前的值和乘积的总和; 并将求和存储在相关联的寄存器中。处理器包括输出多路复用器单元，用于选择寄存器，并将存储在寄存器中的值提供为输出。

3. 发明申请

US20100166920A1 Spice packet with multiple compartments for separating flavorants and method for assay of flavorants contained 审中-公开
标题翻译：具有多个隔室用于分离香料的香料包和含有的调味剂测定方法
公开(公告)号：US20100166920A1
公开(公告)日：2010-07-01
申请号：US12319020
申请日：2008-12-30
申请人： Raj Bhargava , Rashmi Bhargava , Neha Bhargava , Varun Bhargava , Devana Bhargava
发明人： Raj Bhargava , Rashmi Bhargava , Neha Bhargava , Varun Bhargava , Devana Bhargava
IPC分类号： B65D77/08
CPC分类号： B65D75/42
摘要： A spice packet has multiple compartments with instructions printed on a front side, where each compartment has instructions associated with a sequential step to be performed using the contents of the related compartment. The back side of the packet includes a shopping list and culinary information which may be of interest in establishing the historical background of the dish which uses the spice packet. The amounts of the spices in each packet are selected according to the strength of each individual spice which forms the contents of a packet.
摘要翻译：香料包具有多个隔间，其中在前侧印有指令，其中每个隔室具有与使用相关室的内容执行的顺序步骤相关联的指令。分组的背面包括购物清单和烹饪信息，这些信息可以用于建立使用香料包的菜肴的历史背景。根据构成分组内容的每个单独香料的强度来选择每个分组中的香料量。

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