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    • 4. 发明授权
    • Signal synchronizing systems and methods
    • 信号同步系统和方法
    • US09225321B2
    • 2015-12-29
    • US13172647
    • 2011-06-29
    • Ankur BalAnupam Jain
    • Ankur BalAnupam Jain
    • G06F1/12G06F1/00H03K5/135H04L7/02
    • H03K5/135G06F1/12H04L7/0045H04L7/02
    • Signal synchronizing systems and methods are disclosed. A signal synchronizing system includes a sequential logic circuit to receive an input signal and to generate a plurality of intermediate signals from the input signal based on a clock signal. A logic circuit combines the intermediate signals to generate an output signal. A signal receiver includes a microcontroller and a signal synchronizer coupled to the microcontroller. The signal synchronizer includes a sequential logic circuit to receive an input signal from a transmitter and to generate a plurality of intermediate signals from the received input signal based on a clock signal. A logic circuit combines the intermediate signals to generate an output signal.
    • 公开了信号同步系统和方法。 信号同步系统包括顺序逻辑电路,用于接收输入信号并根据时钟信号从输入信号产生多个中间信号。 逻辑电路组合中间信号以产生输出信号。 信号接收机包括耦合到微控制器的微控制器和信号同步器。 信号同步器包括顺序逻辑电路,用于接收来自发射机的输入信号,并且基于时钟信号从所接收的输入信号产生多个中间信号。 逻辑电路组合中间信号以产生输出信号。
    • 8. 发明授权
    • Apparatus for signal processing
    • 信号处理装置
    • US09015219B2
    • 2015-04-21
    • US13468924
    • 2012-05-10
    • Ankur BalAnupam JainNeha Bhargava
    • Ankur BalAnupam JainNeha Bhargava
    • G06F17/10H03H17/06
    • H03H17/0664
    • A signal processor includes one or more memory banks, wherein each memory bank stores filter coefficients; and one or more coefficient multiplexer units; each coefficient multiplexer unit being associated with a memory bank, and retrieves a filter coefficient based on a number of received input samples. The processor includes one or more multiply and accumulate (MAC) units, each MAC unit being associated with a coefficient multiplexer unit and determines a product of the retrieved filter coefficient with an input sample; retrieves a previous value stored in an associated register; computes a summation of the previous value and the product; and stores the summation in the associated register. The processor includes an output multiplexer unit to select a register, and to provide a value stored in the register as an output.
    • 信号处理器包括一个或多个存储体,其中每个存储体存储滤波器系数; 和一个或多个系数多路复用器单元; 每个系数多路复用器单元与存储器组相关联,并且基于所接收的输入采样的数量来检索滤波器系数。 处理器包括一个或多个乘法和累积(MAC)单元,每个MAC单元与系数多路复用器单元相关联,并且确定所检索的滤波器系数与输入采样的乘积; 检索存储在相关联寄存器中的先前值; 计算以前的值和乘积的总和; 并将求和存储在相关联的寄存器中。 处理器包括输出多路复用器单元,用于选择寄存器,并将存储在寄存器中的值提供为输出。