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1. 发明授权

US5214431A Delta sigma modulator 失效
标题翻译： ΔΣ调制器
公开(公告)号：US5214431A
公开(公告)日：1993-05-25
申请号：US913027
申请日：1992-07-14
申请人： Naoto Oikawa
发明人： Naoto Oikawa
IPC分类号： H03M3/02
CPC分类号： H03M3/324 , H03M3/43 , H03M3/456
摘要： A data latch circuit of a delta sigma modulator is controlled in timing of data output by clock signal. For this purpose, the data latch circuit has a reverse phase clock input terminal connected to a first delay circuit and a forward phase clock input terminal connected to a second delay circuit. The latch circuit is composed of two P-MOS transistors and two N-MOS transistors. The delay times of the first and second delay circuits are coincided, and those of the respective two P- and N-MOS transistors are also coincided.
摘要翻译：在由时钟信号输出的数据的定时控制ΔΣ调制器的数据锁存电路。为此，数据锁存电路具有连接到第一延迟电路的反相时钟输入端和连接到第二延迟电路的正相时钟输入端。锁存电路由两个P-MOS晶体管和两个N-MOS晶体管构成。第一和第二延迟电路的延迟时间一致，并且相应的两个P和N-MOS晶体管的延迟时间也一致。

2. 发明授权

US06316998B1 Differential amplifier and a method of compensation 有权
标题翻译：差分放大器和补偿方法
公开(公告)号：US06316998B1
公开(公告)日：2001-11-13
申请号：US09189865
申请日：1998-11-12
申请人： Naoto Oikawa
发明人： Naoto Oikawa
IPC分类号： H03F345
CPC分类号： H03F3/265 , H03F1/086
摘要： In a differential amplifier that is formed by a first differential amplifier formed by a first FET (MP1), to which a first input is applied, and a second FET (MP2), to which a second input is applied, a second differential amplifier formed by a third FET (MP7), to which the first input is applied, and a fourth FET (MP8), to which the second input is applied, in which each load of the first differential amplifier and the second differential amplifier being formed by a current mirror circuit, the signal to be fed to a subsequent stage is extracted from the drain D of the first FET (MP1) or the second FET (MP2).
摘要翻译：在由施加有第一输入的第一FET（MP1）和施加了第二输入的第二FET（MP2）形成的第一差分放大器形成的差分放大器中，形成第二差分放大器通过施加第一输入的第三FET（MP7）和施加第二输入的第四FET（MP8），其中第一差分放大器和第二差分放大器的每个负载由电流镜电路，从第一FET（MP1）或第二FET（MP2）的漏极D提取要馈送到后级的信号。

3. 发明授权

US06587000B2 Current mirror circuit and analog-digital converter 有权
标题翻译：电流镜电路和模数转换器
公开(公告)号：US06587000B2
公开(公告)日：2003-07-01
申请号：US10104761
申请日：2002-03-22
申请人： Naoto Oikawa
发明人： Naoto Oikawa
IPC分类号： H03F304
CPC分类号： H03M1/50 , G05F3/262
摘要： Current mirror circuit includes first constant current source, first and second MOS transistors, and first and second operational amplifiers. First constant current source outputs constant current to a first node based on a first reference voltage. First MOS transistor has source grounded, gate connected to the second MOS transistor and drain connected to the first node. Second MOS transistor has source grounded, gate connected to the first MOS transistor and drain connected to a second node. First operational amplifier has first input terminal connected to the first node, second input terminal connected to a third node connected to a second reference voltage and an output terminal connected to the gates of the first and second MOS transistors. Second operational amplifier has first input terminal connected to the third node, second input terminal connected to the second node and output terminal connected through feedback circuit to the second node.
摘要翻译：电流镜电路包括第一恒流源，第一和第二MOS晶体管以及第一和第二运算放大器。第一恒流源基于第一参考电压向第一节点输出恒定电流。第一MOS晶体管具有源极接地，栅极连接到第二MOS晶体管，漏极连接到第一节点。第二MOS晶体管具有源极接地，栅极连接到第一MOS晶体管，漏极连接到第二节点。第一运算放大器具有连接到第一节点的第一输入端子，连接到连接到第二参考电压的第三节点的第二输入端子和连接到第一和第二MOS晶体管的栅极的输出端子。第二运算放大器具有连接到第三节点的第一输入端子，连接到第二节点的第二输入端子和通过反馈电路连接到第二节点的输出端子。

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