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1. 发明授权

US07913197B1 Method for double patterning lithography 有权
标题翻译：双重图案光刻的方法
公开(公告)号：US07913197B1
公开(公告)日：2011-03-22
申请号：US12035413
申请日：2008-02-21
申请人： Michiel Victor Paul Kruger , Bayram Yenikaya , Anwei Liu , Abdurrahman Sezginer , Wolf Staud
发明人： Michiel Victor Paul Kruger , Bayram Yenikaya , Anwei Liu , Abdurrahman Sezginer , Wolf Staud
IPC分类号： G06F17/50 , G06F19/00 , G03F1/00 , G21K5/00
CPC分类号： G03F7/70466 , G03F7/70475
摘要： According to various embodiments of the invention systems and methods for multiple pattern lithography, wherein a target layout pattern that is not capable of being printed in one lithography step is decomposed into multiple patterns that are printable in one lithography operation and, when appropriate, a continuous junction is utilized for where patterns overlap. In a further embodiment, where a continuous junction is not utilized, a splice is utilized at overlap locations. In yet another embodiment, where splices are utilized for overlap locations, identifying where critical nets are located in the target layout pattern, determining how close a component of the critical net is to a splice, and changing the target layout pattern as to avoid the condition of a component of the critical net being in proximity to a splice. In another embodiment of the invention, where splices are utilized at overlap locations, placing a landing pad of contacts or vias at the same location as the splice.
摘要翻译：根据本发明的各种实施例，用于多图案光刻的系统和方法，其中不能在一个光刻步骤中打印的目标布局图案被分解成可在一个光刻操作中可打印的多个图案，并且在适当时将其连续结点用于图案重叠的位置。在另一实施例中，在不使用连续结的情况下，在重叠位置处使用接头。在另一个实施例中，其中接头用于重叠位置，识别关键网位于目标布局图案中的位置，确定关键网络的部件对拼接有多接近，并且改变目标布局图案以避免条件关键网的组件位于接头附近。在本发明的另一个实施例中，其中在重叠位置处使用接头时，将接触点或通孔的接合垫放置在与接头相同的位置处。

2. 发明申请

US20090307649A1 SYSTEM AND METHOD FOR MODIFYING A DATA SET OF A PHOTOMASK 有权
标题翻译：用于修改光电子数据集的系统和方法
公开(公告)号：US20090307649A1
公开(公告)日：2009-12-10
申请号：US12136277
申请日：2008-06-10
申请人： Dipankar Pramanik , Michiel Victor Paul Kruger , Roy V. Prasad , Abdurrahman Sezginer
发明人： Dipankar Pramanik , Michiel Victor Paul Kruger , Roy V. Prasad , Abdurrahman Sezginer
IPC分类号： G06F17/50
CPC分类号： G06F17/50 , G03F1/144 , G03F1/36
摘要： The present invention provides a method for compensating, infidelities of a process that transfers a pattern to a layer of an integrated circuit, by minimizing, with respect to a photomask pattern, a cost function that quantifies the deviation between designed and simulated values of circuit parameters of the pattern formed on a semiconductor wafer.
摘要翻译：本发明提供了一种用于通过使关于光掩模图案最小化量化电路参数的设计值和模拟值之间的偏差的成本函数来补偿将图案转移到集成电路层的过程的不忠形成在半导体晶片上的图案。

3. 发明授权

US08572517B2 System and method for modifying a data set of a photomask 有权
标题翻译：用于修改光掩模的数据集的系统和方法
公开(公告)号：US08572517B2
公开(公告)日：2013-10-29
申请号：US12136277
申请日：2008-06-10
申请人： Dipankar Pramanik , Michiel Victor Paul Kruger , Roy V. Prasad , Abdurrahman Sezginer
发明人： Dipankar Pramanik , Michiel Victor Paul Kruger , Roy V. Prasad , Abdurrahman Sezginer
IPC分类号： G06F17/50
CPC分类号： G06F17/50 , G03F1/144 , G03F1/36
摘要： The present invention provides a method for compensating infidelities of a process that transfers a pattern to a layer of an integrated circuit, by minimizing, with respect to a photomask pattern, a cost function that quantifies the deviation between designed and simulated values of circuit parameters of the pattern formed on a semiconductor wafer.
摘要翻译：本发明提供了一种用于补偿将图案转移到集成电路层的不完备性的方法，通过使关于光掩模图案最小化成本函数，该成本函数量化电路参数的设计值和模拟值之间的偏差形成在半导体晶片上的图案。

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