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1. 发明授权

US10026151B2 Head-up display warping controller 有权
公开(公告)号：US10026151B2
公开(公告)日：2018-07-17
申请号：US15024774
申请日：2013-09-27
申请人： Michael Andreas Staudenmaier , Kshitij Bajaj , Chanpreet Singh
发明人： Michael Andreas Staudenmaier , Kshitij Bajaj , Chanpreet Singh
IPC分类号： G06T3/00 , G02B27/00 , G02B27/01
摘要： A script-driven head-up display controller comprising an image warping unit and an image projection unit wherein the image warping unit is coupled to the image projection unit and is adapted to: receive a line-based warping descriptor comprising first information associated with a distortion caused by a non-flat display; and, in response to the reception of the line-based warping descriptor, the image warping unit is further adapted to, based on the line-based warping descriptor: fetch one or more lines of the source image; and, output to the image projection unit at least one output line of the output image associated with an electronic image warping of one or more pixels of the one or more input lines, and wherein the line-based warping descriptor further comprises second information associated with buffer management instructions calculated off-line.

2. 发明授权

US09641809B2 Circuit arrangement and method for processing a digital video stream and for detecting a fault in a digital video stream, digital video system and computer readable program product 有权
公开(公告)号：US09641809B2
公开(公告)日：2017-05-02
申请号：US14224167
申请日：2014-03-25
申请人： Michael Andreas Staudenmaier , Victor-Hugo Osornio Lopez , Dirk Wendel
发明人： Michael Andreas Staudenmaier , Victor-Hugo Osornio Lopez , Dirk Wendel
IPC分类号： H04N19/65 , H04N7/18 , H04N19/89
CPC分类号： H04N7/183 , H04N19/89
摘要： The present invention relates to a circuit arrangement for processing a digital video stream, the circuit arrangement comprising: an input interface for receiving a digital video stream, a processing circuit which is arranged to process the digital video stream, a hang-up detecting circuit for detecting a fault in the processed digital video stream, the hang-up detecting circuit comprising: a checksum generating circuit which is arranged to generate checksums for the frames of the processed digital video stream, a memory for storing generated checksums and an analyzing device arranged to compare a currently generated checksum to a plurality of corresponding checksums of preceding frames stored in the memory and to generate an error signal if at least one predefined amount of compared checksums are matching. The present invention also relates to a digital video system, a method for processing a digital video stream and a computer readable program product.

3. 发明申请

US20160163290A1 DISPLAY SYSTEM, A METHOD OF DISPLAYING AN IMAGE ON A SCREEN AND AN ASSOCIATED COMPUTER PROGRAM PRODUCT 有权
标题翻译：显示系统，在屏幕上显示图像和相关计算机程序产品的方法
公开(公告)号：US20160163290A1
公开(公告)日：2016-06-09
申请号：US14707531
申请日：2015-05-08
申请人： VINCENT AUBINEAU , DANIEL McKENNA , MICHAEL ANDREAS STAUDENMAIER
发明人： VINCENT AUBINEAU , DANIEL McKENNA , MICHAEL ANDREAS STAUDENMAIER
IPC分类号： G09G5/395
CPC分类号： G09G5/395 , G06T15/40 , G09G5/14 , G09G5/363 , G09G2310/04 , G09G2330/021 , G09G2350/00
摘要： A display system and a method of displaying an image are hereby presented. The display system is arranged to display an image on a screen which has at least one useful screen area which is intended to be seen by a user and at least one non-useful screen area which the user cannot see. The display device comprises a bandwidth saver unit arranged to determine a location on the screen of a current pixel to be displayed. If the pixel is located in a non-useful screen area of the screen, then the fetching from a data memory of a pixel value is inhibited by the bandwidth saver unit with respect to this pixel, and a replacement, fixed pixel value is passed to a data processing unit for further processing.
摘要翻译：因此，提供显示系统和显示图像的方法。显示系统被布置为在屏幕上显示图像，该图像具有旨在被用户看到的至少一个有用屏幕区域和用户看不到的至少一个非有用的屏幕区域。显示设备包括带宽保护单元，其布置成确定屏幕上要显示的当前像素的位置。如果像素位于屏幕的非有用的屏幕区域中，则相对于该像素，由带宽保护单元禁止从数据存储器读取像素值，并将替换的固定像素值传递到数据处理单元，用于进一步处理。

4. 发明申请

US20150281742A1 CIRCUIT ARRANGEMENT AND METHOD FOR PROCESSING A DIGITAL VIDEO STREAM AND FOR DETECTING A FAULT IN A DIGITAL VIDEO STREAM, DIGITAL VIDEO SYSTEM AND COMPUTER READABLE PROGRAM PRODUCT 有权
标题翻译：用于处理数字视频流并用于检测数字视频流，数字视频系统和计算机可读程序产品中的故障的电路布置和方法
公开(公告)号：US20150281742A1
公开(公告)日：2015-10-01
申请号：US14224167
申请日：2014-03-25
申请人： MICHAEL ANDREAS STAUDENMAIER , VICTOR-HUGO OSORNIO LOPEZ , DIRK WENDEL
发明人： MICHAEL ANDREAS STAUDENMAIER , VICTOR-HUGO OSORNIO LOPEZ , DIRK WENDEL
IPC分类号： H04N19/89 , H04N7/18 , H04N19/65
CPC分类号： H04N7/183 , H04N19/89
摘要： The present invention relates to a circuit arrangement for processing a digital video stream, the circuit arrangement comprising: an input interface for receiving a digital video stream, a processing circuit which is arranged to process the digital video stream, a hang-up detecting circuit for detecting a fault in the processed digital video stream, the hang-up detecting circuit comprising: a checksum generating circuit which is arranged to generate checksums for the frames of the processed digital video stream, a memory for storing generated checksums and an analyzing device arranged to compare a currently generated checksum to a plurality of corresponding checksums of preceding frames stored in the memory and to generate an error signal if at least one predefined amount of compared checksums are matching. The present invention also relates to a digital video system, a method for processing a digital video stream and a computer readable program product.
摘要翻译：本发明涉及一种用于处理数字视频流的电路装置，所述电路装置包括：用于接收数字视频流的输入接口，被配置为处理数字视频流的处理电路，一个挂起检测电路，用于检测所处理的数字视频流中的故障，所述上挂检测电路包括：校验和产生电路，被配置为产生经处理的数字视频流的帧的校验和，用于存储生成的校验和的存储器和布置成将当前生成的校验和与存储在存储器中的先前帧的多个对应校验和进行比较，并且如果至少一个预定量的比较校验和匹配，则生成错误信号。本发明还涉及数字视频系统，用于处理数字视频流的方法和计算机可读程序产品。

5. 发明授权

US09558373B2 3D graphics system using encrypted texture tiles 有权
标题翻译： 3D图形系统使用加密纹理贴图
公开(公告)号：US09558373B2
公开(公告)日：2017-01-31
申请号：US14563139
申请日：2014-12-08
申请人： Michael Andreas Staudenmaier , Juergen Frank , Robert Cristian Krutsch
发明人： Michael Andreas Staudenmaier , Juergen Frank , Robert Cristian Krutsch
IPC分类号： G06F21/72 , G06F21/78 , G06T1/20 , G06T15/04 , G09C5/00 , H04L9/14 , G06F21/85
CPC分类号： G06F21/72 , G06F21/78 , G06F21/85 , G06T1/20 , G06T15/04 , G09C5/00 , H04L9/14
摘要： A 3D graphics system uses encryption keys to decrypt received and stored texture tiles of a texture in accordance with received and stored texture tile status data which indicates whether a texture tiles is encrypted or not and which one of the encryption keys is used. The decrypted texture tiles are rendered and at least a plurality of the rendered tiles is encrypted. The encrypted rendered tiles are stored in a frame buffer. Buffer tile status data is stored which indicates whether a rendered tile is encrypted or not before storage in the frame buffer, and which one of the encryption keys has been used. The encrypted rendered tiles stored in the frame buffer are decrypted in accordance with the buffer tile status data.
摘要翻译： 3D图形系统使用加密密钥来根据接收和存储的纹理瓦片状态数据来解密纹理的接收和存储的纹理瓦片，该纹理瓦片状态数据指示纹理瓦片是否被加密，以及使用哪个加密密钥。解密的纹理图块被渲染，并且至少多个渲染的图块被加密。加密的渲染瓦片被存储在帧缓冲器中。存储缓冲区块状态数据，其指示在帧缓冲器中存储之前是否加密了已渲染的块，并且已经使用了哪个加密密钥。存储在帧缓冲器中的加密渲染瓦片根据缓冲器瓦片状态数据被解密。

6. 发明申请

US20160247255A1 HEAD-UP DISPLAY WARPING CONTROLLER 有权
标题翻译：顶部显示器加热控制器
公开(公告)号：US20160247255A1
公开(公告)日：2016-08-25
申请号：US15024774
申请日：2013-09-27
申请人： Michael Andreas STAUDENMAIER , Kshitij BAJAJ , Chanpreet SINGH
发明人： Michael Andreas STAUDENMAIER , Kshitij BAJAJ , Chanpreet SINGH
IPC分类号： G06T3/00 , G02B27/01
CPC分类号： G06T3/0093 , G02B27/0025 , G02B27/01 , G02B27/0101 , G02B2027/011 , G02B2027/013 , G02B2027/014 , G06T3/005
摘要： A script-driven head-up display controller comprising an image warping unit and an image projection unit wherein the image warping unit is coupled to the image projection unit and is adapted to: receive a line-based warping descriptor comprising first information associated with a distortion caused by a non-flat display; and, in response to the reception of the line-based warping descriptor, the image warping unit is further adapted to, based on the line-based warping descriptor: fetch one or more lines of the source image; and, output to the image projection unit at least one output line of the output image associated with an electronic image warping of one or more pixels of the one or more input lines, and wherein the line-based warping descriptor further comprises second information associated with buffer management instructions calculated off-line.
摘要翻译：一种脚本驱动的平视显示控制器，包括图像扭曲单元和图像投影单元，其中图像扭曲单元耦合到图像投影单元，并适于：接收基于线的翘曲描述符，其包括与失真相关联的第一信息由非平面显示引起; 并且响应于所述基于行的翘曲描述符的接收，所述图像扭曲单元还适于基于所述基于线的翘曲描述符：获取所述源图像的一行或多行; 并且输出到与所述一个或多个输入线的一个或多个像素的电子图像变形相关联的所述输出图像的至少一个输出线，并且其中所述基于线的翘曲描述符还包括与所述一个或多个输入线相关联的第二信息缓冲管理指令离线计算。

7. 发明申请

US20160150164A1 SYSTEM CONTROLLER, MULTI-CAMERA VIEW SYSTEM AND A METHOD OF PROCESSING IMAGES 审中-公开
标题翻译：系统控制器，多摄像机视图系统和处理图像的方法
公开(公告)号：US20160150164A1
公开(公告)日：2016-05-26
申请号：US14551615
申请日：2014-11-24
申请人： MICHAEL ANDREAS STAUDENMAIER , STEPHAN HERRMANN , ROBERT CRISTIAN KRUTSCH
发明人： MICHAEL ANDREAS STAUDENMAIER , STEPHAN HERRMANN , ROBERT CRISTIAN KRUTSCH
IPC分类号： H04N5/262 , B60R1/00 , H04N5/265 , H04N5/247 , H04N5/232
CPC分类号： H04N5/2628 , B60R1/00 , B60R2300/105 , B60R2300/303 , B60R2300/306 , H04N5/23229 , H04N5/23238 , H04N5/247 , H04N5/265
摘要： A system controller controls a multi-camera view system for displaying an output image on a display. The output image is a view from a selected viewpoint. The system controller comprises an image resizing unit, a memory, and a processing unit. The image resizing unit receives the at least two input images captured by at least two cameras and is arranged to output to the memory at least two resized images, corresponding to the at least two input images, respectively. The image resizing unit resizes the at least two input images based on the selected viewpoint. The memory stores the two resized images. The processing unit is coupled to the memory and generates the output image from the at least two resized images.
摘要翻译：系统控制器控制用于在显示器上显示输出图像的多摄像机视图系统。输出图像是从所选视点的视图。系统控制器包括图像调整单元，存储器和处理单元。图像调整单元接收由至少两个摄像机捕获的至少两个输入图像，并且被布置为分别对应于至少两个输入图像的至少两个调整大小的图像输出到存储器。图像调整单元基于所选择的视点来调整至少两个输入图像的大小。存储器存储两个调整大小的图像。处理单元耦合到存储器并且从至少两个调整大小的图像生成输出图像。

8. 发明授权

US09232156B1 Video processing device and method 有权
标题翻译：视频处理装置及方法
公开(公告)号：US09232156B1
公开(公告)日：2016-01-05
申请号：US14492573
申请日：2014-09-22
申请人： Michael Andreas Staudenmaier , Stephan Herrmann , Robert Cristian Krutsch
发明人： Michael Andreas Staudenmaier , Stephan Herrmann , Robert Cristian Krutsch
IPC分类号： H04N9/74 , H04N5/265
CPC分类号： H04N5/265 , G06T1/60
摘要： A video processing device for generating an output video stream on the basis of two or more concurrent input video streams and a method thereof are described. Each input video stream comprises a sequence of input images. The output video stream comprises a sequence of output images. The video processing device generates each output image by merging a respective set of input images. The set of input images comprises one input image from each input video stream. The video processing device merges the input images in a series of merging rounds. Each merging round comprises forming an output tile by merging a set of input tiles, and writing the output tile to an output memory unit. The set of input tiles comprises one input tile from each input image of the respective set of input images. The output tiles written to the output memory unit represent the output image.
摘要翻译：描述了用于基于两个或多个并发输入视频流生成输出视频流的视频处理设备及其方法。每个输入视频流包括一系列输入图像。输出视频流包括一系列输出图像。视频处理装置通过合并各组输入图像来生成每个输出图像。该组输入图像包括来自每个输入视频流的一个输入图像。视频处理设备在一系列合并回合中合并输入图像。每个合并包括通过合并一组输入瓦片形成输出瓦片，以及将输出瓦片写入输出存储器单元。该组输入图块包括来自相应输入图像集合的每个输入图像的一个输入图块。写入输出存储单元的输出贴片表示输出图像。

9. 发明授权

US09805432B2 Data logging system and method 有权
公开(公告)号：US09805432B2
公开(公告)日：2017-10-31
申请号：US14479456
申请日：2014-09-08
申请人： Dirk Wendel , Stephan Herrmann , Michael Andreas Staudenmaier
发明人： Dirk Wendel , Stephan Herrmann , Michael Andreas Staudenmaier
IPC分类号： G06T1/00 , G06K9/00 , G07C5/08 , G08B13/196
CPC分类号： G06T1/0007 , G06K9/00926 , G07C5/0866 , G07C5/0891 , G08B13/19676
摘要： A data logging system for logging input data received from a data source is described. The data logging system has a data storage memory. A data input is arranged to repeatedly receive input data having a temporal input data resolution. A write controller is arranged to write newly received input data as received via the data input into the data storage memory. The writing comprises writing the newly received input data at the temporal input data resolution. The writing comprises keeping recent data at the temporal input data resolution in the data storage memory, and overwriting part of old data with newly received input data while keeping another part of the old data in the data storage memory at lower data resolution.

10. 发明申请

US20160171645A1 DISPLAY CONTROLLER AND A METHOD THEREOF 审中-公开
标题翻译：显示控制器及其方法
公开(公告)号：US20160171645A1
公开(公告)日：2016-06-16
申请号：US14709680
申请日：2015-05-12
申请人： VINCENT AUBINEAU , ERIC EUGENE BERNARD DEPONS , MICHAEL ANDREAS STAUDENMAIER
发明人： VINCENT AUBINEAU , ERIC EUGENE BERNARD DEPONS , MICHAEL ANDREAS STAUDENMAIER
IPC分类号： G06T1/60 , G06F13/16 , G06F13/40 , G06F5/06 , G06F13/42
CPC分类号： G06T1/60 , G06F5/065 , G06F13/1673 , G06F13/404 , G06F13/4282 , G06F2205/067
摘要： A display controller comprises a plurality of channels for fetching data from a memory, a plurality of buffers coupled to the channels for receiving the fetched data from the channels, a buffer controller for controlling the buffers and the channels, and a processing unit coupled to the buffers, the display and buffer controller for receiving the data from the buffers, outputting a control signal to the display based on the received data, and controlling the buffer controller, respectively. Each buffer has a respective fixed memory capacity for storing the fetched data. The processing unit activates layers in the output image for displaying an output image on the display. The channels correspond to associated layers. The buffer controller adds to the respective fixed memory capacity of a particular buffer associated to an activated layer, one further fixed memory capacity of at least one further buffer associated to an inactive layer.
摘要翻译：显示控制器包括用于从存储器取出数据的多个通道，耦合到通道的多个缓冲器，用于从通道接收取出的数据，用于控制缓冲器和通道的缓冲器控制器，以及耦合到缓冲器，用于从缓冲器接收数据的显示和缓冲器控制器，基于接收的数据将控制信号输出到显示器，并分别控制缓冲器控制器。每个缓冲器具有用于存储获取的数据的相应的固定存储器容量。处理单元激活输出图像中的层，以在显示器上显示输出图像。通道对应于相关层。缓冲器控制器增加与激活层相关联的特定缓冲器的相应固定存储器容量，与非活动层相关联的至少一个另外的缓冲器的一个另外的固定存储器容量。

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