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1. 发明授权

US07502928B2 Methods and apparatus for secure data processing and transmission 有权
标题翻译：用于安全数据处理和传输的方法和装置
公开(公告)号：US07502928B2
公开(公告)日：2009-03-10
申请号：US10985354
申请日：2004-11-12
申请人： Masakazu Suzuoki , Akiyuki Hatakeyama
发明人： Masakazu Suzuoki , Akiyuki Hatakeyama
IPC分类号： H04L9/00
CPC分类号： G06F21/72 , G06F21/74
摘要： Methods and apparatus for placing a processing unit into one or more of a plurality of operational modes are disclosed wherein: the apparatus includes a local memory, a bus operable to carry information to and from the local memory, one or more arithmetic processing units operable to process data and operatively coupled to the local memory, and a security circuit operable to place the apparatus into the operational modes; and the plurality of operational modes includes a first mode whereby the apparatus and an external device may initiate a transfer of information into or out of the memory over the bus, a second mode whereby neither the apparatus nor the external device may initiate a transfer of information into or out of the memory over the bus, and a third mode whereby the apparatus may initiate a transfer of information into or out of the memory over the bus, but the external device may not initiate a transfer of information into or out of the memory over the bus.
摘要翻译：公开了一种用于将处理单元置于多个操作模式中的一个或多个操作模式中的方法和装置，其中：所述装置包括本地存储器，可操作以向本地存储器携带信息的总线，一个或多个算术处理单元，处理数据并且可操作地耦合到本地存储器，以及可操作以将设备置于操作模式的安全电路; 并且所述多个操作模式包括第一模式，由此所述装置和外部设备可以通过所述总线发起向所述存储器传送信息;第二模式，其中所述设备和所述外部设备都不可能发起信息的传送通过总线进入或离开存储器，以及第三模式，由此设备可以通过总线发起信息传入或传出存储器，但是外部设备可能不会发起信息传入或传出存储器在公共汽车上。

2. 发明授权

US07409441B2 Display apparatus for accessing desired web site 有权
标题翻译：用于访问所需网站的显示装置
公开(公告)号：US07409441B2
公开(公告)日：2008-08-05
申请号：US10398952
申请日：2002-05-17
申请人： Tomokazu Kake , Keiso Shimakawa , Takahiro Fujii , Yuta Kimura , Hidehisa Onai , Yousuke Kimoto , Kenjiro Komaki , Hiromasa Horie , Toyoshi Okada , Shigeru Enomoto , Muneki Shimada , Shuji Hiramatsu , Masakazu Suzuoki , Akio Ohba
发明人： Tomokazu Kake , Keiso Shimakawa , Takahiro Fujii , Yuta Kimura , Hidehisa Onai , Yousuke Kimoto , Kenjiro Komaki , Hiromasa Horie , Toyoshi Okada , Shigeru Enomoto , Muneki Shimada , Shuji Hiramatsu , Masakazu Suzuoki , Akio Ohba
IPC分类号： G06F15/173
CPC分类号： G06F3/016 , G06F3/04815 , G06F17/30884 , H04L67/02 , H04L67/24
摘要： A display apparatus including a communication line connected to a network, an information acquisition device for acquiring in real time at least information relating to a predetermined site on the network via the communication line, the communication line being held by a communication line holding device. The display apparatus includes a display control device for displaying in real time information relating to a plurality of sites acquired by the information acquisition device, and forming symbols corresponding to the plurality of sites, displaying the symbols three-dimensionally in a contrastable state from each other. The information acquired by the information acquisition device is displayed will a symbol, which corresponds to the site, and the information acquisition device acquires at least one of or a plurality of pieces of information indicating congestion status, update status, response, type, popularity, cost, and links of each site, and congestion status of the network.
摘要翻译：一种显示装置，包括连接到网络的通信线路，用于经由通信线路实时获取与网络上的预定位置相关的信息的信息获取装置，所述通信线路由通信线路保持装置保持。显示装置包括显示控制装置，用于实时地显示与由信息获取装置获取的多个站点有关的信息，并且形成与多个站点相对应的符号，以相互对置的方式三维地显示符号。由信息获取装置获取的信息将显示对应于该站点的符号，并且信息获取装置获取指示拥塞状态，更新状态，响应，类型，流行度等的至少一个或多个信息，成本和每个站点的链接以及网络的拥塞状态。

3. 发明申请

US20070180041A1 Methods and apparatus for virtualizing an address space 有权
标题翻译：用于虚拟化地址空间的方法和装置
公开(公告)号：US20070180041A1
公开(公告)日：2007-08-02
申请号：US11341724
申请日：2006-01-27
申请人： Masakazu Suzuoki
发明人： Masakazu Suzuoki
IPC分类号： G06F15/16
CPC分类号： H04L67/1097 , G06F12/0833 , G06F12/1081
摘要： Methods and apparatus provide for: receiving a memory access request for data from a processor of a multi-processor system; determining whether the data of the memory access request is stored in a remote processing system coupled to the multi-processor system over a communications network; requesting the data from the remote processing system; receiving the data from the remote processing system over the communications network; and providing the data to the processor of the multi-processor system.
摘要翻译：方法和装置提供：从多处理器系统的处理器接收对数据的存储器访问请求; 确定所述存储器访问请求的数据是否存储在通过通信网络耦合到所述多处理器系统的远程处理系统中; 从远程处理系统请求数据; 通过通信网络从远程处理系统接收数据; 以及将数据提供给多处理器系统的处理器。

4. 发明申请

US20060212643A1 Methods and apparatus for dynamic linking program overlay 失效
标题翻译：动态链接程序覆盖的方法和装置
公开(公告)号：US20060212643A1
公开(公告)日：2006-09-21
申请号：US11083863
申请日：2005-03-18
申请人： Masakazu Suzuoki
发明人： Masakazu Suzuoki
IPC分类号： G06F12/06
CPC分类号： G06F9/44521
摘要： Methods and apparatus provide for loading at least one software program module from a storage medium into a local memory of a processor for execution, the storage medium containing a main module and a plurality of sub-modules of the software program; and updating an address table, copies of the address table being located in at least one of the storage medium and the local memory, and the address table having at least one entry for each of the modules, each entry including at least one of: (i) a destination address representing an address within the local memory of a processor at which the corresponding module is disposed, and (ii) a source address representing an address within the storage medium at which the corresponding module originates.
摘要翻译：方法和装置提供将来自存储介质的至少一个软件程序模块加载到用于执行的处理器的本地存储器，所述存储介质包含所述软件程序的主模块和多个子模块; 并且更新地址表，位于存储介质和本地存储器中的至少一个中的地址表的副本，以及具有用于每个模块的至少一个条目的地址表，每个条目包括以下各项中的至少一个：（ i）表示处理器的本地存储器中的相应模块所在的地址的目标地址，以及（ii）表示相应模块所在的存储介质内的地址的源地址。

5. 发明申请

US20060112213A1 Methods and apparatus for secure data processing and transmission 有权
公开(公告)号：US20060112213A1
公开(公告)日：2006-05-25
申请号：US10985354
申请日：2004-11-12
申请人： Masakazu Suzuoki , Akiyuki Hatakeyama
发明人： Masakazu Suzuoki , Akiyuki Hatakeyama
IPC分类号： G06F12/14
CPC分类号： G06F21/72 , G06F21/74
摘要： Methods and apparatus for placing a processing unit into one or more of a plurality of operational modes are disclosed wherein: the apparatus includes a local memory, a bus operable to carry information to and from the local memory, one or more arithmetic processing units operable to process data and operatively coupled to the local memory, and a security circuit operable to place the apparatus into the operational modes; and the plurality of operational modes includes a first mode whereby the apparatus and an external device may initiate a transfer of information into or out of the memory over the bus, a second mode whereby neither the apparatus nor the external device may initiate a transfer of information into or out of the memory over the bus, and a third mode whereby the apparatus may initiate a transfer of information into or out of the memory over the bus, but the external device may not initiate a transfer of information into or out of the memory over the bus.

6. 发明申请

US20050120254A1 Power management for processing modules 有权
标题翻译：处理模块的电源管理
公开(公告)号：US20050120254A1
公开(公告)日：2005-06-02
申请号：US10959700
申请日：2004-10-05
申请人： Masakazu Suzuoki , Takeshi Yamazaki
发明人： Masakazu Suzuoki , Takeshi Yamazaki
IPC分类号： G06F1/26 , G06F12/00
CPC分类号： G06F1/206 , G06F1/3203 , G06F1/3243 , G06F9/30145 , G06F9/30167 , Y02D10/152 , Y02D10/16
摘要： A processing element (PE) includes a processing unit (PU) and a number of attached processing units (APUs). The instruction set of each APU is divided a priori into a number of types, each type associated with a different amount of heat generation. Each APU keeps track of the amount of each type of instruction executed over a time period,—the power information,—and provides this power information to the PU. The PU then performs power management as a function of the provided power information from each APU,—such as directing a particular APU to enter an idle state to reduce power consumption.
摘要翻译：处理单元（PE）包括处理单元（PU）和多个附加处理单元（APU）。每个APU的指令集被预先划分成多种类型，每种类型与不同的发热量相关联。每个APU跟踪在一段时间内执行的每种类型的指令的数量 - 功率信息，并将该功率信息提供给PU。然后，PU根据来自每个APU的所提供的功率信息执行功率管理，例如指示特定APU进入空闲状态以降低功耗。

7. 发明申请

US20050081209A1 System and method for data synchronization for a computer architecture for broadband networks 有权
标题翻译：宽带网络计算机架构的数据同步系统和方法
公开(公告)号：US20050081209A1
公开(公告)日：2005-04-14
申请号：US10967433
申请日：2004-10-18
申请人： Masakazu Suzuoki , Takeshi Yamazaki
发明人： Masakazu Suzuoki , Takeshi Yamazaki
IPC分类号： G06F12/14 , G06F15/16 , G06F15/80 , G06F21/24 , H04L29/06 , G06F9/46
CPC分类号： G06F12/1466 , H04L69/12
摘要： A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A processing system for processing computer tasks is also provided. A first processor is of a first processor type and a number of second processors are of a second processor type. One of the second processors manages process scheduling of computing tasks by providing tasks to at least one of the first and second processors.
摘要翻译：提供了一种用于宽带网络高速处理的计算机体系结构和编程模型。该架构采用一致的模块化结构，通用的计算模块和统一的软件单元。公共计算模块包括控制处理器，多个处理单元，处理单元处理程序的多个本地存储器，直接存储器存取控制器和共享主存储器。还提供了一种用于由处理单元协调地读取和从共享主存储器写入数据的同步系统和方法。还提供了一种用于处理计算机任务的处理系统。第一处理器是第一处理器类型，并且多个第二处理器是第二处理器类型。第二处理器之一通过向第一和第二处理器中的至少一个提供任务来管理计算任务的进程调度。

8. 发明授权

US06396493B2 Methods and apparatus for recording and information processing, and recording method therefor 有权
标题翻译：用于记录和信息处理的方法和装置及其记录方法
公开(公告)号：US06396493B2
公开(公告)日：2002-05-28
申请号：US09738672
申请日：2000-12-15
申请人： Masakazu Suzuoki
发明人： Masakazu Suzuoki
IPC分类号： G06T1700
CPC分类号： G06T17/20
摘要： A recording medium, recording and information processing apparatus and methods by which efficient processing of data and a high processing speed can be readily achieved at lower cost. A main CPU converts coordinates of a polygon in response to a manual operation of an operation unit by a user and transmits data of the polygon to a programmable packet engine via a main bus. The packet engine calculates a Z value representative of the position of the polygon in the depthwise direction from coordinate values of the apexes of the polygon supplied from the main CPU, divides the polygon into a number of sub-polygons corresponding to the Z value, converts coordinate values of the apexes of the sub-polygons in accordance with a normal vector and curved surface parameters and produces a curved surface composed of the sub-polygons. A graphical processing unit writes pixel data of the sub-polygons produced by the programmable packet engine into a frame buffer and performs rendering processing.
摘要翻译：记录介质，记录和信息处理设备以及以较低的成本容易地实现数据的有效处理和高处理速度的方法。主CPU响应于用户对操作单元的手动操作而转换多边形的坐标，并且经由主总线将多边形的数据发送到可编程分组引擎。分组引擎从主CPU提供的多边形的顶点的坐标值计算表示多边形在深度方向上的位置的Z值，将多边形分割成与Z值对应的子多边形数，转换根据法向量和曲面参数对子多边形的顶点进行坐标值，并产生由子多边形组成的曲面。图形处理单元将由可编程分组引擎产生的子多边形的像素数据写入帧缓冲器并执行绘制处理。

9. 发明授权

US6011564A Method and apparatus for producing an image through operation of plotting commands on image data 失效
标题翻译：通过对图像数据绘制命令的操作来产生图像的方法和装置
公开(公告)号：US6011564A
公开(公告)日：2000-01-04
申请号：US868123
申请日：1997-06-03
申请人： Makoto Furuhashi , Masakazu Suzuoki , Akio Ohba , Masaaki Oka , Teiji Yutaka , Masayoshi Tanaka
发明人： Makoto Furuhashi , Masakazu Suzuoki , Akio Ohba , Masaaki Oka , Teiji Yutaka , Masayoshi Tanaka
IPC分类号： G06F15/00 , G06F15/16 , G06T1/20 , G06T9/00 , G06T17/00
CPC分类号： G06T9/00 , G06T1/20 , G06T17/00 , G06T9/007
摘要： An image processing system for producing an image from three-dimensional image data. The system uses a command generator to generate one or more plotting commands for producing the image, and features a coordinate calculator for transforming the three-dimensional data into two-dimensional data. The coordinate calculator operates as a coprocessor of the command generator, and as such does not require use of the system bus to perform its functions.
摘要翻译：一种用于从三维图像数据产生图像的图像处理系统。该系统使用命令生成器生成用于产生图像的一个或多个绘制命令，并且具有用于将三维数据变换为二维数据的坐标计算器。坐标计算器作为命令发生器的协处理器工作，因此不需要使用系统总线来执行其功能。

10. 发明授权

US5784070A Method and apparatus for producing a polygonal image representation through operation of plotting commands on image data 失效
标题翻译：通过对图像数据绘制命令的操作来产生多边形图像表示的方法和装置
公开(公告)号：US5784070A
公开(公告)日：1998-07-21
申请号：US868124
申请日：1997-06-03
申请人： Makoto Furuhashi , Masakazu Suzuoki , Akio Ohba , Masaaki Oka , Teiji Yutaka , Masayoshi Tanaka
发明人： Makoto Furuhashi , Masakazu Suzuoki , Akio Ohba , Masaaki Oka , Teiji Yutaka , Masayoshi Tanaka
IPC分类号： G06F15/00 , G06F15/16 , G06T1/20 , G06T9/00 , G06T17/00
CPC分类号： G06T9/00 , G06T1/20 , G06T17/00 , G06T9/007
摘要： Methods and apparatus for generating image data are provided. A memory and a data processor are coupled with a system bus. In certain embodiments a data expanding apparatus is also coupled to the system bus and compressed data are transferred to the data expanding apparatus via the system bus and decompressed data are transferred therefrom to the memory without passing the compressed data through the data processor. Also in certain embodiments, an image data generation command string is transferred from the memory to an image data generation device via the system bus without passing the image data generation command string through the data processor.
摘要翻译：提供了生成图像数据的方法和装置。存储器和数据处理器与系统总线耦合。在某些实施例中，数据扩展设备也耦合到系统总线，并且压缩数据经由系统总线传送到数据扩展设备，并且解压缩的数据从其传送到存储器，而不会通过数据处理器传送压缩数据。同样在某些实施例中，图像数据生成命令串经由系统总线从存储器传送到图像数据生成装置，而不通过图像数据生成命令串通过数据处理器。

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