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1. 发明申请

US20100314762A1 Semiconductor Substrate with Through-Contact and Method for Production Thereof 有权
标题翻译：具有通孔的半导体基板及其制造方法
公开(公告)号：US20100314762A1
公开(公告)日：2010-12-16
申请号：US12670303
申请日：2008-07-23
申请人： Franz Schrank , Martin Schrems , Jochen Kraft
发明人： Franz Schrank , Martin Schrems , Jochen Kraft
IPC分类号： H01L23/48 , H01L23/488 , H01L21/768 , H01L21/50
CPC分类号： H01L21/76898 , H01L21/6836 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/94 , H01L2221/6834 , H01L2221/68372 , H01L2224/0401 , H01L2224/05624 , H01L2224/16 , H01L2224/94 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19043 , H01L2924/3011 , H01L2224/11 , H01L2924/00014
摘要： The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.
摘要翻译：衬底的层间连接通过半导体层（11）的接触孔填充（4）和反向半导体层（13）中的凹部（16）的金属化（17）形成，其中半导体层通过掩埋绝缘层（12）彼此分离，在其层位置，接触孔填充或金属化结束。

2. 发明授权

US06730607B2 Method for fabricating a barrier layer 有权
标题翻译：阻挡层的制造方法
公开(公告)号：US06730607B2
公开(公告)日：2004-05-04
申请号：US09882289
申请日：2001-06-15
申请人： Helmut Wurzer , Martin Schrems , Anke Krasemann , Thomas Pompl
发明人： Helmut Wurzer , Martin Schrems , Anke Krasemann , Thomas Pompl
IPC分类号： H01L21302
CPC分类号： H01L27/0805 , H01L21/31662
摘要： A method of fabricating a barrier layer includes oxidizing a silicon-containing substrate to form a substrate oxide layer on the surface of the substrate, producing an oxygen-impervious layer at an interface between the substrate oxide layer and the substrate, and etching the substrate oxide layer until the underlying oxygen-impervious layer is uncovered.
摘要翻译：制造阻挡层的方法包括氧化含硅衬底以在衬底的表面上形成衬底氧化物层，在衬底氧化物层和衬底之间的界面处产生不透氧层，并蚀刻衬底氧化物直到底层的不透氧层未被覆盖。

3. 发明授权

US06200873B1 Production method for a trench capacitor with an insulation collar 失效
标题翻译：具有绝缘环的沟槽电容器的制造方法
公开(公告)号：US06200873B1
公开(公告)日：2001-03-13
申请号：US09395226
申请日：1999-09-13
申请人： Martin Schrems , Norbert Arnold
发明人： Martin Schrems , Norbert Arnold
IPC分类号： H01L218242
CPC分类号： H01L27/10861 , H01L27/10867
摘要： The present invention provides a method for fabricating a trench capacitor, in particular for use in a semiconductor memory cell (100), with an insulation collar (168′; 168″), having the following steps: provision of a substrate (101); formation of a trench (108) in the substrate (101); provision of a first layer (177) on the trench wall; provision of a second layer (178) on the first layer (177) on the trench wall; filling of the trench (108) with a first filling material (152); removal of the first filling material (152) from the upper region of the trench (108) in order to define a collar region; removal of the second layer (178) from the upper region of the trench (108); removal of the first filling material (152) from the lower region of the trench (108); removal of the first layer (177) from the upper region of the trench (108); local oxidation of the upper region of the trench (108) in order to produce the insulation collar (168′; 168″); removal of the first and second layers (177; 178) from the lower region of the trench; formation of a dielectric layer (164) in the lower region of the trench (108) and on the inner side of the insulation collar (168′; 168″); and filling of the trench (108) with a conductive second filling material (161).
摘要翻译：本发明提供一种用于制造沟槽电容器的方法，特别是用于具有绝缘套环（168'; 168“）的半导体存储单元（100）中，其具有以下步骤：提供衬底（101） ; 在衬底（101）中形成沟槽（108）; 在沟槽壁上设置第一层（177）; 在沟槽壁上的第一层（177）上设置第二层（178）; 用第一填充材料（152）填充沟槽（108）; 从沟槽（108）的上部区域移除第一填充材料（152）以便限定一个环形区域; 从沟槽（108）的上部区域去除第二层（178）; 从沟槽（108）的下部区域移除第一填充材料（152）; 从沟槽（108）的上部区域去除第一层（177）; 沟槽（108）的上部区域的局部氧化以产生绝缘套环（168'; 168“）; 从沟槽的下部区域去除第一和第二层（177; 178）; 在沟槽（108）的下部区域和绝缘套环（168'; 168“）的内侧上形成电介质层（164）。以及用导电的第二填充材料（161）填充所述沟槽（108）。

4. 发明授权

US6080273A Method and device for treating liquids by partial evaporation 失效
标题翻译：通过部分蒸发处理液体的方法和装置
公开(公告)号：US6080273A
公开(公告)日：2000-06-27
申请号：US898735
申请日：1997-07-23
申请人： Martin Schrems
发明人： Martin Schrems
IPC分类号： B01D1/00 , B01D1/22 , B01D3/10 , B01D3/24
CPC分类号： B01D1/0088 , B01D1/22 , B01D3/10 , Y10S159/16
摘要： A process and a device for treating a liquid by separating out constituents contained in the liquid. Pollutants are removed or the liquid is sterilized by partial evaporization. The liquid is introduced into a vacuum tank in which a portion thereof is evaporated. The remaining liquid phase is discharged from the vacuum tank. The liquid in the vacuum tank flows under the effect of gravity on a fixed inclined or horizontal surface on which it forms a liquid film. The vapor phase emerges from the liquid film as a function of the vapor pressure defined relative to the prevailing temperature. The flow surface slopes downwardly away from the inflow of the liquid, it rises slightly or it extends horizontally.
摘要翻译：用于通过分离液体中所含的成分来处理液体的方法和装置。污染物被去除或液体通过部分蒸发灭菌。将液体引入其一部分蒸发的真空罐中。剩余的液相从真空槽排出。真空罐中的液体在重力作用下在形成液膜的固定的倾斜或水平表面上流动。蒸汽相以相对于主要温度定义的蒸汽压力为基础，从液膜中出现。流动表面向下倾斜离开液体流入，它稍微上升或水平延伸。

5. 发明授权

US06008104A Method of fabricating a trench capacitor with a deposited isolation collar 失效
标题翻译：用沉积隔离环制造沟槽电容器的方法
公开(公告)号：US06008104A
公开(公告)日：1999-12-28
申请号：US55506
申请日：1998-04-06
申请人： Martin Schrems
发明人： Martin Schrems
IPC分类号： H01L27/108 , H01L21/8242 , H01L21/20
CPC分类号： H01L27/10861
摘要： An improved trench capacitor is achieved by providing a node dielectric that lines the collar and sidewalls of the bottom of the trench. Further, the trench capacitor includes a lower portion having a diameter that is substantially the about same or greater than that of the upper portion.
摘要翻译：改进的沟槽电容器通过提供一个节点电介质来实现，该节点电介质使沟槽的底部和沟槽的侧壁成线。此外，沟槽电容器包括具有与上部大致相同或更大的直径的下部。

6. 发明授权

US5945704A Trench capacitor with epi buried layer 失效
标题翻译：带Epi埋层的沟槽电容器
公开(公告)号：US5945704A
公开(公告)日：1999-08-31
申请号：US105945
申请日：1998-06-26
申请人： Martin Schrems , Jack Mandelman , Joachim Hoepfner , Herbert Schaefer , Reinhard Stengl
发明人： Martin Schrems , Jack Mandelman , Joachim Hoepfner , Herbert Schaefer , Reinhard Stengl
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L29/94 , H01L31/119 , H01L27/76
CPC分类号： H01L27/10861 , H01L29/945
摘要： A trench capacitor with an epi layer in the lower portion of the trench. The epi layer serves as the buried plate of the trench capacitor. A diffusion region surrounds the lower portion of the trench to enhance the dopant concentration of the epi layer. The diffusion region is formed by, for example, gas phase doping, plasma doping, or plasma immersion ion implantation.
摘要翻译：具有沟槽下部的外延层的沟槽式电容器。外延层用作沟槽电容器的掩埋板。扩散区域围绕沟槽的下部以增强外延层的掺杂剂浓度。扩散区域通过例如气相掺杂，等离子体掺杂或等离子体浸入离子注入形成。

7. 发明授权

US08338898B2 Micro electro mechanical system (MEMS) microphone having a thin-film construction 有权
标题翻译：具有薄膜结构的微机电系统（MEMS）麦克风
公开(公告)号：US08338898B2
公开(公告)日：2012-12-25
申请号：US11792515
申请日：2005-10-12
申请人： Franz Schrank , Martin Schrems
发明人： Franz Schrank , Martin Schrems
IPC分类号： H01L29/82
CPC分类号： H04R19/04 , H04R7/10 , H04R19/005 , H04R2307/207
摘要： An MEMS microphone is bonded onto the surface of an IC component containing at least one integrated circuit suitable for the conditioning and processing of the electrical signal supplied by the MEMS microphone. The entire component is simple to produce and has a compact and space-saving construction. Production is accomplished in a simple and reliable manner.
摘要翻译： MEMS麦克风被结合到包含至少一个集成电路的IC组件的表面上，所述集成电路适于调节和处理由MEMS麦克风提供的电信号。整个组件生产简单，结构紧凑，节省空间。生产以简单可靠的方式完成。

8. 发明授权

US06989311B2 Method for fabricating a trench contact to a deep trench capacitor having a polysilicon filling 失效
公开(公告)号：US06989311B2
公开(公告)日：2006-01-24
申请号：US10147544
申请日：2002-05-16
申请人： Martin Schrems , Dietmar Temmler , Andreas Wich-Glasen
发明人： Martin Schrems , Dietmar Temmler , Andreas Wich-Glasen
IPC分类号： H01L21/20
CPC分类号： H01L27/10867 , H01L21/76897
摘要： The instant invention is a method for fabricating a trench contact to a deep trench capacitor with a polysilicon filling in a trench hole formed in a silicon substrate. An epitaxy process is performed to selectively grow silicon above the polysilicon filling in the trench hole. An opening leading to the polysilicon filling is anisotropically etched into the epitaxially grown silicon. The opening has lateral dimensions that are smaller than those of the polysilicon filling, and the opening is filled with polysilicon.

9. 发明授权

US06828191B1 Trench capacitor with an insulation collar and method for producing a trench capacitor 失效
标题翻译：具有绝缘环的沟槽电容器和用于制造沟槽电容器的方法
公开(公告)号：US06828191B1
公开(公告)日：2004-12-07
申请号：US09363277
申请日：1999-07-28
申请人： Kai Wurster , Martin Schrems , Jürgen Faul , Klaus-Dieter Morhard , Alexandra Lamprecht , Odile Dequiedt
发明人： Kai Wurster , Martin Schrems , Jürgen Faul , Klaus-Dieter Morhard , Alexandra Lamprecht , Odile Dequiedt
IPC分类号： H01L218242
CPC分类号： H01L27/10861 , H01L27/10829
摘要： A trench capacitor, in particular for use in a semiconductor memory cell, has a trench formed in a substrate; an insulation collar formed in an upper region of the trench; an optional buried plate in the substrate region serving as a first capacitor plate; a dielectric layer lining the lower region of the trench and the insulation collar as a capacitor dielectric; a conductive second filling material filled into the trench as a second capacitor plate; and a buried contact underneath the surface of the substrate. The substrate has, underneath its surface in the region of the buried contact, a doped region introduced by implantation, plasma doping and/or vapor phase deposition. A tunnel layer, in particular an oxide, nitride or oxinitride layer, is preferably formed at the interface of the buried contact. A method for producing a trench capacitor is also provided.
摘要翻译：特别是在半导体存储单元中使用的沟槽电容器具有形成在衬底中的沟槽; 形成在所述沟槽的上部区域中的绝缘套环; 在作为第一电容器板的基板区域中的可选掩埋板; 衬在沟槽的下部区域的绝缘层和作为电容器电介质的绝缘套管; 作为第二电容器板填充到所述沟槽中的导电的第二填充材料; 以及在衬底的表面下方的埋入接触。衬底在其掩埋接触区域的表面下方具有通过注入，等离子体掺杂和/或气相沉积引入的掺杂区域。隧道层，特别是氧化物，氮化物或氮氧化物层优选形成在埋入触点的界面处。还提供了一种制造沟槽电容器的方法。

10. 发明授权

US06664167B2 Memory with trench capacitor and selection transistor and method for fabricating it 失效
公开(公告)号：US06664167B2
公开(公告)日：2003-12-16
申请号：US10085940
申请日：2002-02-28
申请人： Dietmar Temmler , Herbert Benzinger , Wolfram Karcher , Catharina Pusch , Martin Schrems , Jürgen Faul
发明人： Dietmar Temmler , Herbert Benzinger , Wolfram Karcher , Catharina Pusch , Martin Schrems , Jürgen Faul
IPC分类号： H01L2120
CPC分类号： H01L27/10861 , H01L27/10832
摘要： A memory having a memory cell formed in a substrate and including a trench capacitor and a transistor and a method for producing the memory includes connecting the trench capacitor to the transistor with a self-aligned connection. The transistor at least partly covers the trench capacitor. The trench capacitor is filled with a conductive trench filling and an insulating covering layer is situated on the conductive trench filling. An epitaxial layer is situated above the insulating covering layer. The transistor is formed in the epitaxial layer. The self-aligned connection is formed in a contact trench and includes an insulation collar in which a conductive material is introduced. A conductive cap is formed on the conductive material.

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