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    • 1. 发明申请
    • INTEGRATED APPROACH FOR DESIGN, SIMULATION AND VERIFICATION OF MONOLITHIC, SILICON-BASED OPTO-ELECTRONIC CIRCUITS
    • 单片硅基光电路的设计,仿真和验证综合方法
    • WO2006007474A2
    • 2006-01-19
    • PCT/US2005022254
    • 2005-06-22
    • SIOPTICAL INCSHASTRI KALPENDUPATHAK SOHAMGOTHOSKAR PRAKASHMOSINSKIS PAULIUSDAMA BIPIN
    • SHASTRI KALPENDUPATHAK SOHAMGOTHOSKAR PRAKASHMOSINSKIS PAULIUSDAMA BIPIN
    • G06F17/50G06G7/62
    • G06F17/5036G06F17/5068
    • Computer-aided design (CAD) tools are used to perform the integrated design, verification and layout of electrical and optical components in a monolithic, silicon-­based electro-optic chip. Separate top-level behavioral logic designs are prepared for the three different types of elements included within the final, silicon-based monolithic structure: (1) digital electronic integrated circuit elements; (2) analog/mixed signal electronic integrated circuit elements; and (3) opto-electronic elements (including passive and active optical elements). Once the behavioral logic design is completed, the results are combined and co-simulated. A physical layout design is developed and verified for each different type of element in the circuit. The separate physical layouts are then co-verified, to assess the properties of the overall physical design. The results of the co-simulation are compared to the results of the co-verification, with alterations made in the logic design and/or the physical layout until the desired operating parameters are obtained. Once the desired results are generated, conventional wafer-level fabrication operations are then considered to provide a final product ("tape out").
    • 计算机辅助设计(CAD)工具用于在单片硅基电光芯片中执行电气和光学部件的集成设计,验证和布局。 为最终的硅基单片结构中包含的三种不同类型的元件准备了独立的顶级行为逻辑设计:(1)数字电子集成电路元件; (2)模拟/混合信号电子集成电路元件; 和(3)光电元件(包括无源和有源光学元件)。 一旦行为逻辑设计完成,结果将被合并并共同模拟。 为电路中的每种不同类型的元件开发和验证物理布局设计。 然后将单独的物理布局共同验证,以评估整体物理设计的属性。 将共模拟的结果与协同验证的结果进行比较,在逻辑设计和/或物理布局中进行改变,直到获得所需的操作参数。 一旦产生期望的结果,则常规晶圆级制造操作被认为是提供最终产品(“磁带输出”)。
    • 8. 发明申请
    • CURRENT MIRROR WITH IMPROVED OUTPUT IMPEDANCE AT LOW POWER SUPPLIES
    • 具有改进的低功耗输出阻抗的电流镜
    • WO2007098073A2
    • 2007-08-30
    • PCT/US2007004230
    • 2007-02-16
    • SIOPTICAL INCMOSINSKIS PAULIUS MINDAUGAS
    • MOSINSKIS PAULIUS MINDAUGAS
    • G05F1/10
    • G05F3/262
    • A current mirror circuit arrangement is formed to maintain a high output impedance when utilized with a relatively low voltage power supply. A common mode voltage regulator circuit is utilized in conjunction with the output branch of the current mirror to eliminate the need for an additional active device in series with the output transistor of a current mirror to control its drain voltage. The elimination of the second active device thus increases the available headroom for the output branch (i.e., adds one V DS )- The increased headroom in the inventive current mirror is particularly advantageous for low voltage applications, since it is capable of maintaining the high output impedance required for accurate mirroring of the input current.
    • 形成电流镜电路装置,以在与较低电压电源一起使用时保持高输出阻抗。 共模电压调节器电路与电流镜的输出支路结合使用,以消除与电流镜的输出晶体管串联的附加有源器件以控制其漏极电压的需要。 第二有源器件的消除因此增加了用于输出分支的可用余量(即,增加一个V DS)。在本发明的电流镜中增加的净空对于低电压应用是特别有利的,因为它 能够保持输入电流精确镜像所需的高输出阻抗。