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    • 4. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US08703573B2
    • 2014-04-22
    • US13422487
    • 2012-03-16
    • Gyu-Hwan OhDong-Hyun KimKyung-Min ChungDong-Hyun Im
    • Gyu-Hwan OhDong-Hyun KimKyung-Min ChungDong-Hyun Im
    • H01L21/20
    • H01L27/1021H01L27/2409H01L27/2463H01L45/06H01L45/1233H01L45/1253H01L45/16H01L45/1683
    • A method of manufacturing the semiconductor device includes sequentially forming first to third mold layer patterns on a substrate and spaced apart from each other, forming a first semiconductor pattern between the first mold layer pattern and the second mold layer pattern, and a second semiconductor pattern between the second mold layer pattern and the third mold layer pattern, forming a first trench between the first mold layer pattern and the third mold layer pattern by removing a portion of the second mold layer pattern and portions of the first and second semiconductor patterns, depositing a material for a lower electrode conformally along side and bottom surfaces of the first trench, and forming first and second lower electrodes separated from each other on the first and second semiconductor patterns, respectively, by removing a portion of the material for a lower electrode positioned on the second mold layer pattern.
    • 制造半导体器件的方法包括在基片上依次形成第一至第三模层图案并彼此分开,在第一模层图案和第二模层图案之间形成第一半导体图案,以及第二半导体图案, 第二模层图案和第三模层图案,通过去除第二模层图案的一部分和第一和第二半导体图案的部分,在第一模层图案和第三模层图案之间形成第一沟槽, 用于下电极的材料沿着第一沟槽的侧表面和底表面共形地形成,并且通过移除位于第一和第二半导体图案上的下电极的材料的一部分,分别形成在第一和第二半导体图案上彼此分离的第一和第二下电极 第二模层图案。
    • 9. 发明申请
    • Semiconductor Device and Method of Manufacturing the Same
    • 半导体器件及其制造方法
    • US20120252187A1
    • 2012-10-04
    • US13422487
    • 2012-03-16
    • Gyu-Hwan OhDong-Hyun KimKyung-Min ChungDong-Hyun Im
    • Gyu-Hwan OhDong-Hyun KimKyung-Min ChungDong-Hyun Im
    • H01L21/329H01L21/283H01L21/02
    • H01L27/1021H01L27/2409H01L27/2463H01L45/06H01L45/1233H01L45/1253H01L45/16H01L45/1683
    • A method of manufacturing the semiconductor device includes sequentially forming first to third mold layer patterns on a substrate and spaced apart from each other , forming a first semiconductor pattern between the first mold layer pattern and the second mold layer pattern, and a second semiconductor pattern between the second mold layer pattern and the third mold layer pattern, forming a first trench between the first mold layer pattern and the third mold layer pattern by removing a portion of the second mold layer pattern and portions of the first and second semiconductor patterns, depositing a material for a lower electrode conformally along side and bottom surfaces of the first trench, and forming first and second lower electrodes separated from each other on the first and second semiconductor patterns, respectively, by removing a portion of the material for a lower electrode positioned on the second mold layer pattern.
    • 制造半导体器件的方法包括在基片上依次形成第一至第三模层图案并彼此分开,在第一模层图案和第二模层图案之间形成第一半导体图案,以及第二半导体图案, 第二模层图案和第三模层图案,通过去除第二模层图案的一部分和第一和第二半导体图案的部分,在第一模层图案和第三模层图案之间形成第一沟槽, 用于下电极的材料沿着第一沟槽的侧表面和底表面共形地形成,并且通过移除位于第一和第二半导体图案上的下电极的材料的一部分,分别形成在第一和第二半导体图案上彼此分离的第一和第二下电极 第二模层图案。