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1. 发明申请

US20100091553A1 SEMICONDUCTOR DEVICE HAVING RESISTANCE BASED MEMORY ARRAY AND METHOD OF OPERATION ASSOCIATED THEREWITH 有权
标题翻译：具有基于电阻的存储器阵列的半导体器件和与之相关的操作方法
公开(公告)号：US20100091553A1
公开(公告)日：2010-04-15
申请号：US12646345
申请日：2009-12-23
申请人： Yong-Jun Lee , Kwangjin Lee , Taek-Sung Kim , Kwangho Kim , Wooyeong Cho , Hyunho Choi , Hye-Jin Kim , Qi Wang
发明人： Yong-Jun Lee , Kwangjin Lee , Taek-Sung Kim , Kwangho Kim , Wooyeong Cho , Hyunho Choi , Hye-Jin Kim , Qi Wang
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0064 , G11C13/0097 , G11C2013/0078 , G11C2213/72
摘要： In one embodiment, the semiconductor device includes a non-volatile memory cell array, a write circuit configured to write to the non-volatile memory cell array, and a control circuit. The control circuit is configured to store at least one erase indicator. The erase indicator is associated with at least a portion of the non-volatile memory cell array and indicates a logic state. The control circuit is configured to control the write circuit to write the logic state indicated by the erase indicator in the non-volatile memory cell array during an erase operation of the associated portion of the non-volatile memory cell array.
摘要翻译：在一个实施例中，半导体器件包括非易失性存储单元阵列，被配置为写入非易失性存储单元阵列的写入电路和控制电路。控制电路被配置为存储至少一个擦除指示符。擦除指示符与非易失性存储单元阵列的至少一部分相关联并且指示逻辑状态。控制电路被配置为在非易失性存储单元阵列的相关部分的擦除操作期间，控制写入电路将由擦除指示符指示的逻辑状态写入非易失性存储单元阵列。

2. 发明授权

US08988135B2 Semiconductor device and body bias method thereof 有权
标题翻译：半导体器件及其体偏置方法
公开(公告)号：US08988135B2
公开(公告)日：2015-03-24
申请号：US14092318
申请日：2013-11-27
申请人： Kwangho Kim , JinHyuk Jeung , HyungJong Ko , HoSung Roh , Hojin Park , Sun-kyu Lee
发明人： Kwangho Kim , JinHyuk Jeung , HyungJong Ko , HoSung Roh , Hojin Park , Sun-kyu Lee
IPC分类号： H01L35/00 , G05F3/02 , G05F3/20
CPC分类号： G05F3/02 , G05F3/205
摘要： Exemplary embodiments disclose a semiconductor device which includes a function block including a plurality of transistors; a temperature detector configured to detect a driving temperature of the function block in real time; and an adaptive body bias generator configured to provide a body bias voltage to adaptively adjust leakage currents of the transistors according to the detected driving temperature, wherein the adaptive body bias generator is further configured to generate a body bias voltage corresponding to a predetermined minimum leakage current according to the driving temperature.
摘要翻译：示例性实施例公开了一种半导体器件，其包括具有多个晶体管的功能块; 温度检测器，被配置为实时检测功能块的驱动温度; 以及自适应体偏置发生器，其被配置为提供身体偏置电压，以根据检测到的驱动温度自适应地调整晶体管的泄漏电流，其中所述自适应体偏置发生器还被配置为产生对应于预定的最小泄漏电流的体偏置电压根据驾驶温度。

3. 发明授权

US09578881B2 Compositions for inhibition of insect sensing 有权
标题翻译：用于抑制昆虫感知的组合物
公开(公告)号：US09578881B2
公开(公告)日：2017-02-28
申请号：US14115553
申请日：2012-04-25
申请人： Laurence Zwiebel , Gregory M. Pask , David C. Rinker , Ian M. Romaine , Gary A. Sulikowski , Paul R. Reid , Alex G. Waterson , Kwangho Kim , Patrick L. Jones , Robert W. Taylor
发明人： Laurence Zwiebel , Gregory M. Pask , David C. Rinker , Ian M. Romaine , Gary A. Sulikowski , Paul R. Reid , Alex G. Waterson , Kwangho Kim , Patrick L. Jones , Robert W. Taylor
IPC分类号： A01N43/653 , A01N43/78 , A01N43/90 , A01N43/82 , A01N27/00 , A01N29/02 , A01N33/22 , A01N53/00
CPC分类号： A01N43/653 , A01N25/08 , A01N43/78 , A01N43/82 , A01N43/90 , A01N47/16 , A01N47/18 , A01N53/00 , C07D249/12 , C07D401/04 , C07D401/14 , C07D403/04 , C07D405/04 , C07D405/06 , C07D405/14 , C07D409/04 , C07D409/14 , C07D413/14 , C07D471/04 , C07D491/048 , C07D491/052 , C07D491/056 , C07D513/04 , A01N25/34 , A01N27/00 , A01N29/02 , A01N33/18 , A01N33/22 , A01N47/08 , A01N47/14 , A01N57/12 , A01N57/14 , A01N57/16
摘要： In one aspect, the invention relates to chemical modulators of insect olfactory receptors. In particular, compounds and compositions are provided that can inhibit sensory (e.g., host targeting) functions in airborne insects such as mosquitos. Method of employing such agents, and articles incorporating the same, are also provided. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention.
摘要翻译：一方面，本发明涉及昆虫嗅觉受体的化学调节剂。特别地，提供可以抑制空气传播昆虫如蚊子中的感觉（例如，宿主靶向）功能的化合物和组合物。还提供了使用这种试剂的方法和包含它们的制品。该摘要旨在作为用于在特定技术中进行搜索的扫描工具，而不意在限制本发明。

4. 发明申请

US20140159806A1 SEMICONDUCTOR DEVICE AND BODY BIAS METHOD THEREOF 有权
标题翻译：半导体器件及其偏心方法
公开(公告)号：US20140159806A1
公开(公告)日：2014-06-12
申请号：US14092318
申请日：2013-11-27
申请人： Kwangho KIM , JinHyuk JEUNG , HyungJong KO , HoSung ROH , Hojin PARK , Sun-kyu LEE
发明人： Kwangho KIM , JinHyuk JEUNG , HyungJong KO , HoSung ROH , Hojin PARK , Sun-kyu LEE
IPC分类号： G05F3/02
CPC分类号： G05F3/02 , G05F3/205
摘要： Exemplary embodiments disclose a semiconductor device which includes a function block including a plurality of transistors; a temperature detector configured to detect a driving temperature of the function block in real time; and an adaptive body bias generator configured to provide a body bias voltage to adaptively adjust leakage currents of the transistors according to the detected driving temperature, wherein the adaptive body bias generator is further configured to generate a body bias voltage corresponding to a predetermined minimum leakage current according to the driving temperature.
摘要翻译：示例性实施例公开了一种半导体器件，其包括包括多个晶体管的功能块; 温度检测器，被配置为实时检测功能块的驱动温度; 以及自适应体偏置发生器，其被配置为提供身体偏置电压，以根据检测到的驱动温度自适应地调整晶体管的泄漏电流，其中所述自适应体偏置发生器还被配置为产生对应于预定的最小泄漏电流的体偏置电压根据驾驶温度。

5. 发明授权

US08254158B2 Semiconductor device having resistance based memory array and method of operation associated therewith 有权
标题翻译：具有基于电阻的存储器阵列的半导体器件和与其相关联的操作方法
公开(公告)号：US08254158B2
公开(公告)日：2012-08-28
申请号：US12646345
申请日：2009-12-23
申请人： Yong-Jun Lee , Kwangjin Lee , Taek-Sung Kim , Kwangho Kim , Wooyeong Cho , Hyunho Choi , Hye-Jin Kim , Qi Wang
发明人： Yong-Jun Lee , Kwangjin Lee , Taek-Sung Kim , Kwangho Kim , Wooyeong Cho , Hyunho Choi , Hye-Jin Kim , Qi Wang
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0064 , G11C13/0097 , G11C2013/0078 , G11C2213/72
摘要： In one embodiment, the semiconductor device includes a non-volatile memory cell array, a write circuit configured to write to the non-volatile memory cell array, and a control circuit. The control circuit is configured to store at least one erase indicator. The erase indicator is associated with at least a portion of the non-volatile memory cell array and indicates a logic state. The control circuit is configured to control the write circuit to write the logic state indicated by the erase indicator in the non-volatile memory cell array during an erase operation of the associated portion of the non-volatile memory cell array.
摘要翻译：在一个实施例中，半导体器件包括非易失性存储单元阵列，被配置为写入非易失性存储单元阵列的写入电路和控制电路。控制电路被配置为存储至少一个擦除指示符。擦除指示符与非易失性存储单元阵列的至少一部分相关联并且指示逻辑状态。控制电路被配置为在非易失性存储单元阵列的相关部分的擦除操作期间，控制写入电路将由擦除指示符指示的逻辑状态写入非易失性存储单元阵列。

6. 发明授权

US08806271B2 Auxiliary power supply and user device including the same 有权
标题翻译：辅助电源和用户设备包括相同
公开(公告)号：US08806271B2
公开(公告)日：2014-08-12
申请号：US12654035
申请日：2009-12-08
申请人： Hwan-jin Yong , Donghyun Song , Janghwan Kim , Young-Goo Ko , Hyuck-Sun Kwon , Taek-Sung Kim , Kwangho Kim , Byungjin Ahn , Dongjin Lee , Byungse So , Jonggyu Park , Kyoungsub Oh , Kwanjong Park , Jongsoo Seo , Taehwa Yoo , Min-ho Kim
发明人： Hwan-jin Yong , Donghyun Song , Janghwan Kim , Young-Goo Ko , Hyuck-Sun Kwon , Taek-Sung Kim , Kwangho Kim , Byungjin Ahn , Dongjin Lee , Byungse So , Jonggyu Park , Kyoungsub Oh , Kwanjong Park , Jongsoo Seo , Taehwa Yoo , Min-ho Kim
IPC分类号： G06F11/00
CPC分类号： G06F11/2015 , G06F1/28 , G06F1/305 , G06F11/1441 , G06F2201/85
摘要： A user device is provided. The device includes a main power supply, and an auxiliary power supply. The main power supply provides a main power. The auxiliary power supply cuts off the main power according to a power level of the main power supply and provides an auxiliary power upon Sudden Power-Off (SPO).
摘要翻译：提供用户设备。该装置包括主电源和辅助电源。主电源提供主电源。辅助电源根据主电源的功率水平切断主电源，并在突然关机（SPO）时提供辅助电源。

7. 发明申请

US20080080276A1 Clock frequency doubler method and apparatus for serial flash testing 有权
标题翻译：用于串行闪存测试的时钟倍频器方法和装置
公开(公告)号：US20080080276A1
公开(公告)日：2008-04-03
申请号：US11526124
申请日：2006-09-22
申请人： Tien-Ler Lin , Kwangho Kim , Hui Chen , Eungjoon Park
发明人： Tien-Ler Lin , Kwangho Kim , Hui Chen , Eungjoon Park
IPC分类号： G11C16/06 , G11C29/00 , G11C7/00 , G11C11/34
CPC分类号： G11C29/14 , G11C7/22 , G11C7/222 , G11C29/12015
摘要： Method and apparatus for memory device testing at a higher clock rate than the clock rate provided by a memory tester. The method includes providing a memory tester capable of generating a first clock signal characterized by a first clock frequency, and applying the first clock signal to the memory device. The method also includes receiving a command for activating a high-clock-frequency test mode. The method generates a second clock signal in the memory device in response to the first clock signal. The second clock signal is characterized by a second clock frequency which is higher than the first clock frequency. The method then tests the memory device at the second clock frequency. In a specific embodiment, the method is applied to a serial flash memory device. The invention can also be applied to testing and operating other memory devices or systems that include synchronized circuits.
摘要翻译：用于以比由存储器测试器提供的时钟速率更高的时钟速率测试存储器件的方法和装置。该方法包括提供能够产生以第一时钟频率为特征的第一时钟信号并将第一时钟信号施加到存储器件的存储器测试器。该方法还包括接收用于激活高时钟频率测试模式的命令。该方法响应于第一时钟信号在存储器件中产生第二时钟信号。第二时钟信号的特征在于高于第一时钟频率的第二时钟频率。然后该方法以第二个时钟频率测试存储器件。在具体实施例中，该方法被应用于串行闪存设备。本发明还可以应用于测试和操作包括同步电路的其它存储器件或系统。

8. 发明申请

US20140242135A1 COMPOSITIONS FOR INHIBITION OF INSECT SENSING 有权
标题翻译：防止感染的组合物
公开(公告)号：US20140242135A1
公开(公告)日：2014-08-28
申请号：US14115553
申请日：2012-04-25
申请人： Laurence Zwiebel , Gregory M. Pask , David C. Rinker , Ian M. Romaine , Gary A. Sulikowski , Paul R. Reid , Alex G. Waterson , Kwangho Kim , Patrick L. Jones , Robert W. Taylor
发明人： Laurence Zwiebel , Gregory M. Pask , David C. Rinker , Ian M. Romaine , Gary A. Sulikowski , Paul R. Reid , Alex G. Waterson , Kwangho Kim , Patrick L. Jones , Robert W. Taylor
IPC分类号： A01N43/653 , A01N43/78 , A01N43/90
CPC分类号： A01N43/653 , A01N25/08 , A01N43/78 , A01N43/82 , A01N43/90 , A01N47/16 , A01N47/18 , A01N53/00 , C07D249/12 , C07D401/04 , C07D401/14 , C07D403/04 , C07D405/04 , C07D405/06 , C07D405/14 , C07D409/04 , C07D409/14 , C07D413/14 , C07D471/04 , C07D491/048 , C07D491/052 , C07D491/056 , C07D513/04 , A01N25/34 , A01N27/00 , A01N29/02 , A01N33/18 , A01N33/22 , A01N47/08 , A01N47/14 , A01N57/12 , A01N57/14 , A01N57/16
摘要： In one aspect, the invention relates to chemical modulators of insect olfactory receptors. In particular, compounds and compositions are provided that can inhibit sensory (e.g., host targeting) functions in airborne insects such as mosquitos. Method of employing such agents, and articles incorporating the same, are also provided. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention.
摘要翻译：一方面，本发明涉及昆虫嗅觉受体的化学调节剂。特别地，提供可以抑制空气传播昆虫如蚊子中的感觉（例如，宿主靶向）功能的化合物和组合物。还提供了使用这种试剂的方法和包含它们的制品。该摘要旨在作为用于在特定技术中进行搜索的扫描工具，而不意在限制本发明。

9. 发明申请

US20100146333A1 Auxiliary power supply and user device including the same 有权
标题翻译：辅助电源和用户设备包括相同
公开(公告)号：US20100146333A1
公开(公告)日：2010-06-10
申请号：US12654035
申请日：2009-12-08
申请人： Hwan-jin Yong , Donghyun Song , Janghwan Kim , Young-Goo Ko , Hyuck-Sun Kwon , Taek-Sung Kim , Kwangho Kim , Byungjin Ahn , Dongjin Lee , Byungse So , Jonggyu Park , Kyoungsub Oh , Kwanjong Park , Jongsoo Seo , Taehwa Yoo , Mih-ho Kim
发明人： Hwan-jin Yong , Donghyun Song , Janghwan Kim , Young-Goo Ko , Hyuck-Sun Kwon , Taek-Sung Kim , Kwangho Kim , Byungjin Ahn , Dongjin Lee , Byungse So , Jonggyu Park , Kyoungsub Oh , Kwanjong Park , Jongsoo Seo , Taehwa Yoo , Mih-ho Kim
IPC分类号： G06F1/28 , G06F11/00 , G06F11/20 , G06F1/26
CPC分类号： G06F11/2015 , G06F1/28 , G06F1/305 , G06F11/1441 , G06F2201/85
摘要： A user device is provided. The device includes a main power supply, and an auxiliary power supply. The main power supply provides a main power. The auxiliary power supply cuts off the main power according to a power level of the main power supply and provides an auxiliary power upon Sudden Power-Off (SPO).
摘要翻译：提供用户设备。该装置包括主电源和辅助电源。主电源提供主电源。辅助电源根据主电源的功率水平切断主电源，并在突然关机（SPO）时提供辅助电源。

10. 发明授权

US07502267B2 Clock frequency doubler method and apparatus for serial flash testing 有权
标题翻译：用于串行闪存测试的时钟倍频器方法和装置
公开(公告)号：US07502267B2
公开(公告)日：2009-03-10
申请号：US11526124
申请日：2006-09-22
申请人： Tien-Ler Lin , Kwangho Kim , Hui Chen , Eungjoon Park
发明人： Tien-Ler Lin , Kwangho Kim , Hui Chen , Eungjoon Park
IPC分类号： G11C7/00 , G11C11/34 , G11C8/00
CPC分类号： G11C29/14 , G11C7/22 , G11C7/222 , G11C29/12015
摘要： Method and apparatus for memory device testing at a higher clock rate than the clock rate provided by a memory tester. The method includes providing a memory tester capable of generating a first clock signal characterized by a first clock frequency, and applying the first clock signal to the memory device. The method also includes receiving a command for activating a high-clock-frequency test mode. The method generates a second clock signal in the memory device in response to the first clock signal. The second clock signal is characterized by a second clock frequency which is higher than the first clock frequency. The method then tests the memory device at the second clock frequency. In a specific embodiment, the method is applied to a serial flash memory device. The invention can also be applied to testing and operating other memory devices or systems that include synchronized circuits.
摘要翻译：用于以比由存储器测试器提供的时钟速率更高的时钟速率测试存储器件的方法和装置。该方法包括提供能够产生以第一时钟频率为特征的第一时钟信号并将第一时钟信号施加到存储器件的存储器测试器。该方法还包括接收用于激活高时钟频率测试模式的命令。该方法响应于第一时钟信号在存储器件中产生第二时钟信号。第二时钟信号的特征在于高于第一时钟频率的第二时钟频率。然后该方法以第二个时钟频率测试存储器件。在具体实施例中，该方法被应用于串行闪存设备。本发明还可以应用于测试和操作包括同步电路的其它存储器件或系统。

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