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1. 外观设计

USD672731S1 Light emitting diode 有权
公开(公告)号：USD672731S1
公开(公告)日：2012-12-18
申请号：US29383906
申请日：2011-01-24
申请人： Michael Bergmann , Kevin Haberern , Matthew Donofrio , Christopher D. Williams , Kevin Shawne Schneider
设计人： Michael Bergmann , Kevin Haberern , Matthew Donofrio , Christopher D. Williams , Kevin Shawne Schneider

2. 发明申请

US20120211793A1 Low Temperature High Strength Metal Stack for Die Attachment 有权
标题翻译：用于模具附件的低温高强度金属叠层
公开(公告)号：US20120211793A1
公开(公告)日：2012-08-23
申请号：US13361569
申请日：2012-01-30
申请人： Michael John Bergmann , Christopher D. Williams , Kevin Shawne Schneider , Kevin Haberern , Matthew Donofrlo
发明人： Michael John Bergmann , Christopher D. Williams , Kevin Shawne Schneider , Kevin Haberern , Matthew Donofrlo
IPC分类号： H01L33/62
CPC分类号： H01L27/153 , H01L24/29 , H01L24/32 , H01L24/83 , H01L25/0753 , H01L33/40 , H01L33/62 , H01L2224/16225 , H01L2224/29 , H01L2224/2908 , H01L2224/29083 , H01L2224/29084 , H01L2224/29101 , H01L2224/29111 , H01L2224/29144 , H01L2224/29155 , H01L2224/2919 , H01L2224/32014 , H01L2224/32225 , H01L2224/32245 , H01L2224/32258 , H01L2224/3303 , H01L2224/48091 , H01L2224/48137 , H01L2224/4814 , H01L2224/48227 , H01L2224/48247 , H01L2224/49107 , H01L2224/73265 , H01L2224/83 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01058 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/10158 , H01L2924/12041 , H01L2924/00 , H01L2924/01028 , H01L2924/00014 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929
摘要： A light emitting diode structure includes a diode region and a metal stack on the diode region. The metal stack includes a barrier layer on the diode region and a bonding layer on the barrier layer. The barrier layer is between the bonding layer and the diode region. The bonding layer includes gold, tin and nickel. A weight percentage of tin in the bonding layer is greater than 20 percent and a weight percentage of gold in the bonding layer is less than about 75 percent. A weight percentage of nickel in the bonding layer may be greater than 10 percent.
摘要翻译：发光二极管结构包括二极管区域和二极管区域上的金属堆叠。金属堆叠包括二极管区域上的阻挡层和阻挡层上的结合层。阻挡层在结合层和二极管区之间。结合层包括金，锡和镍。接合层中锡的重量百分比大于20％，接合层中的金的重量百分数小于约75％。接合层中镍的重量百分数可以大于10％。

3. 发明申请

US20110278590A1 Semiconductor Devices Having Gates Including Oxidized Nickel and Related Methods of Fabricating the Same 有权
标题翻译：具有包含氧化镍的门的半导体器件及其制造方法
公开(公告)号：US20110278590A1
公开(公告)日：2011-11-17
申请号：US12778334
申请日：2010-05-12
申请人： Van Mieczkowski , Helmut Hagleitner , Kevin Haberern
发明人： Van Mieczkowski , Helmut Hagleitner , Kevin Haberern
IPC分类号： H01L29/778 , H01L29/80 , H01L21/335 , H01L21/338 , H01L29/24 , H01L29/20
CPC分类号： H01L29/66068 , H01L29/1608 , H01L29/2003 , H01L29/47 , H01L29/475 , H01L29/66871 , H01L29/7786 , H01L29/812 , H01L29/872
摘要： Schottky barrier semiconductor devices are provided including a wide bandgap semiconductor layer and a gate on the wide bandgap semiconductor layer. The gate includes a metal layer on the wide bandgap semiconductor layer including a nickel oxide (NiO) layer. Related methods of fabricating devices are also provided herein.
摘要翻译：提供肖特基势垒半导体器件，其包括宽带隙半导体层和宽带隙半导体层上的栅极。栅极包括在包括氧化镍（NiO）层的宽带隙半导体层上的金属层。本文还提供了相关制造装置的方法。

4. 发明申请

US20110008922A1 METHODS OF FORMING LIGHT EMITTING DEVICES HAVING CURRENT REDUCING STRUCTURES 有权
标题翻译：形成具有减少电流结构的发光装置的方法
公开(公告)号：US20110008922A1
公开(公告)日：2011-01-13
申请号：US12879692
申请日：2010-09-10
申请人： David Todd Emerson , Kevin Haberern , Michael John Bergmann , David B. Slater, JR. , Matthew Donofrio , John Edmond
发明人： David Todd Emerson , Kevin Haberern , Michael John Bergmann , David B. Slater, JR. , Matthew Donofrio , John Edmond
IPC分类号： H01L33/36
CPC分类号： H01L33/145 , H01L24/05 , H01L33/14 , H01L33/38 , H01L2224/49107 , H01L2933/0016
摘要： A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region.
摘要翻译：发光器件包括p型半导体层，n型半导体层和n型半导体层和p型半导体层之间的有源区。 p型半导体层或与p型半导体层相对的n型半导体层上的非透明特性，例如引线接合焊盘，在p型半导体层中具有导电性降低的区域或n型半导体层并且与非透明特征对准。导电性降低区域可以从与n型半导体层相对的p型半导体层的表面朝向有源区域和/或从与p型半导体层相对的n型半导体层的表面朝向有源区域地区。

5. 发明申请

US20070007544A1 Semiconductor devices having self aligned semiconductor mesas and contact layers 有权
标题翻译：具有自对准半导体台面和接触层的半导体器件
公开(公告)号：US20070007544A1
公开(公告)日：2007-01-11
申请号：US11520383
申请日：2006-09-13
申请人： Kevin Haberern , Raymond Rosado , Michael Bergman , David Emerson
发明人： Kevin Haberern , Raymond Rosado , Michael Bergman , David Emerson
IPC分类号： H01L33/00 , H01S5/00
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer. Related devices are also discussed.
摘要翻译：形成半导体器件的方法可以包括在衬底上形成半导体结构，半导体结构具有台面侧壁和与衬底相对的台面。接触层可以形成在台面表面上，其中接触层具有侧壁和与台面表面相对的接触表面，并且其中接触层延伸穿过基本上整个台面表面。可以在台面侧壁和邻近台面表面的接触层侧壁的部分上形成钝化层，并且钝化层可以暴露接触层的基本上整个接触表面。还讨论了相关设备。

6. 发明申请

US20060046328A1 Ultra-thin ohmic contacts for p-type nitride light emitting devices and methods of forming 有权
标题翻译：用于p型氮化物发光器件的超薄欧姆接触和形成方法
公开(公告)号：US20060046328A1
公开(公告)日：2006-03-02
申请号：US11191111
申请日：2005-07-27
申请人： Mark Raffetto , Jayesh Bharathan , Kevin Haberern , Michael Bergmann , David Emerson , James Ibbetson , Ting Li
发明人： Mark Raffetto , Jayesh Bharathan , Kevin Haberern , Michael Bergmann , David Emerson , James Ibbetson , Ting Li
IPC分类号： H01L21/00
CPC分类号： H01L33/42 , H01L24/32 , H01L33/32 , H01L33/38 , H01L33/40 , H01L33/405 , H01L2224/48463 , H01L2224/73265 , H01L2924/12041 , H01L2924/12042 , H01L2924/3011 , H01L2933/0016 , H01L2924/00
摘要： A semiconductor based Light Emitting Device (LED) can include a p-type nitride layer and a metal ohmic contact, on the p-type nitride layer. The metal ohmic contact can have an average thickness of less than about 25 Å and a specific contact resistivity less than about 10−3 ohm-cm2.
摘要翻译：基于半导体的发光器件（LED）可以在p型氮化物层上包括p型氮化物层和金属欧姆接触。金属欧姆接触可以具有小于约的平均厚度和小于约10 -3欧姆 - 厘米2的特定接触电阻。

7. 发明授权

US08896122B2 Semiconductor devices having gates including oxidized nickel 有权
标题翻译：具有包括氧化镍的栅极的半导体器件
公开(公告)号：US08896122B2
公开(公告)日：2014-11-25
申请号：US12778334
申请日：2010-05-12
申请人： Van Mieczkowski , Helmut Hagleitner , Kevin Haberern
发明人： Van Mieczkowski , Helmut Hagleitner , Kevin Haberern
IPC分类号： H01L21/335 , H01L29/778 , H01L29/24 , H01L29/80 , H01L29/66 , H01L29/47 , H01L29/812 , H01L29/872 , H01L29/16 , H01L29/20
CPC分类号： H01L29/66068 , H01L29/1608 , H01L29/2003 , H01L29/47 , H01L29/475 , H01L29/66871 , H01L29/7786 , H01L29/812 , H01L29/872
摘要： Schottky barrier semiconductor devices are provided including a wide bandgap semiconductor layer and a gate on the wide bandgap semiconductor layer. The gate includes a metal layer on the wide bandgap semiconductor layer including a nickel oxide (NiO) layer. Related methods of fabricating devices are also provided herein.
摘要翻译：提供肖特基势垒半导体器件，其包括宽带隙半导体层和宽带隙半导体层上的栅极。栅极包括在包括氧化镍（NiO）层的宽带隙半导体层上的金属层。本文还提供了相关制造装置的方法。

8. 发明申请

US20120153343A1 METHODS OF FORMING LIGHT EMITTING DEVICES HAVING CURRENT REDUCING STRUCTURES 有权
标题翻译：形成具有减少电流结构的发光装置的方法
公开(公告)号：US20120153343A1
公开(公告)日：2012-06-21
申请号：US13406251
申请日：2012-02-27
申请人： David Todd Emerson , Kevin Haberern , Michael John Bergmann , David B. Slater, JR. , Matthew Donofrio , John Edmond
发明人： David Todd Emerson , Kevin Haberern , Michael John Bergmann , David B. Slater, JR. , Matthew Donofrio , John Edmond
IPC分类号： H01L33/48 , H01L33/36
CPC分类号： H01L33/145 , H01L24/05 , H01L33/14 , H01L33/38 , H01L2224/49107 , H01L2933/0016
摘要： A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region.
摘要翻译：发光器件包括p型半导体层，n型半导体层和n型半导体层和p型半导体层之间的有源区。 p型半导体层或与p型半导体层相对的n型半导体层上的非透明特性，例如引线接合焊盘，在p型半导体层中具有导电性降低的区域或n型半导体层并且与非透明特征对准。导电性降低区域可以从与n型半导体层相对的p型半导体层的表面朝向有源区域和/或从与p型半导体层相对的n型半导体层的表面朝向有源区域地区。

9. 外观设计

USD593968S1 LED chip 有权
公开(公告)号：USD593968S1
公开(公告)日：2009-06-09
申请号：US29328502
申请日：2008-11-25
申请人： John Edmond , James Ibbetson , Michael John Bergmann , Amber Christine Salter , David Todd Emerson , Ashay Chitnis , Bernd P. Keller , Kevin Haberern
设计人： John Edmond , James Ibbetson , Michael John Bergmann , Amber Christine Salter , David Todd Emerson , Ashay Chitnis , Bernd P. Keller , Kevin Haberern

10. 发明申请

US20060267043A1 Deep ultraviolet light emitting devices and methods of fabricating deep ultraviolet light emitting devices 审中-公开
标题翻译：深紫外光发射装置及其制造深紫外光发射装置的方法
公开(公告)号：US20060267043A1
公开(公告)日：2006-11-30
申请号：US11140384
申请日：2005-05-27
申请人： David Emerson , Michael Bergmann , Amber Abare , Kevin Haberern
发明人： David Emerson , Michael Bergmann , Amber Abare , Kevin Haberern
IPC分类号： H01L31/00 , H01L21/00
CPC分类号： H01L33/12 , B82Y20/00 , H01L33/06 , H01L33/32
摘要： Light emitting devices and methods of fabricating light emitting devices that emit at wavelengths less than 360 nm with wall plug efficiencies of at least than 4% are provided. Wall plug efficiencies may be at least 5% or at least 6%. Light emitting devices and methods of fabricating light emitting devices that emit at wavelengths less than 345 nm with wall plug efficiencies of at least than 2% are also provided. Light emitting devices and methods of fabricating light emitting devices that emit at wavelengths less than 330 nm with wall plug efficiencies of at least than 0.4% are provided. Light emitting devices and methods of fabricating light emitting devices having a peak output wavelength of not greater than 360 nm and an output power of at least 5 mW, having a peak output wavelength of 345 nm or less and an output power of at least 3 mW and/or a peak output wavelength of 330 nm or less and an output power of at least 0.3 mW at a current density of less than about 0.35 μA/μm2 are also provided. The semiconductor light emitting devices may have a direct current lifetime of at least 100 hours, at least 500 hours or at least 1000 hours.
摘要翻译：提供发光装置和制造发射波长小于360nm，壁塞效率至少为4％的发光装置的方法。墙壁插头效率可以至少为5％或至少为6％。还提供了发光装置和制造发射波长小于345nm并具有至少2％壁塞效率的发光装置的方法。提供发光装置和制造发射波长小于330nm，壁塞效率至少为0.4％的发光器件的方法。具有峰值输出波长不大于360nm和输出功率至少为5mW的发光器件的发光器件和方法，具有345nm或更小的峰值输出波长和至少3mW的输出功率和/或峰值输出波长为330nm以下，输出功率为0.3mW以下，电流密度小于0.35μA/ m 2以下。半导体发光器件可以具有至少100小时，至少500小时或至少1000小时的直流电寿命。

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