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    • 1. 发明专利
    • Lid for beverage can
    • 提供饮料罐
    • JP2005289434A
    • 2005-10-20
    • JP2004106151
    • 2004-03-31
    • Kazuyoshi Yoshida一良 吉田
    • YOSHIDA KAZUYOSHI
    • B65D17/34B65D17/347B65D17/353
    • PROBLEM TO BE SOLVED: To provide a lid of a beverage can wherein degradation of the fitting strength to a body is prevented and a tab is easily operated.
      SOLUTION: The can lid 1 is formed in a curved shape having a folding and fitting part 3 formed on an outer circumferential edge part of the can lid 1, an annular recessed part 4 formed on the inner side in the radial direction of the folding and fitting part 3, an annular projecting part 5 formed on the inner side in the radial direction of the annular recessed part 4, and a flat part 6 formed on the inner side in the radial direction of the annular projecting part 5. A cutout 13 is formed in the annular projecting part 5, and a rear end of a tab 11 fitted to the flat part 6 faces a bottom face of the cutout 13.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:提供一种饮料罐的盖,其中防止了对身体的装配强度的降低,并且容易操作翼片。 解决方案:罐盖1形成为弯曲形状,其具有形成在罐盖1的外周边缘部分上的折叠和装配部分3,形成在罐盖1的径向内侧的环形凹部4 折叠和装配部分3,形成在环形凹部4的径向内侧的环形突出部分5和形成在环形突出部分5的径向内侧上的平坦部分6。 切口13形成在环状突出部5中,并且嵌合于平坦部6的突片11的后端面对切口13的底面。(C)2006年,JPO&NCIPI
    • 2. 发明申请
    • CAPACITOR MANUFACTURING METHOD
    • 电容器制造方法
    • US20130177701A1
    • 2013-07-11
    • US13772898
    • 2013-02-21
    • Tailu NINGHironao FUJIKIKazuyoshi YOSHIDAMichiko SHINGAI
    • Tailu NINGHironao FUJIKIKazuyoshi YOSHIDAMichiko SHINGAI
    • H01G9/00
    • H01G9/0036H01G9/028H01G9/15
    • A capacitor manufacturing method that enables a capacitor having a high withstand voltage, a high electrostatic capacitance and a satisfactorily small ESR to be manufactured simply and at a high level of productivity. In the capacitor manufacturing method, a film-formation treatment of applying a conductive polymer solution containing a π-conjugated conductive polymer, a polyanion and a solvent to the dielectric layer side of a capacitor substrate having a dielectric layer formed on the surface of an anode, and then performing drying to form a conductive polymer film, is performed at least twice, and the conductive polymer solution used in at least one film-formation treatment among the second film-formation treatment and subsequent film-formation treatments is a high viscosity solution having a higher viscosity than the conductive polymer solution used in the first film-formation treatment.
    • 能够简单且高生产率地制造具有高耐压,高静电电容和令人满意的小ESR的电容器的电容器制造方法。 在电容器制造方法中,在具有形成在阳极表面上的电介质层的电容器基板的电介质层侧上涂敷含有π共轭导电性聚合物,聚阴离子和溶剂的导电性聚合物溶液的成膜处理 ,然后进行干燥以形成导电聚合物膜,进行至少两次,并且在第二成膜处理和随后的成膜处理中用于至少一个成膜处理的导电聚合物溶液是高粘度溶液 具有比在第一成膜处理中使用的导电聚合物溶液更高的粘度。
    • 6. 发明授权
    • Method for manufacturing semiconductor device having via plug
    • 具有通孔插头的半导体器件的制造方法
    • US07842608B2
    • 2010-11-30
    • US12192349
    • 2008-08-15
    • Kazuyoshi Yoshida
    • Kazuyoshi Yoshida
    • H01L21/4763
    • H01L21/76814H01L21/31116H01L21/31138H01L21/32136H01L21/76805
    • A method for manufacturing a semiconductor device, including: forming a first conductive layer on a first insulating film; forming a second insulating film so as to cover the first conductive layer; forming a resist mask on the second insulating film; forming a hole reaching the first conductive layer in the second insulating film by a first etching using the resist mask; removing the resist mask; removing the first conductive layer exposed at the bottom of the hole by a second etching, so that the hole reaches the first insulating film and the first conductive layer exposes at a side surface within the hole; forming a conductive plug in contact with the first conductive layer exposed at the side surface within the hole by burying a conductive material in the hole; and forming a second conductive layer to be connected to the conductive plug on the second insulating film.
    • 一种制造半导体器件的方法,包括:在第一绝缘膜上形成第一导电层; 形成第二绝缘膜以覆盖第一导电层; 在所述第二绝缘膜上形成抗蚀剂掩模; 通过使用抗蚀剂掩模的第一蚀刻形成到达第二绝缘膜中的第一导电层的孔; 去除抗蚀剂掩模; 通过第二蚀刻去除在孔的底部暴露的第一导电层,使得孔到达第一绝缘膜,并且第一导电层在孔内的侧表面暴露; 通过在孔中埋入导电材料形成与在孔内的侧表面暴露的第一导电层接触的导电插塞; 以及形成与所述第二绝缘膜上的所述导电插塞连接的第二导电层。