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1. 发明专利

JP2006132909A Furnace cage for charcoal cooking stove 审中-公开
标题翻译：烧烤炉烤火锅
公开(公告)号：JP2006132909A
公开(公告)日：2006-05-25
申请号：JP2004350434
申请日：2004-11-04
申请人： Kazuo Akamatsu , 一男赤松
发明人： AKAMATSU KAZUO
IPC分类号： F24B1/20 , F23B99/00
摘要： PROBLEM TO BE SOLVED: To solve inconvenience such as having difficulty in stacking charcoal and adjusting fire when igniting and taking time to extinguish fire in a general charcoal cooking stove.
SOLUTION: A furnace cage characterized in that a small charcoal receiving metal plate 2 having air holes 3 in the bottom part of the cage 1 using a perforated metal plate and having an opening at the upper part is dropped to keep a space 4 to the bottom part of a container, is used to simplify stacking of charcoal and adjustment and extinction of fire to thereby compensate inconvenience. Further, the use of a charcoal cooking stove and supplementary equipment (a grill height adjuster and a fire making instrument) enhancing the characteristics of the furnace cage, simplifies stacking of charcoal and adjustment and extinction of fire to solve inconvenience.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：解决在一般木炭烹饪炉中点燃和花费时间扑灭火灾时难以堆放木炭和调整火灾等不便。解决方案：一种炉笼，其特征在于，使用穿孔金属板，并且在上部具有开口的保持架1的底部中具有气孔3的小木炭接收金属板2被落下以保持空间4 到容器的底部，用于简化木炭的堆放和调整和消除火，从而补偿不便。此外，使用木炭烹饪炉和辅助设备（烤架高度调节器和消防器具）提高炉笼的特性，简化了木炭的堆放，调节和消除火灾，解决了不便。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2004267701A Chopping board with casters 审中-公开
公开(公告)号：JP2004267701A
公开(公告)日：2004-09-30
申请号：JP2003105872
申请日：2003-03-05
申请人： Kazuo Akamatsu , 一男赤松
发明人： AKAMATSU KAZUO
IPC分类号： A47J47/00
摘要： PROBLEM TO BE SOLVED: To provide a chopping board with casters which is easy to house vertically while the front and rear sides of the chopping board is used sanitarily.
SOLUTION: Caster members are rotatably fitted to parts close to both of the ends of the front surface and rear surface of the peripheral wall surface of the chopping board.
COPYRIGHT: (C)2004,JPO&NCIPI

3. 发明申请

US20110207264A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：US20110207264A1
公开(公告)日：2011-08-25
申请号：US12905395
申请日：2010-10-15
申请人： Manabu TOMISAKA , Akira Tai , Kazuo Akamatsu , Yutaka Fukuda , Yoshiko Fukuda , Yuji Fukuda , Mika Ootsuki , Mayu Fukuda
发明人： Manabu TOMISAKA , Akira Tai , Kazuo Akamatsu , Yutaka Fukuda , Yoshiko Fukuda , Yuji Fukuda , Mika Ootsuki , Mayu Fukuda
IPC分类号： H01L21/56
CPC分类号： H01L21/304 , H01L29/66333 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device includes cutting a part of a resin insulating layer formed on a surface of a semiconductor substrate with a cutting tool. The cutting the part of the resin insulating layer includes cutting a portion of the resin insulating layer that has a surface on which a metal layer is disposed. The cutting the portion of the resin insulating layer is performed in such a manner that, in a stress distribution inside the resin insulating layer along an edge portion of the cutting tool and a peripheral portion of the edge portion, a width at 90% of a maximum value is not more than 1.3 μm.
摘要翻译：半导体器件的制造方法包括：利用切削工具切断形成在半导体基板的表面上的树脂绝缘层的一部分。切割树脂绝缘层的一部分包括切割具有设置有金属层的表面的树脂绝缘层的一部分。切割树脂绝缘层的部分是这样一种方式进行的：在树脂绝缘层沿着切削工具的边缘部分和边缘部分的周边部分的应力分布中，90％的宽度最大值不大于1.3μm。

4. 发明授权

US4219584A Hard butter composition 失效
标题翻译：硬黄油组成
公开(公告)号：US4219584A
公开(公告)日：1980-08-26
申请号：US939797
申请日：1978-09-05
申请人： Hiroyuki Mori , Yukiya Iwanaga , Kazuo Akamatsu , Hayato Kubota
发明人： Hiroyuki Mori , Yukiya Iwanaga , Kazuo Akamatsu , Hayato Kubota
IPC分类号： A23D9/00 , A23G1/00 , A23G1/36 , A23G1/38 , A23D5/00
CPC分类号： A23G1/36 , A23D9/00 , A23G1/38
摘要： A hard butter composition useful as a cacoa butter substitute comprising an intermediate fraction of palm oil and a solid fat fraction of shea fat, the total content of 2-oleo-1,3-distearin and 2-oleo-palmito-stearin in said shea fat fraction being lower than 80% by weight, wherein an intermediate fraction of palm oil having a slip melting point of 29.0.degree.-32.5.degree. C. and a clear point of not more than 34.degree. C. is utilized, whereby the shea fat fraction is not required to be specifically purified.
摘要翻译：可用作包括棕榈油的中间部分的棕榈油黄油替代品的硬黄油组合物，以及所述剪切板中的2-油烯-1,3-二硬脂酸酯和2-油醇 - 棕榈醇 - 硬脂精的总含量脂肪馏分低于80重量％，其中使用具有滑移熔点为29.0-32.5℃和澄清点不超过34℃的棕榈油的中间馏分，由此得到牛油脂分数不需要特别纯化。

5. 发明授权

US08263490B2 Formation method of metallic electrode of semiconductor device and metallic electrode formation apparatus 有权
标题翻译：半导体器件和金属电极形成装置的金属电极的形成方法
公开(公告)号：US08263490B2
公开(公告)日：2012-09-11
申请号：US12923576
申请日：2010-09-28
申请人： Manabu Tomisaka , Hidetoshi Katou , Yutaka Fukuda , Akira Tai , Kazuo Akamatsu , Yoshiko Fukuda , Yuji Fukuda , Mika Ootsuki
发明人： Manabu Tomisaka , Hidetoshi Katou , Yutaka Fukuda , Akira Tai , Kazuo Akamatsu , Yoshiko Fukuda , Yuji Fukuda , Mika Ootsuki
IPC分类号： H01L21/44
CPC分类号： G01B11/06 , G01B11/306 , H01L21/32115 , H01L21/7684 , H01L22/12 , H01L22/20 , H01L24/27 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , Y10T29/52 , H01L2924/01014 , H01L2924/00
摘要： A formation method of a metallic electrode of a semiconductor device is disclosed. The method includes: acquiring data about surface shape of a surface part of a semiconductor substrate; and causing a deformation device to deform the semiconductor substrate based on the data so that a distance between a cutting plane and the surface part falls within a required accuracy in cutting amount. In deforming the semiconductor substrate, multiple actuators are used as the deformation device. A pitch of the multiple actuators is set to a value that is greater than one-half of wavelength of spatial frequency of a thickness distribution of the semiconductor substrate and that is less than or equal to the wavelength.
摘要翻译：公开了半导体器件的金属电极的形成方法。该方法包括：获取关于半导体衬底的表面部分的表面形状的数据; 并且使变形装置基于数据使半导体衬底变形，使得切割平面和表面部分之间的距离落入所需切割量的精度。在使半导体基板变形时，使用多个致动器作为变形装置。多个致动器的间距被设定为大于半导体衬底的厚度分布的空间频率的波长的一半的值，小于或等于该波长的值。

6. 发明申请

US20110042741A1 Semiconductor device having semiconductor chip and metal plate and method for manufacturing the same 有权
标题翻译：具有半导体芯片和金属板的半导体装置及其制造方法
公开(公告)号：US20110042741A1
公开(公告)日：2011-02-24
申请号：US12805733
申请日：2010-08-17
申请人： Daisuke Fukuoka , Takanori Teshima , Kuniaki Mamitsu , Ken Sakamoto , Manabu Tomisaka , Tetsuo Fujii , Akira Tai , Kazuo Akamatsu , Masayoshi Nishihata
发明人： Daisuke Fukuoka , Takanori Teshima , Kuniaki Mamitsu , Ken Sakamoto , Manabu Tomisaka , Tetsuo Fujii , Akira Tai , Kazuo Akamatsu , Masayoshi Nishihata
IPC分类号： H01L29/772 , H01L23/498
CPC分类号： H01L23/3192 , H01L23/4334 , H01L23/492 , H01L24/01 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/32 , H01L2224/0401 , H01L2224/04042 , H01L2224/05599 , H01L2224/05644 , H01L2224/16 , H01L2224/48491 , H01L2224/73253 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01033 , H01L2924/0105 , H01L2924/01052 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/13055 , H01L2924/3512 , H01L2924/00
摘要： A semiconductor device includes a first protection film for covering a first metal wiring. A second protection film is disposed on the first protection film, which is covered with a solder layer. Even if a crack is generated in the second protection film before the solder layer is formed on the second protection film, the crack is restricted from proceeding into the first protection film.
摘要翻译：半导体器件包括用于覆盖第一金属布线的第一保护膜。第一保护膜设置在第一保护膜上，该第一保护膜被焊料层覆盖。即使在第二保护膜上形成焊料层之前，在第二保护膜中产生裂纹，限制裂纹进入第一保护膜。

7. 发明授权

US08441122B2 Semiconductor device having semiconductor chip and metal plate 有权
标题翻译：具有半导体芯片和金属板的半导体器件
公开(公告)号：US08441122B2
公开(公告)日：2013-05-14
申请号：US12805733
申请日：2010-08-17
申请人： Daisuke Fukuoka , Takanori Teshima , Kuniaki Mamitsu , Ken Sakamoto , Tetsuo Fujii , Akira Tai , Kazuo Akamatsu , Masayoshi Nishihata
发明人： Daisuke Fukuoka , Takanori Teshima , Kuniaki Mamitsu , Ken Sakamoto , Tetsuo Fujii , Akira Tai , Kazuo Akamatsu , Masayoshi Nishihata
IPC分类号： H01L23/34
CPC分类号： H01L23/3192 , H01L23/4334 , H01L23/492 , H01L24/01 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/32 , H01L2224/0401 , H01L2224/04042 , H01L2224/05599 , H01L2224/05644 , H01L2224/16 , H01L2224/48491 , H01L2224/73253 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01033 , H01L2924/0105 , H01L2924/01052 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/13055 , H01L2924/3512 , H01L2924/00
摘要： A semiconductor device includes a first protection film for covering a first metal wiring. A second protection film is disposed on the first protection film, which is covered with a solder layer. Even if a crack is generated in the second protection film before the solder layer is formed on the second protection film, the crack is restricted from proceeding into the first protection film.
摘要翻译：半导体器件包括用于覆盖第一金属布线的第一保护膜。第一保护膜设置在第一保护膜上，该第一保护膜被焊料层覆盖。即使在第二保护膜上形成焊料层之前，在第二保护膜中产生裂纹，限制裂纹进入第一保护膜。

8. 发明授权

US08405218B2 Semiconductor device and method of patterning resin insulation layer on substrate of the same 有权
标题翻译：树脂绝缘层的图案化半导体装置及方法
公开(公告)号：US08405218B2
公开(公告)日：2013-03-26
申请号：US12887874
申请日：2010-09-22
申请人： Manabu Tomisaka , Michio Kameyama , Terukazu Fukaya , Kazuhito Katoh , Akira Tai , Kazuo Akamatsu , Yoshiko Fukuda , Yuji Fukuda , Mika Ootsuki
发明人： Manabu Tomisaka , Michio Kameyama , Terukazu Fukaya , Kazuhito Katoh , Yutaka Fukuda , Akira Tai , Kazuo Akamatsu
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76804 , H01L23/293 , H01L23/3171 , H01L23/5226 , H01L24/03 , H01L24/11 , H01L24/741 , H01L2224/02166 , H01L2224/0384 , H01L2224/0391 , H01L2224/0401 , H01L2224/05022 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/0517 , H01L2224/05171 , H01L2224/05172 , H01L2224/05572 , H01L2224/05573 , H01L2224/05582 , H01L2224/05583 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0566 , H01L2224/05669 , H01L2224/11505 , H01L2224/131 , H01L2224/16 , H01L2224/749 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/1461 , H01L2924/181 , H01L2924/00014 , H01L2924/01026 , H01L2924/01014 , H01L2924/00 , H01L2224/05552
摘要： In a method of manufacturing a semiconductor device, an electrode layer is formed on a surface of a semiconductor substrate, and a resin insulation layer is formed on the surface of the semiconductor substrate so that the electrode layer can be covered with the resin insulation layer. A tapered hole is formed in the insulation layer by using a tool bit having a rake angle of zero or a negative value. The tapered hole has an opening defined by the insulation layer, a bottom defined by the electrode layer, and a side wall connecting the opening to the bottom.
摘要翻译：在制造半导体器件的方法中，在半导体衬底的表面上形成电极层，并且在半导体衬底的表面上形成树脂绝缘层，使得可以用树脂绝缘层覆盖电极层。通过使用前角为零或负值的工具钻头，在绝缘层中形成锥形孔。锥形孔具有由绝缘层限定的开口，由电极层限定的底部和将开口连接到底部的侧壁。

9. 发明申请

US20110198733A1 SEMICONDUCTOR DEVICE AND METHOD OF PATTERNNING RESIN INSULATION LAYER ON SUBSTRATE OF THE SAME 有权
标题翻译：半导体器件及其基片上树脂绝缘层图案的方法
公开(公告)号：US20110198733A1
公开(公告)日：2011-08-18
申请号：US12887874
申请日：2010-09-22
申请人： Manabu Tomisaka , Michio Kameyama , Terukazu Fukaya , Kazuhito Katoh , Yutaka Fukuda , Akira Tai , Kazuo Akamatsu , Yoshiko Fukuda , Yuji Fukuda , Mika Ootsuki , Mayu Fukuda
发明人： Manabu Tomisaka , Michio Kameyama , Terukazu Fukaya , Kazuhito Katoh , Yutaka Fukuda , Akira Tai , Kazuo Akamatsu , Yoshiko Fukuda , Yuji Fukuda , Mika Ootsuki , Mayu Fukuda
IPC分类号： H01L29/06 , H01L21/66
CPC分类号： H01L21/76804 , H01L23/293 , H01L23/3171 , H01L23/5226 , H01L24/03 , H01L24/11 , H01L24/741 , H01L2224/02166 , H01L2224/0384 , H01L2224/0391 , H01L2224/0401 , H01L2224/05022 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/0517 , H01L2224/05171 , H01L2224/05172 , H01L2224/05572 , H01L2224/05573 , H01L2224/05582 , H01L2224/05583 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0566 , H01L2224/05669 , H01L2224/11505 , H01L2224/131 , H01L2224/16 , H01L2224/749 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/1461 , H01L2924/181 , H01L2924/00014 , H01L2924/01026 , H01L2924/01014 , H01L2924/00 , H01L2224/05552
摘要： In a method of manufacturing a semiconductor device, an electrode layer is formed on a surface of a semiconductor substrate, and a resin insulation layer is formed on the surface of the semiconductor substrate so that the electrode layer can be covered with the resin insulation layer. A tapered hole is formed in the insulation layer by using a tool bit having a rake angle of zero or a negative value. The tapered hole has an opening defined by the insulation layer, a bottom defined by the electrode layer, and a side wall connecting the opening to the bottom.
摘要翻译：在制造半导体器件的方法中，在半导体衬底的表面上形成电极层，并且在半导体衬底的表面上形成树脂绝缘层，使得可以用树脂绝缘层覆盖电极层。通过使用前角为零或负值的工具钻头，在绝缘层中形成锥形孔。锥形孔具有由绝缘层限定的开口，由电极层限定的底部和将开口连接到底部的侧壁。

10. 发明授权

US06650017B1 Electrical wiring of semiconductor device enabling increase in electromigration (EM) lifetime 有权
标题翻译：半导体器件的电气布线能够增加电迁移（EM）寿命
公开(公告)号：US06650017B1
公开(公告)日：2003-11-18
申请号：US09637066
申请日：2000-08-11
申请人： Kazuo Akamatsu , Yoshihiko Isobe , Hiroyuki Yamane
发明人： Kazuo Akamatsu , Yoshihiko Isobe , Hiroyuki Yamane
IPC分类号： H01L2348
CPC分类号： H01L21/7685 , H01L21/28518 , H01L21/2855 , H01L21/32051 , H01L21/76886 , H01L23/485 , H01L23/5226 , H01L23/53223 , H01L2924/0002 , H01L2924/00
摘要： A method for manufacturing a semiconductor device having on a silicon substrate semiconductor elements and aluminum (Al) alloy wiring leads as electrically connected thereto is disclosed. The method includes the steps of forming on the silicon substrate an Al alloy layer containing therein copper (Cu), and forming on the Al alloy layer a titanium nitride (TiN) film with enhanced chemical reactivity by using sputtering techniques while applying thereto a DC power of 5.5 W/cm2 or less. Fabrication of such reactivity-rich TiN film on the Al alloy layer results in a reaction layer of Al and Ti being subdivided into several spaced-apart segments. In this case, the reaction layer hardly serves as any diffusion path; thus, it becomes possible to prevent Cu as contained in the Al alloy layer from attempting to outdiffuse with the reaction layer being as its diffusion path. This makes it possible to suppress or minimize unwanted fabrication of AlN on or above the surface of an Al containing lead pattern, thereby enabling increase in electromigration (EM) lifetime of electrical interconnect leads used.
摘要翻译：公开了一种制造半导体器件的方法，该半导体器件具有硅衬底半导体元件和与其电连接的铝（Al）合金布线引线。该方法包括以下步骤：在硅衬底上形成含有铜（Cu）的Al合金层，并且通过使用溅射技术在Al合金层上形成具有增强的化学反应性的氮化钛（TiN）膜，同时施加直流电力为5.5W / cm 2以下。在Al合金层上制备这种富含反应性的TiN膜导致Al和Ti的反应层被细分成几个间隔开的段。在这种情况下，反应层几乎不作为任何扩散路径; 因此，可以防止Al合金层中所含的Cu作为其扩散路径而反向扩散。这使得可以抑制或最小化在含铝的引线图案的表面上或上方的AlN的不希望的制造，从而能够增加使用的电互连引线的电迁移（EM）寿命。

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