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1. 发明授权

US06974650B2 Method of correcting a mask layout 有权
标题翻译：校正掩模布局的方法
公开(公告)号：US06974650B2
公开(公告)日：2005-12-13
申请号：US10063779
申请日：2002-05-12
申请人： Kay Ming Lee , Cheng-Wen Fan , Jiunn-Ren Hwang , Chih-Chiang Liu
发明人： Kay Ming Lee , Cheng-Wen Fan , Jiunn-Ren Hwang , Chih-Chiang Liu
IPC分类号： G03F1/00 , G03F1/36 , G03F9/00
CPC分类号： G03F1/36
摘要： A method of correcting a mask layout is provided. The mask layout includes a plurality of element patterns. An inspection program is executed to classify the element patterns of the mask layout into a plurality of element pattern types according to a pattern density of the element patterns. Following this, each of the element pattern types is corrected so as to prevent a plasma micro-loading effect.
摘要翻译：提供了一种校正掩模布局的方法。掩模布局包括多个元素图案。执行检查程序，以根据元件图案的图案密度将掩模布局的元素图案分类为多个元素图案类型。此后，校正每个元件图案类型以防止等离子体微负载效应。

2. 发明申请

US20070282544A1 DATA ANALYSIS METHOD FOR INTEGRATED CIRCUIT PROCESS AND SEMICONDUCTOR PROCESS 有权
标题翻译：用于集成电路过程和半导体工艺的数据分析方法
公开(公告)号：US20070282544A1
公开(公告)日：2007-12-06
申请号：US11308986
申请日：2006-06-02
申请人： Guohai ZHANG , Kay-Ming Lee , Lu-Ying Du , Jui-Chun Kuo
发明人： Guohai ZHANG , Kay-Ming Lee , Lu-Ying Du , Jui-Chun Kuo
IPC分类号： G06F19/00
CPC分类号： G05B19/41875 , G05B23/0294 , G05B2219/32222 , Y02P90/22
摘要： A data analysis method for an integrated circuit process is described, for analyzing the results of at least an in-line quality test, a product test and a yield test done to the products of the IC process. The products are divided into a normal group and an abnormal group based on the result of the in-line quality test, and are divided into a qualified group and an unqualified group based on the result of the yield test. A categorization step is performed to define the intersection of the unqualified group and the normal group as a first problematic group and to define the intersection of the unqualified group and the abnormal group as a second problematic group. By analyzing one or both of the two problematic groups, the major yield killer can be identified so that process modification can be made accordingly to improve the yield.
摘要翻译：描述了用于集成电路过程的数据分析方法，用于分析至少对IC工艺的产品进行的在线质量测试，产品测试和产量测试的结果。基于在线质量检验的结果将产品分为正常组和异常组，根据产量测试结果分为合格组和不合格组。执行分类步骤，将不合格组和正常组的交集定义为第一个有问题的组，并将不合格组与异常组的交集定义为第二个有问题的组。通过分析两个问题组中的一个或两个，可以确定主要的产量杀手，从而可以相应地进行过程修改以提高产量。

3. 发明授权

US07386420B2 Data analysis method for integrated circuit process and semiconductor process 有权
标题翻译：集成电路工艺和半导体工艺数据分析方法
公开(公告)号：US07386420B2
公开(公告)日：2008-06-10
申请号：US11308986
申请日：2006-06-02
申请人： Guohai Zhang , Kay-Ming Lee , Lu-Ying Du , Jui-Chun Kuo
发明人： Guohai Zhang , Kay-Ming Lee , Lu-Ying Du , Jui-Chun Kuo
IPC分类号： G06F19/00
CPC分类号： G05B19/41875 , G05B23/0294 , G05B2219/32222 , Y02P90/22
摘要： A data analysis method for an integrated circuit process is described, for analyzing the results of at least an in-line quality test, a product test and a yield test done to the products of the IC process. The products are divided into a normal group and an abnormal group based on the result of the in-line quality test, and are divided into a qualified group and an unqualified group based on the result of the yield test. A categorization step is performed to define the intersection of the unqualified group and the normal group as a first problematic group and to define the intersection of the unqualified group and the abnormal group as a second problematic group. By analyzing one or both of the two problematic groups, the major yield killer can be identified so that process modification can be made accordingly to improve the yield.
摘要翻译：描述了用于集成电路过程的数据分析方法，用于分析至少对IC工艺的产品进行的在线质量测试，产品测试和产量测试的结果。基于在线质量检验的结果将产品分为正常组和异常组，根据产量测试结果分为合格组和不合格组。执行分类步骤，将不合格组和正常组的交集定义为第一个有问题的组，并将不合格组与异常组的交集定义为第二个有问题的组。通过分析两个问题组中的一个或两个，可以确定主要的产量杀手，从而可以相应地进行过程修改以提高产量。

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