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1. 发明授权

US06974650B2 Method of correcting a mask layout 有权
标题翻译：校正掩模布局的方法
公开(公告)号：US06974650B2
公开(公告)日：2005-12-13
申请号：US10063779
申请日：2002-05-12
申请人： Kay Ming Lee , Cheng-Wen Fan , Jiunn-Ren Hwang , Chih-Chiang Liu
发明人： Kay Ming Lee , Cheng-Wen Fan , Jiunn-Ren Hwang , Chih-Chiang Liu
IPC分类号： G03F1/00 , G03F1/36 , G03F9/00
CPC分类号： G03F1/36
摘要： A method of correcting a mask layout is provided. The mask layout includes a plurality of element patterns. An inspection program is executed to classify the element patterns of the mask layout into a plurality of element pattern types according to a pattern density of the element patterns. Following this, each of the element pattern types is corrected so as to prevent a plasma micro-loading effect.
摘要翻译：提供了一种校正掩模布局的方法。掩模布局包括多个元素图案。执行检查程序，以根据元件图案的图案密度将掩模布局的元素图案分类为多个元素图案类型。此后，校正每个元件图案类型以防止等离子体微负载效应。

2. 发明授权

US07714604B2 System and method for testing an operating condition of LEDs on a motherboard 失效
标题翻译：用于测试主板上LED的工作状态的系统和方法
公开(公告)号：US07714604B2
公开(公告)日：2010-05-11
申请号：US12169638
申请日：2008-07-09
申请人： Chih-Chiang Liu , Wei-Yuan Chen
发明人： Chih-Chiang Liu , Wei-Yuan Chen
IPC分类号： G01R31/26 , G01R31/00
CPC分类号： G01R31/2635 , G01R31/27
摘要： A computer-implemented method for testing an operating condition of light emitting diodes (LEDs) on a motherboard includes assigning an LED identification for each LED according to positions of the LEDs on the motherboard, selecting a first LED identification for a first LED and a second LED identification for a second LED, setting the first LED in a bright state, the second LED in a dim state, and any remaining LEDs in a flicker state, and controlling the LEDs to operate. The method further includes determining whether the total count of the LEDs in the bright state is equal to one, and whether the total count of the LEDs in the dim state is equal to one, comparing the first LED identification input with the first LED identification, and comparing the second LED identification input with the LED identification, and reporting a comparison result.
摘要翻译：用于测试主板上的发光二极管（LED）的操作状态的计算机实现的方法包括根据主板上的LED的位置为每个LED分配LED标识，为第一LED选择第一LED标识和第二LED标识第二个LED的LED识别，将第一个LED置于亮状态，第二个LED处于昏暗状态，任何剩余的LED处于闪烁状态，并控制LED的工作。该方法还包括确定亮状态中的LED的总计数是否等于1，以及在暗状态下的LED的总计数是否等于1，将第一LED识别输入与第一LED标识进行比较，并将第二LED识别输入与LED识别进行比较，并报告比较结果。

3. 发明申请

US20050067720A1 Method of forming an encapsulation layer on a back side of a wafer 审中-公开
标题翻译：在晶片背面形成封装层的方法
公开(公告)号：US20050067720A1
公开(公告)日：2005-03-31
申请号：US10949212
申请日：2004-09-27
申请人： Yu-Pen Tsai , Chih-Chiang Liu , Wei-Min Hsiao
发明人： Yu-Pen Tsai , Chih-Chiang Liu , Wei-Min Hsiao
IPC分类号： H01L21/00 , H01L21/44 , H01L21/56 , H01L23/31
CPC分类号： H01L21/565 , H01L23/3157 , H01L2924/0002 , H01L2924/00
摘要： A manufacturing method of forming an encapsulation layer on a back surface of a wafer mainly comprises the following steps. Firstly, there is provided a wafer having an active surface and a back surface, wherein the active surface has a plurality of bumps formed thereon. Next, an encapsulation is provided on the back surface of the wafer and a mold is provided to have a mold surface of the mold disposed over the back surface. Afterwards, the mold surface is heated and moved to press the encapsulation simultaneously so as to have the encapsulation entirely distributed over the back surface of the wafer to form the encapsulation layer, with a flat surface, covering the back surface of the wafer.
摘要翻译：在晶片的背面形成封装层的制造方法主要包括以下步骤。首先，提供具有活性表面和背面的晶片，其中活性表面上形成有多个凸点。接下来，在晶片的背面设置封装，并且设置模具以使模具的模具表面设置在背面上。之后，模具表面被加热并移动以同时挤压封装，使得封装完全分布在晶片的背面上，以形成覆盖晶片背表面的平坦表面的封装层。

4. 发明授权

US5962906A Structure of a color sensor of a diode 失效
标题翻译：二极管颜色传感器的结构
公开(公告)号：US5962906A
公开(公告)日：1999-10-05
申请号：US74368
申请日：1998-05-08
申请人： Chih-Chiang Liu
发明人： Chih-Chiang Liu
IPC分类号： G02B5/20 , H01L27/14 , H01L27/146 , H04N5/335 , H04N5/369 , H04N5/374 , H01L29/34
CPC分类号： H01L27/14645
摘要： A structure color sensor of a diode includes following: Firstly, a color sensor layer including a number of color sensor areas is formed on a substrate for absorbing and sensing the different color light. Then, a black matrix film covered by a transparent planarization film is on the color sensor layer by using dispersed pigment method and is placed on the interfaces between color sensor areas to reduce the interference effects between monochromatic lights. Then, a color filter including at least a red filter, a green filter, and a blue filter is on this transparent planarization film. And then, a cover film is formed on the color filter for protection.
摘要翻译：二极管的结构颜色传感器包括：首先，在用于吸收和感测不同颜色的光的基板上形成包括多个颜色传感器区域的颜色传感器层。然后，通过使用分散颜料法在透明平坦化膜上覆盖的黑矩阵膜在颜色传感器层上，并且放置在颜色传感器区域之间的界面上，以减少单色光之间的干涉效应。然后，在该透明平坦化膜上至少包括红色滤光器，绿色滤光片和蓝色滤色器的滤色器。然后，在滤色器上形成覆盖膜以进行保护。

5. 发明授权

US6117798A Method of spin-on-glass planarization 有权
标题翻译：旋涂玻璃平面化方法
公开(公告)号：US6117798A
公开(公告)日：2000-09-12
申请号：US215654
申请日：1998-12-16
申请人： Cheng-Yu Fang , Chih-Chiang Liu
发明人： Cheng-Yu Fang , Chih-Chiang Liu
IPC分类号： H01L21/3105 , H01L21/314 , H01L21/316 , H01L21/31 , H01L21/469
CPC分类号： H01L21/316 , H01L21/31055 , H01L21/31056 , H01L21/31058
摘要： A method of spin-on-glass planarization. A spin-on-glass layer is formed on a substrate. An accuflo layer with a better fluidity than the spin-on-glass material is formed on the spin-on-glass layer. The accuflo layer and the spin-on-glass layer are etched back by two etching steps with different etching rate. The accuflo layer after being etched is stripped. A dielectric layer is formed.
摘要翻译：旋涂玻璃平面化方法。在基板上形成旋涂玻璃层。在旋涂玻璃层上形成具有比旋涂玻璃材料更好的流动性的凝集层。通过不同蚀刻速率的两个蚀刻步骤对accuflo层和旋涂玻璃层进行回蚀。蚀刻后的腐蚀层剥离。形成介电层。

6. 发明授权

US5637186A Method and monitor testsite pattern for measuring critical dimension openings 失效
标题翻译：测量关键尺寸开口的方法和监测测试场地图案
公开(公告)号：US5637186A
公开(公告)日：1997-06-10
申请号：US561875
申请日：1995-11-22
申请人： Chih-Chiang Liu , Po-Wen Yen , Hsi-Hsin Hong
发明人： Chih-Chiang Liu , Po-Wen Yen , Hsi-Hsin Hong
IPC分类号： H01L23/544 , H01L21/00
CPC分类号： H01L22/34
摘要： A process and a monitor structure to measure semiconductor device dimensions, especially contact and via hole dimensions, and proximity effects. The monitor has structures and layers which match the thickness and configuration of the product devices and allow measurement of step heights and proximity measurements. The monitor pattern includes an alignment region for use with automeasurement equipment. Measurements of openings are performed on the monitor at various points during the fabrication process.
摘要翻译：测量半导体器件尺寸，特别是接触孔和通孔尺寸以及邻近效应的工艺和监测结构。显示器具有与产品设备的厚度和配置匹配的结构和层，并允许测量台阶高度和接近度测量。监视器图案包括用于与自动测量设备一起使用的对准区域。在制造过程中在各个点处对显示器进行开口的测量。

7. 发明申请

US20090113603A1 Socks with cushion pad 审中-公开
标题翻译：袜子与缓冲垫
公开(公告)号：US20090113603A1
公开(公告)日：2009-05-07
申请号：US12219339
申请日：2008-07-21
申请人： Chih-Chiang Liu
发明人： Chih-Chiang Liu
IPC分类号： A43B17/00 , A41D27/26
CPC分类号： A41B11/007
摘要： A sock includes a cushion pad connected to an outside of the sock and the cushion pad includes chambers which have pressurized air filled therein. The cushion pad is made by flexible material and the chambers are in communication with each other or partially in communication with each other.
摘要翻译：袜子包括连接到袜子外部的缓冲垫，并且缓冲垫包括其中填充有加压空气的腔室。缓冲垫由柔性材料制成，并且室彼此连通或部分地彼此连通。

8. 发明申请

US20060271672A1 SYSTEM AND METHOD FOR LOADING VARIOUS OPERATING SYSTEMS FROM A REMOTE CONSOLE 审中-公开
标题翻译：从远程控制台装载各种操作系统的系统和方法
公开(公告)号：US20060271672A1
公开(公告)日：2006-11-30
申请号：US11308529
申请日：2006-04-03
申请人： Chih-Chiang Liu , Wei-Yuan Chen , Li-Ying Chang , Shin-Hui Chen
发明人： Chih-Chiang Liu , Wei-Yuan Chen , Li-Ying Chang , Shin-Hui Chen
IPC分类号： G06F15/173
CPC分类号： H04L67/34 , G06F9/4416
摘要： A system for loading various operating systems includes a remote console (1) and multiple clients (3). The remote console includes a client controlling module (10) for checking connection statuses between the remote console and the clients, and for determining whether the already connected clients can receive orders from the remote console, and for selecting object clients from the clients that can receive orders; a code setting module (11) for selecting operating systems to be loaded in the object clients, and setting codes of disk partition sections in the object clients respectively; and an order sending module (12) for sending orders and the codes. Each client includes a receiving module (30) for receiving the orders and the codes, and executing the orders; and an amending module (32) for amending disk partition tables to configure the disk partition sections as boot sections according to the codes. A related method is also disclosed.
摘要翻译：用于加载各种操作系统的系统包括远程控制台（1）和多个客户机（3）。远程控制台包括用于检查远程控制台和客户端之间的连接状态的客户端控制模块（10），以及用于确定已连接的客户端是否可以从远程控制台接收订单，以及从可以接收的客户机中选择对象客户端命令; 代码设置模块（11），用于选择要加载到对象客户端中的操作系统，以及分别在对象客户端中设置磁盘分区部分的代码; 以及用于发送订单和代码的订单发送模块（12）。每个客户端包括用于接收订单和代码并执行订单的接收模块（30）以及修改模块（32），用于修改磁盘分区表，以根据代码将磁盘分区部分配置为引导部分。还公开了相关方法。

9. 发明授权

US08294498B2 Clock de-skewing delay locked loop circuit 有权
标题翻译：时钟去偏移延迟锁定环路
公开(公告)号：US08294498B2
公开(公告)日：2012-10-23
申请号：US13158697
申请日：2011-06-13
申请人： Jinn-Shyan Wang , Chun-Yuan Cheng , Chih-Chiang Liu
发明人： Jinn-Shyan Wang , Chun-Yuan Cheng , Chih-Chiang Liu
IPC分类号： H03L7/06
CPC分类号： H03L7/0814
摘要： A clock de-skewing delay locked loop circuit is revealed. In the clock de-skewing delay locked loop circuit, a timing control circuit generates a first and a second clock signals according to an external and an internal clock signal. A clock delay line delays the first clock signal or the external clock signal to generate delay signals. A delay mirror circuit synchronizes the internal clock signal with the external clock signal. A phase adjustment circuit inverts the internal clock signal according to the phase difference. An inverting buffer circuit buffers the external clock signal or the first clock signal for adding an initial delay time so as to make a duty cycle of internal clock signal and of the external clock signal complement each other. Thus the duty cycle of the external clock signal in the proposed circuit is not necessarily 50%.
摘要翻译：揭示了时钟去偏移延迟锁相环电路。在时钟去偏移延迟锁定环电路中，定时控制电路根据外部和内部时钟信号产生第一和第二时钟信号。时钟延迟线延迟第一时钟信号或外部时钟信号以产生延迟信号。延迟镜电路将内部时钟信号与外部时钟信号同步。相位调整电路根据相位差反转内部时钟信号。反相缓冲电路缓冲外部时钟信号或第一时钟信号以增加初始延迟时间，以使内部时钟信号和外部时钟信号的占空比相互补充。因此，所提出的电路中的外部时钟信号的占空比不一定是50％。

10. 发明申请

US20060192284A1 Method of forming an encapsulation layer on a back side of a wafer 审中-公开
标题翻译：在晶片背面形成封装层的方法
公开(公告)号：US20060192284A1
公开(公告)日：2006-08-31
申请号：US11414215
申请日：2006-05-01
申请人： Yu-Pen Tsai , Chih-Chiang Liu , Wei-Min Hsiao
发明人： Yu-Pen Tsai , Chih-Chiang Liu , Wei-Min Hsiao
IPC分类号： H01L23/28 , H01L21/78
CPC分类号： H01L21/565 , H01L23/3157 , H01L2924/0002 , H01L2924/00
摘要： A manufacturing method of forming an encapsulation layer on a back surface of a wafer, the method comprising the steps of: providing the wafer having the back surface and an active surface opposing to the back surface; providing an encapsulation disposed only on the back surface of the wafer, and not disposing the encapsulation over the active surface of the wafer; providing a mold having a mold surface disposed over the encapsulation; heating the mold and moving the mold surface to press the encapsulation simultaneously so as to have the encapsulation distributed over the back surface of the wafer to form the encapsulation layer on the back surface of the wafer; and singulating the wafer into a plurality of chips, wherein the encapsulation layer is formed on a back surface of each chip, and is not formed on a side surface of each chip.
摘要翻译：一种在晶片的背面上形成封装层的制造方法，该方法包括以下步骤：提供具有背面和与背面相对的有效面的晶片; 提供仅在晶片的背面设置的封装，并且不将该封装设置在晶片的有效表面上; 提供具有设置在所述封装之上的模具表面的模具; 加热模具并移动模具表面以同时挤压封装，以使封装分布在晶片的背面上，以在晶片的背面形成封装层; 以及将所述晶片分离成多个芯片，其中所述封装层形成在每个芯片的背面上，并且不形成在每个芯片的侧表面上。

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