会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US07214973B2
    • 2007-05-08
    • US11070229
    • 2005-03-03
    • Makoto MiuraKatsuyoshi WashioHiromi Shimamoto
    • Makoto MiuraKatsuyoshi WashioHiromi Shimamoto
    • H01L31/0328H01L31/0336H01L31/072H01L31/109
    • H01L29/7378H01L29/0821H01L29/66242
    • A bipolar type semiconductor device capable of attaining high current gain and high cut-off frequency and performing a satisfactory transistor operation also in a high current region while maintaining a high breakdown voltage performance, as well as a method of manufacturing the semiconductor device, are provided. In a collector comprising a first semiconductor layer and a second semiconductor layer narrower in band gap than the first semiconductor layer, an impurity is doped so as to have a peak of impurity concentration within the second collector layer and so that the value of the peak is higher than the impurity concentration at any position within the first collector layer. It is preferable to adjust the concentration of the doped impurity in such a manner that a collector-base depletion layer extends up to the first collector layer.
    • 提供一种能够在保持高的击穿电压性能的同时在高电流区域中获得高电流增益和高截止频率并执行令人满意的晶体管操作的双极型半导体器件,以及制造半导体器件的方法 。 在包含比第一半导体层窄的带隙的第一半导体层和第二半导体层的集电体中,掺杂杂质以使第二集电极层内的杂质浓度的峰值为峰值, 高于第一收集层内任何位置的杂质浓度。 优选以使得集电极 - 基极耗尽层向上延伸到第一集电极层的方式调节掺杂杂质的浓度。
    • 4. 发明申请
    • Semiconductor device and manufacturing method of the same
    • 半导体器件及其制造方法相同
    • US20070045664A1
    • 2007-03-01
    • US11485287
    • 2006-07-13
    • Markoto MiuraKatsuyoshi WashioHiromi Shimamoto
    • Markoto MiuraKatsuyoshi WashioHiromi Shimamoto
    • H01L31/00
    • H01L29/7378Y10S438/936
    • A semiconductor device capable of avoiding generation of a barrier in a conduction band while maintaining high withstanding voltage and enabling high speed transistor operation at high current in a double hetero bipolar transistor, as well as a manufacturing method thereof, wherein a portion of the base and the collector is formed of a material with a forbidden band width narrower than that of a semiconductor substrate, a region where the forbidden band increases stepwise and continuously from the emitter side to the collector side is disposed in the inside of the base and the forbidden band width at the base-collector interface is designed so as to be larger than the minimum forbidden band width in the base, whereby the forbidden band width at the base layer edge on the collector side can be made closer to the forbidden band width of the semiconductor substrate than usual while sufficiently maintaining the hetero effect near the emitter-base thereby capable of decreasing the height of the energy barrier generated upon increase of the collector current and enabling satisfactory transistor operation at high current.
    • 一种半导体器件及其制造方法,其能够在保持高耐受电压的同时避免在导带中产生阻挡层并能够在高电流下进行高速晶体管的操作,以及其制造方法,其中, 集电体由禁带宽度窄于半导体衬底的材料形成,禁带从发射极侧向集电极侧逐步且连续地增加的区域设置在基体的内部,禁带 在基极集电体界面的宽度被设计为大于基极中的最小禁带宽度,由此集电极侧的基底边缘处的禁带宽度可以更接近半导体的禁带宽度 衬底,同时充分保持发射极基极附近的杂质效应,从而能够降低高度 在集电极电流增加时产生能量势垒,并且能够在高电流下令人满意的晶体管工作。