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1. 发明授权

US07767055B2 Capacitive coupling plasma processing apparatus 有权
标题翻译：电容耦合等离子体处理装置
公开(公告)号：US07767055B2
公开(公告)日：2010-08-03
申请号：US11292353
申请日：2005-12-02
申请人： Shinji Himori , Noriaki Imai , Katsumi Horiguchi , Takaaki Nezu , Shoichiro Matsuyama , Hiroki Matsumaru , Toshihiro Hayami , Kazuya Nagaseki , Itsuko Sakai , Tokuhisa Ohiwa , Yoshikazu Sugiyasu
发明人： Shinji Himori , Noriaki Imai , Katsumi Horiguchi , Takaaki Nezu , Shoichiro Matsuyama , Hiroki Matsumaru , Toshihiro Hayami , Kazuya Nagaseki , Itsuko Sakai , Tokuhisa Ohiwa , Yoshikazu Sugiyasu
IPC分类号： C23F1/00 , H01L21/306 , C23C16/00
CPC分类号： H01J37/32697 , H01J37/32082
摘要： A capacitive coupling plasma processing apparatus includes a process chamber configured to have a vacuum atmosphere, and a process gas supply section configured to supply a process gas into the chamber. In the chamber, a first electrode and a second electrode are disposed opposite each other. An RF power supply is disposed to supply an RF power to the first or second electrode to form an RF electric field within a plasma generation region between the first and second electrodes, so as to turn the process gas into plasma. The target substrate is supported by a support member between the first and second electrodes such that a process target surface thereof faces the second electrode. A conductive functional surface is disposed in a surrounding region around the plasma generation region and grounded to be coupled with the plasma in a sense of DC to expand the plasma.
摘要翻译：电容耦合等离子体处理装置包括被配置为具有真空气氛的处理室和被配置为将处理气体供应到室中的处理气体供给部。在腔室中，第一电极和第二电极相对设置。设置RF电源以向第一或第二电极提供RF功率，以在第一和第二电极之间的等离子体产生区域内形成RF电场，以将处理气体转化为等离子体。目标基板由第一和第二电极之间的支撑构件支撑，使得其工艺目标表面面向第二电极。导电功能表面设置在等离子体产生区域周围的周围区域中，并且被接地以与DC等离子体耦合以扩展等离子体。

2. 发明授权

US07416676B2 Plasma etching method and apparatus, control program for performing the etching method, and storage medium storing the control program 有权
标题翻译：等离子体蚀刻方法和装置，用于执行蚀刻方法的控制程序和存储控制程序的存储介质
公开(公告)号：US07416676B2
公开(公告)日：2008-08-26
申请号：US11354042
申请日：2006-02-15
申请人： Jin Fujihara , Katsumi Horiguchi
发明人： Jin Fujihara , Katsumi Horiguchi
IPC分类号： B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00
CPC分类号： H01L21/3083 , H01L21/3065 , H01L21/31116 , H01L21/67069
摘要： A plasma etching method for etching an etching target layer of a silicon layer through a mask of a silicon oxide film includes the following sequential steps of forming an opening in the silicon oxide film, wherein an opening dimension of a portion between a top and a bottom surface of the mask is enlarged compared to opening dimensions of the top and the bottom surface of the mask and etching the silicon layer by using a halogen containing gas. A gaseous mixture containing HBr gas, NF3 gas and O2 gas is used as the halogen containing gas. A hole or a trench having an opening diameter or an opening width equal to or smaller than 0.2 μm is formed in the etching target layer. Further, a hole or a trench having an aspect ratio equal to or greater than forty is formed in the etching target layer.
摘要翻译：用于通过氧化硅膜的掩模蚀刻硅层的蚀刻目标层的等离子体蚀刻方法包括在氧化硅膜中形成开口的以下顺序步骤，其中顶部和底部之间的部分的开口尺寸掩模的表面与掩模的顶表面和底表面的开口尺寸相比被扩大，并且通过使用含卤素气体来蚀刻硅层。使用含有HBr气体，NF 3气体和O 2气体的气体混合物作为含卤素气体。在蚀刻目标层中形成具有等于或小于0.2μm的开口直径或开口宽度的孔或沟槽。此外，在蚀刻目标层中形成具有等于或大于40的纵横比的孔或沟槽。

3. 发明授权

US07678225B2 Focus ring for semiconductor treatment and plasma treatment device 失效
标题翻译：半导体处理和等离子体处理装置的聚焦环
公开(公告)号：US07678225B2
公开(公告)日：2010-03-16
申请号：US10468108
申请日：2002-02-08
申请人： Takaaki Nezu , Katsumi Horiguchi , Daisuke Hayashi , Toshiya Tsukahara
发明人： Takaaki Nezu , Katsumi Horiguchi , Daisuke Hayashi , Toshiya Tsukahara
IPC分类号： H01L21/306 , C23C16/00
CPC分类号： H01J37/32642 , H01J37/32623
摘要： A focus ring for a plasma processing apparatus has an inner region, middle region, and outer region, disposed in this order from the inner side to surround a target substrate. On the side to be exposed to plasma, the surfaces of the inner region and outer region consist essentially of a dielectric, while the surface of the middle region consists essentially of a conductor. The middle region is arranged to shift the peak of plasma density to the outside of the peripheral edge of the target substrate. If there is no middle region, the peak of plasma density appears substantially directly above the peripheral edge of the target substrate.
摘要翻译：用于等离子体处理装置的聚焦环具有内部区域，中间区域和外部区域，其从内侧依次设置成围绕目标基板。在暴露于等离子体的一侧，内部区域和外部区域的表面基本上由电介质构成，而中间区域的表面基本上由导体组成。中间区域被设置为将等离子体密度的峰值移动到目标衬底的周边边缘的外部。如果不存在中间区域，则等离子体密度的峰值基本上直接出现在目标衬底的外围边缘上方。

4. 发明申请

US20080261406A1 ETCHING METHOD AND SEMICONDUCTOR DEVICE FABRICATION METHOD 审中-公开
标题翻译：蚀刻方法和半导体器件制造方法
公开(公告)号：US20080261406A1
公开(公告)日：2008-10-23
申请号：US11861469
申请日：2007-09-26
申请人： Etsuo IIJIMA , Katsumi Horiguchi
发明人： Etsuo IIJIMA , Katsumi Horiguchi
IPC分类号： H01L21/302
CPC分类号： H01L21/32137 , H01J37/32192
摘要： An etching method capable of increasing the selectivity of a polysilicon film to a silicon oxide film and suppressing recess formation on a silicon base layer. That part of the polysilicon film of a wafer transferred into a processing vessel which is exposed through an opening is etched so as to slightly remain on a gate oxide film. The pressure in a processing space is set to 66.7 Pa, HBr gas and He gas are supplied to the processing space, and a microwave of 2.45 GHz is supplied to a radial line slot antenna. The polysilicon film is etched by plasma generated from the HBr gas so as to be completely removed, the exposed gate oxide film is etched, and a resist film and an anti-reflection film are etched.
摘要翻译：一种蚀刻方法，其能够增加多晶硅膜对氧化硅膜的选择性并抑制硅基层上的凹陷形成。转移到通过开口暴露的处理容器中的晶片的多晶硅膜的那部分被蚀刻，以便稍微保留在栅极氧化物膜上。处理空间中的压力设定为66.7Pa，将HBr气体和He气供给到处理空间，向径向线槽天线供给2.45GHz的微波。通过从HBr气体产生的等离子体来蚀刻多晶硅膜，以便完全去除，暴露的栅极氧化膜被蚀刻，并且蚀刻抗蚀剂膜和抗反射膜。

5. 发明申请

US20060118044A1 Capacitive coupling plasma processing apparatus 有权
标题翻译：电容耦合等离子体处理装置
公开(公告)号：US20060118044A1
公开(公告)日：2006-06-08
申请号：US11292353
申请日：2005-12-02
申请人： Shinji Himori , Noriaki Imai , Katsumi Horiguchi , Takaaki Nezu , Shoichiro Matsuyama , Hiroki Matsumaru , Toshihiro Hayami , Kazuya Nagaseki , Itsuko Sakai , Tokuhisa Ohiwa , Yoshikazu Sugiyasu
发明人： Shinji Himori , Noriaki Imai , Katsumi Horiguchi , Takaaki Nezu , Shoichiro Matsuyama , Hiroki Matsumaru , Toshihiro Hayami , Kazuya Nagaseki , Itsuko Sakai , Tokuhisa Ohiwa , Yoshikazu Sugiyasu
IPC分类号： C23F1/00 , C23C16/00
CPC分类号： H01J37/32697 , H01J37/32082
摘要： A capacitive coupling plasma processing apparatus includes a process chamber configured to have a vacuum atmosphere, and a process gas supply section configured to supply a process gas into the chamber. In the chamber, a first electrode and a second electrode are disposed opposite each other. An RF power supply is disposed to supply an RF power to the first or second electrode to form an RF electric field within a plasma generation region between the first and second electrodes, so as to turn the process gas into plasma. The target substrate is supported by a support member between the first and second electrodes such that a process target surface thereof faces the second electrode. A conductive functional surface is disposed in a surrounding region around the plasma generation region and grounded to be coupled with the plasma in a sense of DC to expand the plasma.
摘要翻译：电容耦合等离子体处理装置包括被配置为具有真空气氛的处理室和被配置为将处理气体供应到室中的处理气体供给部。在腔室中，第一电极和第二电极相对设置。设置RF电源以向第一或第二电极提供RF功率，以在第一和第二电极之间的等离子体产生区域内形成RF电场，以将处理气体转化为等离子体。目标基板由第一和第二电极之间的支撑构件支撑，使得其工艺目标表面面向第二电极。导电功能表面设置在等离子体产生区域周围的周围区域中，并且被接地以与DC等离子体耦合以扩展等离子体。

6. 发明申请

US20060180571A1 Plasma etching method and apparatus, control program for performing the etching method, and storage medium storing the control program 有权
标题翻译：等离子体蚀刻方法和装置，用于执行蚀刻方法的控制程序和存储控制程序的存储介质
公开(公告)号：US20060180571A1
公开(公告)日：2006-08-17
申请号：US11354042
申请日：2006-02-15
申请人： Jin Fujihara , Katsumi Horiguchi
发明人： Jin Fujihara , Katsumi Horiguchi
IPC分类号： C23F1/00 , H01L21/302 , H01L21/306 , B44C1/22 , C03C25/68
CPC分类号： H01L21/3083 , H01L21/3065 , H01L21/31116 , H01L21/67069
摘要： A plasma etching method for etching an etching target layer of a silicon layer through a mask of a silicon oxide film includes the following sequential steps of forming an opening in the silicon oxide film, wherein an opening dimension of a portion between a top and a bottom surface of the mask is enlarged compared to opening dimensions of the top and the bottom surface of the mask and etching the silicon layer by using a halogen containing gas. A gaseous mixture containing HBr gas, NF3 gas and O2 gas is used as the halogen containing gas. A hole or a trench having an opening diameter or an opening width equal to or smaller than 0.2 μm is formed in the etching target layer. Further, a hole or a trench having an aspect ratio equal to or greater than forty is formed in the etching target layer.
摘要翻译：用于通过氧化硅膜的掩模蚀刻硅层的蚀刻目标层的等离子体蚀刻方法包括在氧化硅膜中形成开口的以下顺序步骤，其中顶部和底部之间的部分的开口尺寸掩模的表面与掩模的顶表面和底表面的开口尺寸相比被扩大，并且通过使用含卤素气体来蚀刻硅层。使用含有HBr气体，NF 3气体和O 2气体的气体混合物作为含卤素气体。在蚀刻目标层中形成具有等于或小于0.2μm的开口直径或开口宽度的孔或沟槽。此外，在蚀刻目标层中形成具有等于或大于40的纵横比的孔或沟槽。

7. 发明授权

US07109123B2 Silicon etching method 有权
标题翻译：硅蚀刻法
公开(公告)号：US07109123B2
公开(公告)日：2006-09-19
申请号：US10647433
申请日：2003-08-26
申请人： Takanori Mimura , Kazuya Nagaseki , Kenji Yamamoto , Katsumi Horiguchi , Yahui Huang
发明人： Takanori Mimura , Kazuya Nagaseki , Kenji Yamamoto , Katsumi Horiguchi , Yahui Huang
IPC分类号： H01L21/302
CPC分类号： H01J37/32082 , H01J37/3266 , H01J2237/334 , H01L21/3065 , H01L21/308 , H01L21/76898
摘要： A Si etching method etches a Si wafer held on a susceptor placed in a processing vessel by a plasma-assisted etching process. A mixed etching gas prepared by mixing fluorosulfur gas, such as SF6 gas, or fluorocarbon gas, O2 gas and fluorosilicon gas, such as SiF4 gas is supplied into the processing vessel. RF power of 40 MHz or above is applied to the mixed etching gas to generate a plasma. The Si wafer is etched with radicals and ions contained in the plasma.
摘要翻译： Si蚀刻方法通过等离子体辅助蚀刻工艺蚀刻保持在放置在处理容器中的基座上的Si晶片。通过混合诸如SF 6气体的氟化硫气体或碳氟化合物气体O 2气体和诸如SiF 4气体的氟硅气体制备的混合蚀刻气体，将气体供应到处理容器中。将40MHz以上的RF功率施加到混合蚀刻气体以产生等离子体。用等离子体中所含的自由基和离子蚀刻Si晶片。

8. 发明申请

US20050014372A1 Etching method and plasma etching processing apparatus 审中-公开
标题翻译：蚀刻方法和等离子体蚀刻处理装置
公开(公告)号：US20050014372A1
公开(公告)日：2005-01-20
申请号：US10875961
申请日：2004-06-25
申请人： Satoshi Shimonishi , Takanori Matsumoto , Katsumi Horiguchi , Kenji Yamamoto , Fumihiko Higuchi
发明人： Satoshi Shimonishi , Takanori Matsumoto , Katsumi Horiguchi , Kenji Yamamoto , Fumihiko Higuchi
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/308 , H01L21/461
CPC分类号： H01J37/32568 , H01L21/3065 , H01L21/3081
摘要： When etching a silicon layer 210 with a processing gas containing a mixed gas constituted of HBr gas, and O2 gas and SiF4 gas and further mixed with both of or either of SF6 gas and NF3 gas by using a pre-patterned mask having a silicon oxide film layer 204 inside an airtight processing container 102, high-frequency power with a first frequency is applied from a first high-frequency source 118 and high-frequency power with a second frequency lower than the first frequency is applied from a second high-frequency source 138 to a lower electrode 104 on which a workpiece is placed. Through this etching process, holes or grooves achieving a high aspect ratio are formed in a desirable shape at the silicon layer.
摘要翻译：当使用含有由HBr气体和O 2气体和SiF 4气体组成的混合气体的处理气体来蚀刻硅层210时，通过使用具有氧化硅的预图案化掩模进一步与SF 6气体和NF 3气体中的任一种在气密处理容器102内的薄膜层204，从第一高频源118施加具有第一频率的高频功率，并且从第二高频源施加具有低于第一频率的第二频率的高频功率源138连接到其上放置工件的下电极104。通过该蚀刻工艺，在硅层处形成期望的形状，实现高纵横比的孔或槽。

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