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    • 3. 发明申请
    • COMMUNICATION DEVICE WITH SIMULTANEOUS WIRELESS LAN AND BLUE-TOOTH COMMUNICATION CAPABILITY
    • 具有同步无线LAN和蓝牙通信能力的通信设备
    • US20130029601A1
    • 2013-01-31
    • US13559090
    • 2012-07-26
    • Ka-Un CHANYi-Shao ChangYi-Chang Shih
    • Ka-Un CHANYi-Shao ChangYi-Chang Shih
    • H04W88/02
    • H04W88/06
    • A communication device is disclosed, having a wireless LAN transceiver, a wireless LAN demodulation circuit, a Bluetooth transceiver, a Bluetooth demodulation circuit, an oscillator, and a mixer. The wireless LAN transceiver conducts communication in a first frequency band and the wireless LAN demodulation circuit demodulates the wireless LAN signals. The Bluetooth transceiver conducts communication in a second band and a third frequency band, which are higher and lower than the first frequency band, respectively. The oscillator generates oscillating signals. The mixer mixes the signals in the second frequency band with an oscillating signal, which is higher than the second frequency band, and mixes the signals in the third frequency band with another oscillating signal, which is lower than the third frequency band to generate mixed signals. The Bluetooth demodulation circuit demodulates the mixed signals of the mixer.
    • 公开了具有无线LAN收发器,无线LAN解调电路,蓝牙收发器,蓝牙解调电路,振荡器和混频器的通信设备。 无线LAN收发器在第一频带中进行通信,并且无线LAN解调电路解调无线LAN信号。 蓝牙收发器分别在比第一频带高和低的第二频带和第三频带进行通信。 振荡器产生振荡信号。 混频器将第二频带中的信号与高于第二频带的振荡信号混频,并将第三频带中的信号与低于第三频带的另一振荡信号混频以产生混合信号 。 蓝牙解调电路解调混频器的混合信号。
    • 4. 发明授权
    • Latch
    • 锁定
    • US07701258B2
    • 2010-04-20
    • US12000063
    • 2007-12-07
    • Wei-Ming ChiuKa-Un Chan
    • Wei-Ming ChiuKa-Un Chan
    • G11C7/00
    • H03K3/356139H03K3/356043
    • A latch includes: an amplifying circuit, for receiving a first bias current in a first state for amplifying an input signal to generate an amplified signal; a latching unit, for latching the amplified signal and receiving a second bias current in a second state to output the amplified signal; and a biasing circuit, for providing a biasing current to the amplifying circuit, and providing the second biasing current to the latching unit. The biasing circuit includes: a first biasing module for providing a third biasing circuit to the amplifying circuit in the first state; and a second biasing module, for providing a fourth biasing current to the amplified circuit; wherein the first biasing circuit is equal to a sum of the third biasing current and the fourth biasing current.
    • 锁存器包括:放大电路,用于接收第一状态的第一偏置电流,用于放大输入信号以产生放大信号; 锁存单元,用于锁存放大的信号并在第二状态接收第二偏置电流以输出放大的信号; 以及偏置电路,用于向放大电路提供偏置电流,并向锁存单元提供第二偏置电流。 偏置电路包括:第一偏置模块,用于在第一状态下向放大电路提供第三偏置电路; 以及第二偏置模块,用于向放大电路提供第四偏置电流; 其中所述第一偏置电路等于所述第三偏置电流和所述第四偏置电流的和。
    • 5. 发明申请
    • Latch
    • 锁定
    • US20080136482A1
    • 2008-06-12
    • US12000063
    • 2007-12-07
    • Wei-Ming ChiuKa-Un Chan
    • Wei-Ming ChiuKa-Un Chan
    • H03K3/0233
    • H03K3/356139H03K3/356043
    • A latch includes: an amplifying circuit, for receiving a first bias current in a first state for amplifying an input signal to generate an amplified signal; a latching unit, for latching the amplified signal and receiving a second bias current in a second state to output the amplified signal; and a biasing circuit, for providing a biasing current to the amplifying circuit, and providing the second biasing current to the latching unit. The biasing circuit includes: a first biasing module for providing a third biasing circuit to the amplifying circuit in the first state; and a second biasing module, for providing a fourth biasing current to the amplified circuit; wherein the first biasing circuit is equal to a sum of the third biasing current and the fourth biasing current.
    • 锁存器包括:放大电路,用于接收第一状态的第一偏置电流,用于放大输入信号以产生放大信号; 锁存单元,用于锁存放大的信号并在第二状态接收第二偏置电流以输出放大的信号; 以及偏置电路,用于向放大电路提供偏置电流,并向锁存单元提供第二偏置电流。 偏置电路包括:第一偏置模块,用于在第一状态下向放大电路提供第三偏置电路; 以及第二偏置模块,用于向放大电路提供第四偏置电流; 其中所述第一偏置电路等于所述第三偏置电流和所述第四偏置电流的和。