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1. 发明专利

JP2005045192A One-action cord bundling band for identification, indication and classification with fingertip operation 审中-公开
标题翻译：用于识别，指示和分类与手指操作的单作用线组合
公开(公告)号：JP2005045192A
公开(公告)日：2005-02-17
申请号：JP2003300593
申请日：2003-07-22
申请人： Junko Kimura , 順子木村
发明人： KIMURA JUNKO
IPC分类号： B65D63/10 , G09F3/00 , G09F3/06 , H05K7/00
摘要： PROBLEM TO BE SOLVED: To classify and indicate an electrical product for which cords are provided as accessories and further, to provide a band with which the cords can be bundled with fingertip operation.
SOLUTION: A nylon or cloth band 1 comprises an indication field 3 to indicate an identification therein. Further, (male and female) velcro (R) 2 are attached on the rear surface of the band 1 to bundle cords with fingertip operation. A snap button 4 is then added to the band 1 to reinforce the bundling strength.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：分类并指示作为附件提供电线的电气产品，并且进一步提供可以用指尖操作来捆扎电线的带。解决方案：尼龙或布带1包括指示字段3以指示其中的标识。此外，（男和女）尼龙搭扣（R）2被附接在带1的后表面上，以指尖操作束带。然后将带扣按钮4添加到带1中以增强捆扎强度。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2006138163A Method of constructing block boundary for sidewalk or the like, and boundary block hoisting tool 有权
标题翻译：用于构造边框或类似框块边界的方法和边界块装置工具
公开(公告)号：JP2006138163A
公开(公告)日：2006-06-01
申请号：JP2004330379
申请日：2004-11-15
申请人： Junko Kimura , Sanyo Concrete Kogyo Kk , Shiromoto Kogyosho:Kk , 山陽コンクリート工業株式会社 , 有限会社城本工業所 , 純子木村
发明人： SHIROMOTO YOSHIHIRO , ADACHI TOMOYUKI , KIMURA JUNKO
IPC分类号： E01C11/22 , E01C19/52
摘要： PROBLEM TO BE SOLVED: To provide a method of constructing a block boundary formed of relatively heavy boundary blocks 1, in which labor costs are suppressed.
SOLUTION: The method is implemented by providing the boundary blocks 1, linear rod members 11, and a boundary block hoisting tool 6. Each boundary block 1 has a shape linearly extending in a longitudinal direction f1, and its cross sectional area is constant at any location. The boundary block 1 has linear holes 1a, 1b formed in front and rear end faces 1c, 1d each at a location near the center of gravity in a manner extending in the longitudinal direction. Each linear rod member 11 has a specific length and inserted into each of the linear holes 1a, 1b. The boundary block hoisting tool 6 is formed of a pair of hook members 8a, 8b which are hooked on external overhanging portions 11a of the rod members 11 inserted into the linear holes 1a, 1b, respectively, a hook holding member 7 which holds the hook members 8a, 8b so as to be spaced a specific interval away from each other, and hoisting force applying portions 9a, 9b which apply hoisting force to the hook members 8a, 8b, and the hook holding member 7.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种构成由相对较重的边界块1形成的块边界的方法，其中抑制了劳动力成本。解决方案：该方法通过设置边界块1，线性杆构件11和边界块提升工具6来实现。每个边界块1具有在纵向方向f1上线性延伸的形状，其横截面积为在任何位置不变。边界块1具有在前后端面1c，1d中形成的直线孔1a，1b，每个在靠近重心的位置上以纵向方向延伸。每个线性杆构件11具有特定长度并插入到每个直线孔1a，1b中。边界块起重工具6由一对钩构件8a，8b构成，钩构件8a，8b分别钩在插入直线孔1a，1b中的杆构件11的外伸部分11a上，钩保持构件7保持钩构件8a，8b以相互隔开的特定间隔，以及将牵引力施加到钩构件8a，8b和钩保持构件7的提升力施加部分9a，9b。版权所有（ C）2006，JPO＆NCIPI

3. 发明授权

US5694173A Video data arranging method and video data encoding/decoding apparatus 失效
标题翻译：视频数据排列方法和视频数据编码/解码装置
公开(公告)号：US5694173A
公开(公告)日：1997-12-02
申请号：US366542
申请日：1994-12-29
申请人： Junko Kimura , Kenji Shimoda
发明人： Junko Kimura , Kenji Shimoda
IPC分类号： H04N7/26 , H04N7/30 , H04N7/50 , H04N7/18
CPC分类号： H04N19/00 , H04N19/60 , H04N19/61 , H04N19/13 , H04N19/70 , H04N19/91
摘要： A video data arranging method includes the steps of providing a normal bit stream region in which normal playback block codes for normal playback of prescribed picture blocks and special playback block codes for special playback of prescribed picture blocks can be arranged, and providing a extension bit stream region for arranging block codes which are not arranged in the normal bit stream region out of the normal playback block codes and the special playback block codes when there are the normal playback block codes and the special playback block codes for prescribed picture blocks, and video data encoding/decoding apparatus suited for the method.
摘要翻译：视频数据排列方法包括以下步骤：提供普通位流区域，其中可以布置用于规定图像块的正常重放的正常重放块代码和用于规定图像块的特殊重放的特殊重放块代码，并且提供扩展位流区域，用于当存在正常重放块代码和规定图像块的特殊重放块代码时，用于布置不在正常重放块代码中的普通位流区域中排列的块代码和特殊重放块代码，以及视频数据适用于该方法的编码/解码装置。

4. 发明申请

US20100072604A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100072604A1
公开(公告)日：2010-03-25
申请号：US12489714
申请日：2009-06-23
申请人： Mikihiko KOMATSU , Takao HIDAKA , Junko KIMURA
发明人： Mikihiko KOMATSU , Takao HIDAKA , Junko KIMURA
IPC分类号： H01L25/16 , H01L23/538
CPC分类号： H01L25/0657 , G06F1/26 , H01L23/3114 , H01L23/481 , H01L23/4952 , H01L23/49575 , H01L23/50 , H01L24/05 , H01L24/06 , H01L24/09 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L25/16 , H01L2223/6611 , H01L2224/02166 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/05647 , H01L2224/0603 , H01L2224/32145 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48145 , H01L2224/48247 , H01L2224/48465 , H01L2224/48624 , H01L2224/48647 , H01L2224/48724 , H01L2224/48747 , H01L2224/48824 , H01L2224/48847 , H01L2224/49111 , H01L2224/49113 , H01L2224/4917 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2224/85205 , H01L2225/06506 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/01003 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/13091 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H01L2924/30105 , H01L2924/01039 , H01L2924/00 , H01L2224/48257 , H01L2924/00012 , H01L2924/00011
摘要： To provide a technique of supplying a voltage generated in any of a plurality of semiconductor chips to the other chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package.In an example of the main technique, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires, respectively. In another example, fourth and fifth pads are disposed along a side different from a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
摘要翻译：为了提供将多个半导体芯片中的任一个中产生的电压提供给另一芯片的技术作为电源电压，以实现其中半导体芯片堆叠在同一封装中的半导体器件的稳定操作。在主要技术的示例中，两个芯片彼此堆叠，第一至第三焊盘沿相应的芯片的相应侧布置，它们彼此靠近并且平行地布置，并且这些焊盘彼此相连分别具有第一至第三金属线。在另一示例中，第四和第五焊盘沿着不同于第一至第三焊盘所设置的一侧的一侧设置，并且还通过直接在芯片之间的第四金属线彼此连接。

5. 发明授权

US07492210B2 Voltage selection circuit 有权
标题翻译：电压选择电路
公开(公告)号：US07492210B2
公开(公告)日：2009-02-17
申请号：US11614800
申请日：2006-12-21
申请人： Toshiyuki Imai , Junko Kimura
发明人： Toshiyuki Imai , Junko Kimura
IPC分类号： H03K17/00
CPC分类号： H03K17/005 , H03K17/6874 , H03K17/6877 , H03K17/693
摘要： A first switch circuit includes first and second N-type MOSFETs. A second switch circuit includes third and fourth N-type MOSFETs. A control signal is input to a first inverter and a third inverter, the output of the first inverter input to a second inverter and the gate of the fourth MOSFET, the output of the second inverter input to the gate of the first MOSFET, the output of the third inverter input to a fourth inverter and the gate of the third MOSFET, the output of the fourth inverter input to the gate of the second MOSFET. A first input voltage is connected to the source of the second MOSFET and the sources of N-type MOSFETS in the third and fourth inverters. A second input voltage is connected the source of the fourth MOSFET and the sources of N-type MOSFETS in the first and second inverters.
摘要翻译：第一开关电路包括第一和第二N型MOSFET。第二开关电路包括第三和第四N型MOSFET。控制信号输入到第一反相器和第三反相器，输入到第二反相器的第一反相器的输出和第四MOSFET的栅极，输入到第一MOSFET的栅极的第二反相器的输出，输出的第三反相器输入到第四反相器和第三MOSFET的栅极，第四反相器的输出输入到第二MOSFET的栅极。在第三和第四反相器中，第一输入电压连接到第二MOSFET的源极和N型MOSFET的源极。第二输入电压在第一和第二反相器中连接第四MOSFET的源极和N型MOSFET的源极。

6. 发明授权

US09564765B2 Semiconductor device and battery voltage monitoring device 有权
标题翻译：半导体器件和电池电压监测装置
公开(公告)号：US09564765B2
公开(公告)日：2017-02-07
申请号：US14426753
申请日：2012-09-10
申请人： Akiko Fukute , Ryosuke Enomoto , Junko Kimura , Toshitaka Ukai
发明人： Akiko Fukute , Ryosuke Enomoto , Junko Kimura , Toshitaka Ukai
IPC分类号： H02J7/00 , G01R31/36 , B60L3/00 , B60L11/18 , H01M10/48 , H04Q9/00
CPC分类号： H02J7/0042 , B60L3/0046 , B60L11/1864 , G01R31/3658 , H01M10/4207 , H01M10/482 , H01M2010/4271 , H02J7/0052 , H02J7/0063 , H04Q9/00 , H04Q2209/10 , H04Q2209/30 , H04Q2209/883 , Y02T10/7005 , Y02T10/7061 , Y02T90/16
摘要： In battery voltage monitoring ICs for measuring voltages of unit cells of an assembled battery, communication with a system control unit is realized in consideration of fail-safe. The system control unit and the battery voltage monitoring ICs are coupled to each other by a communication path using a daisy chain. Each battery voltage monitoring IC has a placement setting pin designating, by a binary code, a unit cell group to which the IC is coupled, in the unit cell groups. When it is detected that the Hamming distance between the code indicative of coupling to a group of the highest potential or a group of the lowest potential and a state actually set in the placement setting pin is 1, some failure such as line disconnection, short-circuit, or the like in the placement setting pins is detected, and the communication path is interrupted.
摘要翻译：在用于测量组电池的单电池的电压的电池电压监视IC中，考虑到故障保护来实现与系统控制单元的通信。系统控制单元和电池电压监视IC通过使用菊花链的通信路径相互耦合。每个电池电压监视IC具有通过二进制代码将单元单元组中的IC耦合到的单元组指定的放置设置引脚。当检测到指示耦合到最高电位组或最低电位组的代码和实际设置在放置设置引脚中的状态之间的汉明距离为1时，诸如线路断开，短路，检测放置设定引脚中的电路等，通信路径中断。

7. 发明申请

US20150270727A1 SEMICONDUCTOR DEVICE AND BATTERY VOLTAGE MONITORING DEVICE 有权
标题翻译：半导体器件和电池电压监测器件
公开(公告)号：US20150270727A1
公开(公告)日：2015-09-24
申请号：US14426753
申请日：2012-09-10
申请人： Akiko Fukute , Ryosuke Enomoto , Junko Kimura , Toshitaka Ukai
发明人： Akiko Fukute , Ryosuke Enomoto , Junko Kimura , Toshitaka Ukai
IPC分类号： H02J7/00
CPC分类号： H02J7/0042 , B60L3/0046 , B60L11/1864 , G01R31/3658 , H01M10/4207 , H01M10/482 , H01M2010/4271 , H02J7/0052 , H02J7/0063 , H04Q9/00 , H04Q2209/10 , H04Q2209/30 , H04Q2209/883 , Y02T10/7005 , Y02T10/7061 , Y02T90/16
摘要： In battery voltage monitoring ICs for measuring voltages of unit cells of an assembled battery, communication with a system control unit is realized in consideration of fail-safe. The system control unit and the battery voltage monitoring ICs are coupled to each other by a communication path using a daisy chain. Each battery voltage monitoring IC has a placement setting pin designating, by a binary code, a unit cell group to which the IC is coupled, in the unit cell groups. When it is detected that the Hamming distance between the code indicative of coupling to a group of the highest potential or a group of the lowest potential and a state actually set in the placement setting pin is 1, some failure such as line disconnection, short-circuit, or the like in the placement setting pins is detected, and the communication path is interrupted.
摘要翻译：在用于测量组电池的单电池的电压的电池电压监视IC中，考虑到故障保护来实现与系统控制单元的通信。系统控制单元和电池电压监视IC通过使用菊花链的通信路径相互耦合。每个电池电压监视IC具有通过二进制代码将单元单元组中的IC耦合到的单元组指定的放置设置引脚。当检测到指示耦合到最高电位组或最低电位组的代码与实际设置在放置设置引脚中的状态之间的汉明距离为1时，诸如线路断开，短路，检测放置设定引脚中的电路等，通信路径中断。

8. 发明申请

US20120146245A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120146245A1
公开(公告)日：2012-06-14
申请号：US13403038
申请日：2012-02-23
申请人： Mikihiko Komatsu , Takao Hidaka , Junko Kimura
发明人： Mikihiko Komatsu , Takao Hidaka , Junko Kimura
IPC分类号： H01L23/28
CPC分类号： H01L25/0657 , G06F1/26 , H01L23/3114 , H01L23/481 , H01L23/4952 , H01L23/49575 , H01L23/50 , H01L24/05 , H01L24/06 , H01L24/09 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L25/16 , H01L2223/6611 , H01L2224/02166 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/05647 , H01L2224/0603 , H01L2224/32145 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48145 , H01L2224/48247 , H01L2224/48465 , H01L2224/48624 , H01L2224/48647 , H01L2224/48724 , H01L2224/48747 , H01L2224/48824 , H01L2224/48847 , H01L2224/49111 , H01L2224/49113 , H01L2224/4917 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2224/85205 , H01L2225/06506 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/01003 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/13091 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H01L2924/30105 , H01L2924/01039 , H01L2924/00 , H01L2224/48257 , H01L2924/00012 , H01L2924/00011
摘要： A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires, respectively. In another example, fourth and fifth pads are disposed along a side different from a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
摘要翻译：将多个半导体芯片中的任一个产生的电压作为电源电压供给到另一芯片，以实现其中半导体芯片堆叠在相同封装中的半导体器件的稳定操作。例如，两个芯片彼此堆叠，第一至第三焊盘沿着彼此靠近并且平行布置的各个芯片的对应侧布置，并且这些焊盘通常以第一至第三金属彼此连接电线。在另一示例中，第四和第五焊盘沿着不同于第一至第三焊盘所设置的一侧的一侧设置，并且还通过直接在芯片之间的第四金属线彼此连接。

9. 发明授权

US08134228B2 Semiconductor device for battery power voltage control 有权
标题翻译：半导体器件用于电池电源电压控制
公开(公告)号：US08134228B2
公开(公告)日：2012-03-13
申请号：US12489714
申请日：2009-06-23
申请人： Mikihiko Komatsu , Takao Hidaka , Junko Kimura
发明人： Mikihiko Komatsu , Takao Hidaka , Junko Kimura
IPC分类号： H01L21/00 , H01L23/02 , H01L23/48
CPC分类号： H01L25/0657 , G06F1/26 , H01L23/3114 , H01L23/481 , H01L23/4952 , H01L23/49575 , H01L23/50 , H01L24/05 , H01L24/06 , H01L24/09 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L25/16 , H01L2223/6611 , H01L2224/02166 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/05647 , H01L2224/0603 , H01L2224/32145 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48145 , H01L2224/48247 , H01L2224/48465 , H01L2224/48624 , H01L2224/48647 , H01L2224/48724 , H01L2224/48747 , H01L2224/48824 , H01L2224/48847 , H01L2224/49111 , H01L2224/49113 , H01L2224/4917 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2224/85205 , H01L2225/06506 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/01003 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/13091 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H01L2924/30105 , H01L2924/01039 , H01L2924/00 , H01L2224/48257 , H01L2924/00012 , H01L2924/00011
摘要： A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires respectively. In another example, fourth and fifth pad are disposed along a side different form a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
摘要翻译：将多个半导体芯片中的任一个产生的电压作为电源电压供给到另一芯片，以实现其中半导体芯片堆叠在相同封装中的半导体器件的稳定操作。例如，两个芯片彼此堆叠，第一至第三焊盘沿着彼此靠近并且平行布置的各个芯片的对应侧布置，并且这些焊盘通常以第一至第三金属彼此连接电线。在另一示例中，第四和第五焊盘沿着不同形式的一侧设置，第一至第三焊盘沿着该侧布置，并且还通过直接在芯片之间的第四金属线彼此连接。

10. 发明授权

US5289190A Recording/reproducing apparatus including control signal indicating high-efficiency coding 失效
标题翻译：包括表示高效率编码的控制信号的记录/重放装置
公开(公告)号：US5289190A
公开(公告)日：1994-02-22
申请号：US813700
申请日：1991-12-27
申请人： Kenji Shimoda , Junko Kimura
发明人： Kenji Shimoda , Junko Kimura
IPC分类号： G06T9/00 , G11B20/14 , H03M5/14 , H04N5/926 , H04N7/26 , H04N7/30 , H04N9/804 , H04N1/41 , H04N5/76
CPC分类号： H04N9/8047 , G11B20/1426 , H03M5/145 , H04N19/115 , H04N19/126 , H04N19/14 , H04N19/172 , H04N19/176 , H04N19/18 , H04N19/196 , H04N19/197 , H04N19/40 , H04N19/44 , H04N19/46 , H04N19/60 , H04N5/9264 , H04N19/124 , H04N19/13 , H04N19/146 , H04N19/149 , H04N19/15 , H04N19/91
摘要： The present invention relates to a recording/reproducing apparatus which records an effective transmit information signal on a recording medium in a high-efficiency coded form and decodes the high-efficiency coded signal read from the recording medium to recover the original information signal. At the time of recording or dubbing of the recovered information signal on another recording medium, the information signal, a control signal indicating whether or not the information signal has been subjected to high-efficiency coding and decoding processes and a specific signal indicating a specific value used in the high-efficiency coding and decoding processes when the information signal has been subjected to the high-efficiency coding and decoding processes are transmitted, thereby preventing the deterioration of data due to the high-efficiency coding.
摘要翻译：本发明涉及以高效编码形式将有效发送信息信号记录在记录介质上的记录/再现装置，并对从记录介质读取的高效率编码信号进行解码以恢复原始信息信号。在另一个记录介质上记录或复制恢复的信息信号时，信息信号，指示信息信号是否已经经过高效编码和解码处理的控制信号以及指示特定值的特定信号当信息信号已经经受高效率编码和解码处理时，在高效率编码和解码处理中被使用，从而防止由于高效率编码而引起的数据恶化。

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