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1. 发明专利

JP2008037103A Method for manufacturing artificial patterned marble 审中-公开
标题翻译：制造人造花纹大理石的方法
公开(公告)号：JP2008037103A
公开(公告)日：2008-02-21
申请号：JP2007180411
申请日：2007-07-10
申请人： Geesan M Teck Co Ltd , Jung Soo Yoon , 正洙尹 , 智山エム・テク株式会社
发明人： YOON JUNG SOO
IPC分类号： B29C39/24 , B29C39/14 , B29K33/04 , B29L31/00 , C08K3/00 , C08L33/04
CPC分类号： B28B1/005 , B28B13/0295 , B29C39/12 , B29C39/24 , B29C41/12 , B29C41/22 , B29C41/36 , B29C67/245 , B29K2033/08
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing an artificial patterned marble which can represent a variety of standards and patterns of hue.
SOLUTION: This method for manufacturing an artificial patterned marble comprises a step of casting a monochrome or mixed color main slurry S1 of an acryl-based artificial marble, in a proper thickness, onto a film 3 traveling at a set velocity, from a main nozzle 2 fixed in its position, allowing a pattern slurry nozzle 6 fixed to the upper part in a moving direction of the film to rise the nozzle 6 intermittently while injecting a contrasting colored pattern slurry S2 to the main slurry S1 into the main slurry S1, after descent to the bottom surface of the main slurry S1 applied to the upper part of the film 3 moving in the interval, and a step obtaining the artificial patterned marble cut to a desired standard and sizing, after hardening the artificial patterned slurry S which is thick as designed by injecting the pattern slurry S2, in a desired shape, into the main slurry S1.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供可以代表各种标准和色调图案的人造图案大理石的制造方法。解决方案：用于制造人造图案的大理石的方法包括以适当的厚度将丙烯酸类人造大理石的单色或混色主浆S1浇铸到以设定速度行进的薄膜3上的步骤，主喷嘴2固定在其位置，允许在膜的移动方向上固定在上部的图案浆料喷嘴6间歇地上升喷嘴6，同时将主色浆S1对着着色图案浆料S2注入主浆料 S1，下降到主浆料S1的底面施加到在间隔内移动的膜3的上部，以及将人造图案化大理石切割成所需标准和上浆的步骤，在将人造图案浆料S 其通过将图案浆料S2以期望的形状注入主浆料S1而设计为厚。版权所有（C）2008，JPO＆INPIT

2. 发明授权

US10184178B2 Plasma-enhanced chemical vapor deposition (PE-CVD) apparatus and method of operating the same 有权
公开(公告)号：US10184178B2
公开(公告)日：2019-01-22
申请号：US14959333
申请日：2015-12-04
申请人： Minjong Kim , Jung-soo Yoon , Jang-Hee Lee , Jongwon Hong
发明人： Minjong Kim , Jung-soo Yoon , Jang-Hee Lee , Jongwon Hong
IPC分类号： C23C16/455 , C23C16/50 , C23C16/505 , H01J37/32
摘要： A deposition apparatus includes a chuck in a process chamber, the chuck having a top surface on which a substrate is loaded, a showerhead disposed over the chuck, and a fence extension disposed in the process chamber. Plasma is generated in a space between the showerhead and the loaded substrate during a deposition process. The fence extension at least partially confines the plasma in the space during the deposition process, thereby enabling improved thickness uniformity and reliability of a layer deposited on the loaded substrate during the deposition process.

3. 发明申请

US20080032050A1 METHOD OF PRODUCING PATTERNED ARTIFICIAL MARBLE 审中-公开
标题翻译：生产人造人造大理石的方法
公开(公告)号：US20080032050A1
公开(公告)日：2008-02-07
申请号：US11772722
申请日：2007-07-02
申请人： Jung Soo Yoon
发明人： Jung Soo Yoon
IPC分类号： B05D3/02
CPC分类号： B28B1/005 , B28B13/0295 , B29C39/12 , B29C39/24 , B29C41/12 , B29C41/22 , B29C41/36 , B29C67/245 , B29K2033/08
摘要： Disclosed is a method of producing patterned artificial marble, including applying a main slurry for acrylic artificial marble having a single color or a mixed color through a fixed main nozzle to a predetermined thickness on a film being conveyed at a predetermined speed; lowering a patterning nozzle, which is mounted above the film being conveyed so as to be intermittently vertically movable, to the bottom of the main slurry applied on the film conveyed below the patterning nozzle, and then raising it while injecting a patterning slurry having a color different from that of the main slurry into the main slurry to create a desired pattern; and curing the patterned artificial marble slurry having a predetermined thickness in which the patterning slurry is injected into the main slurry to create a desired pattern, and then conducting cutting to a predetermined size and sanding, thus obtaining patterned artificial marble. The patterned artificial marble can exhibit patterns having various sizes and colors, which have not been shown in conventional artificial marble, and thus, realizes superior interior appearances, remarkably improving users' interest in the products and product reliability.
摘要翻译：公开了一种制造图案化人造大理石的方法，包括通过固定主喷嘴将具有单色或混色的丙烯酸人造大理石的主浆料以预定速度输送到预定厚度上; 将安装在被输送的膜上方以便间歇地垂直移动的图案形成喷嘴降低到施加在图案形成喷嘴下方的膜上的主浆料的底部，然后在注入具有颜色的图案化浆料的同时升高不同于主浆料进入主浆料以产生所需图案; 并将具有预定厚度的图案化人造大理石浆料固化，其中将图案化浆料注入主浆料以产生所需图案，然后进行切割至预定尺寸并进行打磨，从而获得图案化的人造大理石。图案化的人造大理石可以呈现出具有各种尺寸和颜色的图案，其在传统的人造大理石中未示出，因此实现了优异的内部外观，显着提高了用户对产品的兴趣和产品的可靠性。

4. 发明申请

US20160281225A1 PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION (PE-CVD) APPARATUS AND METHOD OF OPERATING THE SAME 审中-公开
标题翻译：等离子体增强化学蒸气沉积（PE-CVD）装置及其操作方法
公开(公告)号：US20160281225A1
公开(公告)日：2016-09-29
申请号：US14959333
申请日：2015-12-04
申请人： Minjong KIM , Jung-soo YOON , Jang-Hee LEE , Jongwon HONG
发明人： Minjong KIM , Jung-soo YOON , Jang-Hee LEE , Jongwon HONG
IPC分类号： C23C16/455 , C23C16/50
CPC分类号： C23C16/455 , C23C16/505 , H01J37/3244 , H01J37/32623 , H01J37/32633
摘要： A deposition apparatus includes a chuck in a process chamber, the chuck having a top surface on which a substrate is loaded, a showerhead disposed over the chuck, and a fence extension disposed in the process chamber. Plasma is generated in a space between the showerhead and the loaded substrate during a deposition process. The fence extension at least partially confines the plasma in the space during the deposition process, thereby enabling improved thickness uniformity and reliability of a layer deposited on the loaded substrate during the deposition process.
摘要翻译：沉积设备包括处理室中的卡盘，卡盘具有其上装载有基底的顶表面，设置在卡盘上方的喷头和设置在处理室中的护栏延伸部。在沉积过程中，等离子体在喷淋头和装载的基板之间的空间中产生。栅栏延伸部在沉积工艺期间至少部分地将等离子体限制在空间中，从而能够在沉积工艺期间改善沉积在装载的衬底上的层的厚度均匀性和可靠性。

5. 发明授权

US08889543B2 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08889543B2
公开(公告)日：2014-11-18
申请号：US13795807
申请日：2013-03-12
申请人： Jong-Min Baek , In-Sun Park , Jong-Myeong Lee , Jong-Won Hong , Hei-Seung Kim , Jung-Soo Yoon
发明人： Jong-Min Baek , In-Sun Park , Jong-Myeong Lee , Jong-Won Hong , Hei-Seung Kim , Jung-Soo Yoon
IPC分类号： H01L21/4763 , H01L21/768
CPC分类号： H01L21/76802 , H01L21/76804 , H01L21/76814 , H01L21/7682 , H01L21/76831 , H01L21/76834 , H01L21/76844 , H01L21/76885
摘要： A method of fabricating a semiconductor device includes forming switching devices on a substrate. A lower structure is formed in the substrate having the switching devices. A lower conductive layer is formed on the lower structure. Sacrificial mask patterns are formed on the lower conductive layer. Lower conductive patterns are formed by etching the lower conductive layer using the sacrificial mask patterns as an etch mask. An interlayer insulating layer is formed on the substrate having the lower conductive patterns. Interlayer insulating patterns are formed by planarizing the interlayer insulating layer until the sacrificial mask patterns are exposed. Openings exposing the lower conductive patterns are formed by removing the exposed sacrificial mask patterns. Upper conductive patterns self-aligned with the lower conductive patterns are formed in the openings.
摘要翻译：制造半导体器件的方法包括在衬底上形成开关器件。在具有开关装置的基板中形成下部结构。下导电层形成在下结构上。牺牲掩模图案形成在下导电层上。通过使用牺牲掩模图案作为蚀刻掩模蚀刻下导电层来形成下导电图案。在具有较低导电图案的基板上形成层间绝缘层。通过平坦化层间绝缘层直到牺牲掩模图案曝光来形成层间绝缘图案。通过去除暴露的牺牲掩模图案来形成露出下导电图案的开口。在开口中形成与下导电图案自对准的上导电图案。

6. 发明申请

US20130267088A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20130267088A1
公开(公告)日：2013-10-10
申请号：US13795807
申请日：2013-03-12
申请人： JONG-MIN BAEK , IN-SUN PARK , JONG-MYEONG LEE , JONG-WON HONG , HEI-SEUNG KIM , JUNG-SOO YOON
发明人： JONG-MIN BAEK , IN-SUN PARK , JONG-MYEONG LEE , JONG-WON HONG , HEI-SEUNG KIM , JUNG-SOO YOON
IPC分类号： H01L21/768
CPC分类号： H01L21/76802 , H01L21/76804 , H01L21/76814 , H01L21/7682 , H01L21/76831 , H01L21/76834 , H01L21/76844 , H01L21/76885
摘要： A method of fabricating a semiconductor device includes forming switching devices on a substrate. A lower structure is formed in the substrate having the switching devices. A lower conductive layer is formed on the lower structure. Sacrificial mask patterns are formed on the lower conductive layer. Lower conductive patterns are formed by etching the lower conductive layer using the sacrificial mask patterns as an etch mask. An interlayer insulating layer is formed on the substrate having the lower conductive patterns. Interlayer insulating patterns are formed by planarizing the interlayer insulating layer until the sacrificial mask patterns are exposed. Openings exposing the lower conductive patterns are formed by removing the exposed sacrificial mask patterns. Upper conductive patterns self-aligned with the lower conductive patterns are formed in the openings.
摘要翻译：制造半导体器件的方法包括在衬底上形成开关器件。在具有开关装置的基板中形成下部结构。下导电层形成在下结构上。牺牲掩模图案形成在下导电层上。通过使用牺牲掩模图案作为蚀刻掩模蚀刻下导电层来形成下导电图案。在具有较低导电图案的基板上形成层间绝缘层。通过平坦化层间绝缘层直到牺牲掩模图案曝光来形成层间绝缘图案。通过去除暴露的牺牲掩模图案来形成露出下导电图案的开口。在开口中形成与下导电图案自对准的上导电图案。

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