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    • 2. 再颁专利
    • OFDM transmission apparatus and method having minimal transmission delay
    • OFDM发送装置和方法具有最小的传输延迟
    • USRE44232E1
    • 2013-05-21
    • US12869361
    • 2010-08-26
    • Jung Hak KimJae Ho LeeJung Sik Kim
    • Jung Hak KimJae Ho LeeJung Sik Kim
    • H04J11/00H04J1/16H04J3/06
    • H04L25/03866H04L1/0059H04L1/0071H04L27/2601
    • An OFDM transmission apparatus having minimal transmission delay comprises a training symbol storage and generation unit, a delay unit and a controller. The training symbol storage and generation unit stores training symbols for the preamble, and outputs the stored training symbols when a training symbol output request signal is received. The delay unit receives data for the signal field from the MAC layer, delays the received data by the data processing time of the scrambler, and outputs the delayed data to the convolution encoder. The controller outputs the training symbol output request signal, requesting the preamble of the frame, to the training symbol storage and generation unit when a frame transmission request is received from the MAC layer, and outputs a data request signal, requesting the signal field and the data field, to the MAC layer in consideration of total data processing time (TPROCESS).
    • 具有最小传输延迟的OFDM发送装置包括训练符号存储和生成单元,延迟单元和控制器。 训练符号存储和生成单元存储用于前导码的训练符号,并且当接收到训练符号输出请求信号时,输出存储的训练符号。 延迟单元接收来自MAC层的信号字段的数据,将接收的数据延迟加扰器的数据处理时间,并将延迟的数据输出到卷积编码器。 当从MAC层接收到帧发送请求时,控制器向训练符号存储和生成单元输出请求帧的前导码的训练符号输出请求信号,并输出请求信号字段和 数据字段,考虑到总数据处理时间(TPROCESS)到MAC层。
    • 4. 发明授权
    • OFDM transmission apparatus and method having minimal transmission delay
    • OFDM发送装置和方法具有最小的传输延迟
    • US07417946B2
    • 2008-08-26
    • US11115585
    • 2005-04-26
    • Jung Hak KimJae Ho LeeJung Sik Kim
    • Jung Hak KimJae Ho LeeJung Sik Kim
    • H04J11/00H04J1/16
    • H04L25/03866H04L1/0059H04L1/0071H04L27/2601
    • An OFDM transmission apparatus having minimal transmission delay comprises a training symbol storage and generation unit, a delay unit and a controller. The training symbol storage and generation unit stores training symbols for the preamble, and outputs the stored training symbols when a training symbol output request signal is received. The delay unit receives data for the signal field from the MAC layer, delays the received data by the data processing time of the scrambler, and outputs the delayed data to the convolution encoder. The controller outputs the training symbol output request signal, requesting the preamble of the frame, to the training symbol storage and generation unit when a frame transmission request is received from the MAC layer, and outputs a data request signal, requesting the signal field and the data field, to the MAC layer in consideration of total data processing time (TPROCESS).
    • 具有最小传输延迟的OFDM发送装置包括训练符号存储和生成单元,延迟单元和控制器。 训练符号存储和生成单元存储用于前导码的训练符号,并且当接收到训练符号输出请求信号时,输出存储的训练符号。 延迟单元接收来自MAC层的信号字段的数据,将接收的数据延迟加扰器的数据处理时间,并将延迟的数据输出到卷积编码器。 当从MAC层接收到帧发送请求时,控制器向训练符号存储和生成单元输出请求帧的前导码的训练符号输出请求信号,并输出请求信号字段和 数据字段,考虑总数据处理时间(T< PROCESS< / SUB>)到MAC层。
    • 5. 再颁专利
    • Interleaving apparatus and method for orthogonal frequency division multiplexing transmitter
    • 正交频分复用发射机的交错装置和方法
    • USRE44848E1
    • 2014-04-15
    • US12774998
    • 2010-05-06
    • Jung Hak KimHun Sik KangDo Young Kim
    • Jung Hak KimHun Sik KangDo Young Kim
    • G11C19/00G11C8/00G06F12/00
    • G11C7/1042H04L27/2608
    • An interleaving apparatus and method for an OFDM transmitter are provided. The interleaving apparatus comprises a memory unit, a memory write/read control unit, a memory access address generation unit, and a second permutation and output selection unit. The memory unit includes a plurality of memory banks, which are capable of being independently controlled so that data can be written or read in/from the memory banks, each having memory cells arranged in an N×M matrix structure. The memory write/read control unit generates control signals to write/read data in/from the memory unit. The memory access address generation unit generates a memory access address used to write/read data in/from the memory unit in response to the memory write/read control signals. The second permutation and output selection unit rearranges the positions of data bits output from the memory unit and outputs the position-rearranged data bits.
    • 提供了一种用于OFDM发射机的交织装置和方法。 交织装置包括存储单元,存储器写入/读取控制单元,存储器访问地址生成单元和第二置换和输出选择单元。 存储单元包括多个存储体,其能够被独立地控制,使得数据可以从存储体中写入/读出,每个具有以N×M矩阵结构排列的存储单元。 存储器写入/读取控制单元产生用于在/从存储器单元写入/读取数据的控制信号。 存储器访问地址生成单元响应于存储器写入/读取控制信号生成用于向/从存储器单元写入/读取数据的存储器访问地址。 第二置换和输出选择单元重新排列从存储器单元输出的数据位的位置,并输出位置重新排列的数据位。