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1. 发明授权

US08314476B2 Semiconductor chip and semiconductor wafer 有权
标题翻译：半导体芯片和半导体晶圆
公开(公告)号：US08314476B2
公开(公告)日：2012-11-20
申请号：US12833672
申请日：2010-07-09
申请人： Jun-Gi Choi , Jong-Chern Lee
发明人： Jun-Gi Choi , Jong-Chern Lee
IPC分类号： H01L23/544
CPC分类号： H01L22/32 , H01L22/34 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor wafer includes at least one chip formed on a substrate, and a scribe line region surrounding the chip. The chip includes a device formation region, and a chip boundary region surrounding the device formation region and formed between the device formation region and the scribe line region. The chip boundary region includes a guard ring structure which physically separates the device formation region from the scribe line region. The guard ring structure includes a signal transfer element which transfers an electric signal between the device formation region and the scribe line region.
摘要翻译：半导体晶片包括形成在基板上的至少一个芯片和围绕芯片的划线区域。芯片包括器件形成区域和围绕器件形成区域并形成在器件形成区域和划线区域之间的芯片边界区域。芯片边界区域包括将器件形成区域与划线区域物理分离的保护环结构。保护环结构包括在器件形成区域和划线区域之间传送电信号的信号传输元件。

2. 发明申请

US20110266877A1 APPARATUS FOR SUPPLYING VOLTAGE FREE NOISE AND METHOD OF OPERATION THE SAME 失效
标题翻译：用于提供无电压噪声的装置及其操作方法
公开(公告)号：US20110266877A1
公开(公告)日：2011-11-03
申请号：US13180584
申请日：2011-07-12
申请人： YOON JAE SHIN , Jun Gi Choi
发明人： YOON JAE SHIN , Jun Gi Choi
IPC分类号： H02J4/00
CPC分类号： H03K17/145 , H03K19/00384 , Y10T307/696
摘要： A voltage supply apparatus includes a power noise sensing unit, a voltage selecting unit, a first power voltage supply unit and a second power voltage supply unit. The power noise sensing unit senses noise from first and second powers and outputs a power noise sensing signal. The voltage selecting unit outputs first and second driving signals in response to a voltage-supply-enable-signal and the power noise sensing signal. The first power voltage supply unit applies a voltage of the first power in response to the first and second driving signals. The second power voltage supply unit applies a voltage of the second power in response to the first and second driving signals.
摘要翻译：电压供给装置包括电源噪声检测单元，电压选择单元，第一电源电压单元和第二电源电压单元。功率噪声感测单元感测来自第一和第二功率的噪声，并输出功率噪声感测信号。电压选择单元响应于电压供应使能信号和功率噪声感测信号输出第一和第二驱动信号。第一电源电压单元响应于第一和第二驱动信号施加第一功率的电压。第二电源电压单元响应于第一和第二驱动信号施加第二功率的电压。

3. 发明申请

US20110001552A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110001552A1
公开(公告)日：2011-01-06
申请号：US12615876
申请日：2009-11-10
申请人： Sang-Hoon SHIN , Hyung-Dong Lee , Jun-Gi Choi
发明人： Sang-Hoon SHIN , Hyung-Dong Lee , Jun-Gi Choi
IPC分类号： H01H37/76
CPC分类号： H01L23/5256 , G11C17/16 , G11C17/18 , H01L23/5258 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A semiconductor device includes a first transmission line and a second transmission line disposed at different layers; a contact fuse coupled with the first transmission line and the second transmission line; a power driver configured to apply an electric stress to the contact fuse; and a fuse state output unit configured to output a fuse state signal having a logic level corresponding to an electric connection state of the contact fuse.
摘要翻译：半导体器件包括：第一传输线和布置在不同层的第二传输线; 与第一传输线和第二传输线耦合的接触熔丝; 功率驱动器，被配置为向所述接触保险丝施加电应力; 以及熔丝状态输出单元，被配置为输出具有与所述接触熔丝的电连接状态对应的逻辑电平的熔丝状态信号。

4. 发明授权

US07825733B2 Circuit providing compensated power for sense amplifier and driving method thereof 有权
标题翻译：用于读出放大器的电路提供补偿功率及其驱动方法
公开(公告)号：US07825733B2
公开(公告)日：2010-11-02
申请号：US12136196
申请日：2008-06-10
申请人： Jun Gi Choi
发明人： Jun Gi Choi
IPC分类号： H03L7/099
CPC分类号： G11C5/147 , G11C7/02 , G11C7/065 , G11C7/08 , G11C8/18 , G11C11/4074 , G11C11/4091
摘要： The present invention discloses a circuit providing a power for a sense amplifier that stabilizes a power voltage supplied to the sense amplifier by compensating a noise generated in the power voltage when the sense amplifier operates with an selectively generated decoupling noise. The circuit providing a power for a sense amplifier includes a sense amplifying circuit sensing and amplifying data loaded on a bit line with a first power. A power supplying unit provides the first power to the sense amplifying circuit. A decoupling unit generates a decoupling noise with a second power and provides the decoupling noise to the first power voltage. The decoupling noise is maintained for a period including a time point of an operation of the sense amplifying circuit and a predetermined time thereafter.
摘要翻译：本发明公开了一种提供用于感测放大器的电源的电路，其通过补偿当读出放大器以选择性地产生的解耦噪声工作时在电源电压中产生的噪声来稳定提供给读出放大器的电源电压。提供用于读出放大器的电源的电路包括感测放大电路，以感测和放大加载在具有第一功率的位线上的数据。供电单元向感测放大电路提供第一功率。解耦单元产生具有第二功率的去耦噪声，并将解耦噪声提供给第一电源电压。解耦噪声保持包括感测放大电路的操作的时间点和之后的预定时间的周期。

5. 发明授权

US07616022B2 Circuit and method for detecting skew of transistors in a semiconductor device 失效
标题翻译：用于检测半导体器件中的晶体管的偏斜的电路和方法
公开(公告)号：US07616022B2
公开(公告)日：2009-11-10
申请号：US11892584
申请日：2007-08-24
申请人： Hwang Hur , Jun-Gi Choi
发明人： Hwang Hur , Jun-Gi Choi
IPC分类号： G01R31/26
CPC分类号： G11C29/50 , G11C29/12005 , G11C2029/5002
摘要： A circuit and method for easily detecting skew of a transistor within a semiconductor device are provided. The circuit for detecting the skew of the transistor includes a linear voltage generating unit for outputting a linear voltage by using a first supply voltage, a first attenuation unit for reducing variation width of the linear voltage according to the performance of the transistor, a saturation voltage generating unit for outputting a saturation voltage by using a second supply voltage, and a comparison unit for comparing an output of the first attenuation unit and the saturation voltage.
摘要翻译：提供一种用于容易地检测半导体器件内的晶体管的偏斜的电路和方法。用于检测晶体管的偏斜的电路包括用于通过使用第一电源电压输出线性电压的线性电压产生单元，用于根据晶体管的性能减小线性电压的变化幅度的第一衰减单元，饱和电压产生单元，用于通过使用第二电源电压输出饱和电压;以及比较单元，用于比较第一衰减单元的输出和饱和电压。

6. 发明申请

US20090067263A1 CORE VOLTAGE DISCHARGE DRIVER 失效
标题翻译：核心电压放电驱动器
公开(公告)号：US20090067263A1
公开(公告)日：2009-03-12
申请号：US11966608
申请日：2007-12-28
申请人： Jun-Gi CHOI
发明人： Jun-Gi CHOI
IPC分类号： G11C7/00 , G11C5/14
CPC分类号： G11C11/4091 , G11C5/147 , G11C7/06 , G11C11/4074
摘要： A core voltage discharge driver prevents a core voltage discharging operation from interrupting the core voltage generating operation. The core voltage discharge driver includes a comparing unit configured to compare a core voltage generating control signal for controlling generation of a core voltage with a core voltage discharging control signal for controlling discharge of the core voltage, and an adjusting unit configured to adjust the core voltage discharging control signal based on a comparison result of the comparing unit.
摘要翻译：核心电压放电驱动器防止核心电压放电操作中断核心电压产生操作。核心电压放电驱动器包括：比较单元，被配置为比较用于控制核心电压产生的核心电压产生控制信号与用于控制核心电压放电的核心电压放电控制信号;以及调整单元，被配置为调整核心电压基于比较单元的比较结果来放电控制信号。

7. 发明授权

US07149131B2 Semiconductor memory device and internal voltage generating method thereof 有权
标题翻译：半导体存储器件及其内部电压产生方法
公开(公告)号：US07149131B2
公开(公告)日：2006-12-12
申请号：US11024969
申请日：2004-12-30
申请人： Jun-Gi Choi , Yong-Kyu Kim
发明人： Jun-Gi Choi , Yong-Kyu Kim
IPC分类号： G11C5/14 , G11C11/4074 , G11C11/4076
CPC分类号： G11C11/4074 , G11C5/147
摘要： A semiconductor memory device reduces power consumption with maintaining quality of an internal power voltage and a core voltage. The semiconductor memory device reduces power consumption with sufficiently maintaining a core voltage during precharge. The semiconductor memory device includes a command decoder receiving external control signals to output an active signal and a precharge signal, an internal power voltage generation controlling unit receiving the active signal and the precharge signal for activating an internal power voltage active signal for a predetermined time, a core voltage generation controlling unit receiving the active signal, the precharge signal and the internal power voltage active signal for activating a core voltage active signal for a predetermined time, an internal power voltage generating unit for generating an internal power voltage during the activation period of the internal power voltage active signal; and a core voltage generating unit for generating a core voltage during the activation period of the core voltage active signal.
摘要翻译：半导体存储器件通过保持内部电源电压和核心电压的质量来降低功耗。半导体存储器件在预充电期间充分保持核心电压来降低功耗。该半导体存储装置包括接收外部控制信号以输出有效信号和预充电信号的指令解码器，接收有效信号的内部电源电压产生控制单元和用于激活内部电力电压有源信号预定时间的预充电信号，接收有效信号的核心电压产生控制单元，用于激活核心电压有源信号预定时间的预充电信号和内部电源电压有效信号;内部电源电压产生单元，用于在激活期间内产生内部电源电压内部电源电压有效信号; 以及核心电压产生单元，用于在核心电压有源信号的激活期间产生核心电压。

8. 发明授权

US07053672B2 Method and apparatus for detecting semiconductor characterist variations 有权
标题翻译：用于检测半导体特征变化的方法和装置
公开(公告)号：US07053672B2
公开(公告)日：2006-05-30
申请号：US10878444
申请日：2004-06-28
申请人： Jun Gi Choi
发明人： Jun Gi Choi
IPC分类号： H03K5/22
CPC分类号： G01R31/2621 , G01R31/2628
摘要： The present invention discloses a skew detection device which can detect a skew of a transistor changed due to a driving voltage, a size and a process variable. The skew detection device includes a first potential level generator for outputting a first voltage, a second potential level generator for outputting a second voltage, a first level shifter for receiving the first voltage and outputting a first shift voltage, a second level shifter for receiving the second voltage and outputting a second shift voltage, and a comparator for comparing the first shift voltage with the second shift voltage. The first voltage is determined according to a drain-source current of a first MOS transistor operated in a linear region, and the second voltage is determined according to a drain-source current of a second MOS transistor operated in a saturation region.
摘要翻译：本发明公开了一种可以检测由于驱动电压，尺寸和过程变量而改变的晶体管的偏斜的偏斜检测装置。偏斜检测装置包括用于输出第一电压的第一电位电平发生器，用于输出第二电压的第二电位电平发生器，用于接收第一电压并输出第一移位电压的第一电平移位器，用于接收第一电压的第二电平移位器第二电压并输出第二移位电压;以及比较器，用于将第一移位电压与第二移位电压进行比较。根据在线性区域中工作的第一MOS晶体管的漏 - 源电流来确定第一电压，并且根据在饱和区域中操作的第二MOS晶体管的漏 - 源电流来确定第二电压。

9. 发明申请

US20060092743A1 Semiconductor memory device and internal voltage generating method thereof 有权
公开(公告)号：US20060092743A1
公开(公告)日：2006-05-04
申请号：US11024969
申请日：2004-12-30
申请人： Jun-Gi Choi , Yong-Kyu Kim
发明人： Jun-Gi Choi , Yong-Kyu Kim
IPC分类号： G11C5/14 , G11C7/00
CPC分类号： G11C11/4074 , G11C5/147
摘要： A semiconductor memory device reduces power consumption with maintaining quality of an internal power voltage and a core voltage. The semiconductor memory device reduces power consumption with sufficiently maintaining a core voltage during precharge. The semiconductor memory device includes a command decoder receiving external control signals to output an active signal and a precharge signal, an internal power voltage generation controlling unit receiving the active signal and the precharge signal for activating an internal power voltage active signal for a predetermined time, a core voltage generation controlling unit receiving the active signal, the precharge signal and the internal power voltage active signal for activating a core voltage active signal for a predetermined time, an internal power voltage generating unit for generating an internal power voltage during the activation period of the internal power voltage active signal; and a core voltage generating unit for generating a core voltage during the activation period of the core voltage active signal.

10. 发明申请

US20060050589A1 Power voltage supplier of semiconductor memory device 有权
标题翻译：半导体存储器件的电源供应商
公开(公告)号：US20060050589A1
公开(公告)日：2006-03-09
申请号：US11020244
申请日：2004-12-27
申请人： Jun-Gi Choi , Yong-Kyu Kim
发明人： Jun-Gi Choi , Yong-Kyu Kim
IPC分类号： G11C5/14
CPC分类号： G11C8/08 , G11C5/147
摘要： The present invention provides a power voltage supplier for stably supplying a noise-free power voltage without increasing a size of a reservoir capacitor by employing a sharing scheme of the reservoir capacitor. The power voltage supplier of a semiconductor memory device includes: a first power voltage supply line for supplying a first power voltage; a second power voltage supply line for supplying a second power voltage; a first reservoir capacitor for supplying the first and the second power voltages stably; and a reservoir capacitor controller for selectively connecting the first reservoir capacitor to the first power voltage supply line or the second power voltage supply line.
摘要翻译：本发明提供一种电源电压供应器，通过采用储层电容器的共用方案，不增加储层电容器的尺寸，稳定地提供无噪声电力电压。半导体存储器件的电源电压供应器包括：用于提供第一电源电压的第一电源电压线; 用于提供第二电源电压的第二电源电压线; 用于稳定地提供第一和第二电源电压的第一储存电容器; 以及储存电容器控制器，用于选择性地将第一储存电容器连接到第一电源电压线或第二电源电压线。

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