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    • 4. 发明申请
    • CURRENT STEERING DIGITAL-TO-ANALOG CONVERTER
    • 电流转向数字到模拟转换器
    • US20100328124A1
    • 2010-12-30
    • US12560602
    • 2009-09-16
    • John Jude O'DonnellFrederick Carnegie Thompson
    • John Jude O'DonnellFrederick Carnegie Thompson
    • H03M3/00H03M1/66
    • H03M1/0836H03M1/66
    • A digital to analog converter (DAC) module receives an input digital signal having a first data rate and is associated with a first frequency, the DAC module also receiving a synchronization signal having a second frequency that is higher than the first frequency. The DAC module includes an up-sampling circuit to generate a first digital signal having bit values of the input digital signal alternating with zero values, the first digital signal having a data rate that is higher than the first data rate; a delay circuit to delay the first digital signal by a time period to generate a second digital signal; a first DAC cell to generate a first analog signal based on the first digital signal, the first DAC cell being synchronized by the synchronization signal; a second DAC cell to generate a second analog signal based on the second digital signal, the second DAC cell being synchronized by the synchronization signal; and an adder to sum the first and second analog signals and generate a third analog signal.
    • 数模转换器(DAC)模块接收具有第一数据速率并与第一频率相关联的输入数字信号,DAC模块还接收具有高于第一频率的第二频率的同步信号。 DAC模块包括上采样电路,用于产生具有与零值交替的输入数字信号的位值的第一数字信号,第一数字信号具有高于第一数据速率的数据速率; 延迟电路,用于将第一数字信号延迟一段时间以产生第二数字信号; 第一DAC单元,用于基于第一数字信号产生第一模拟信号,第一DAC单元由同步信号同步; 第二DAC单元,用于基于所述第二数字信号产生第二模拟信号,所述第二DAC单元由所述同步信号同步; 以及加法器,用于对第一和第二模拟信号求和并产生第三模拟信号。
    • 8. 发明授权
    • Current steering digital-to-analog converter
    • 电流转向数模转换器
    • US07994957B2
    • 2011-08-09
    • US12560602
    • 2009-09-16
    • John Jude O'DonnellFrederick Carnegie Thompson
    • John Jude O'DonnellFrederick Carnegie Thompson
    • H03M1/66
    • H03M1/0836H03M1/66
    • A digital to analog converter (DAC) module receives an input digital signal having a first data rate and is associated with a first frequency, the DAC module also receiving a synchronization signal having a second frequency that is higher than the first frequency. The DAC module includes an up-sampling circuit to generate a first digital signal having bit values of the input digital signal alternating with zero values, the first digital signal having a data rate that is higher than the first data rate; a delay circuit to delay the first digital signal by a time period to generate a second digital signal; a first DAC cell to generate a first analog signal based on the first digital signal, the first DAC cell being synchronized by the synchronization signal; a second DAC cell to generate a second analog signal based on the second digital signal, the second DAC cell being synchronized by the synchronization signal; and an adder to sum the first and second analog signals and generate a third analog signal.
    • 数模转换器(DAC)模块接收具有第一数据速率并与第一频率相关联的输入数字信号,DAC模块还接收具有高于第一频率的第二频率的同步信号。 DAC模块包括上采样电路,用于产生具有与零值交替的输入数字信号的位值的第一数字信号,第一数字信号具有高于第一数据速率的数据速率; 延迟电路,用于将第一数字信号延迟一段时间以产生第二数字信号; 第一DAC单元,用于基于第一数字信号产生第一模拟信号,第一DAC单元由同步信号同步; 第二DAC单元,用于基于所述第二数字信号产生第二模拟信号,所述第二DAC单元由所述同步信号同步; 以及加法器,用于对第一和第二模拟信号求和并产生第三模拟信号。