专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06928373B2 Flexible vector network analyzer measurements and calibrations 失效
标题翻译：灵活的矢量网络分析仪测量和校准
公开(公告)号：US06928373B2
公开(公告)日：2005-08-09
申请号：US10641700
申请日：2003-08-15
申请人： Jon S. Martens , Rena Ho , Jamie Tu
发明人： Jon S. Martens , Rena Ho , Jamie Tu
IPC分类号： G01R27/28 , G01R35/00 , G06F19/00
CPC分类号： G01R35/005 , G01R27/28
摘要： Methods, systems and computer program products for efficiently characterizing devices under test (DUTs) using a vector network analyzer (VNA) are provided. A N-port DUT can be divided as appropriate into multiple sub-devices, or multiple separate devices can be present. A parent calibration is performed. The VNA is then used to determine the S-parameters of interest for each sub-device or separate device, preferably without measuring S-parameters that are not of interest. This can include measuring S-parameters and removing corresponding error coefficients determined during the parent calibration.
摘要翻译：提供了使用矢量网络分析仪（VNA）有效地表征待测设备（DUT）的方法，系统和计算机程序产品。 N端口DUT可以根据需要分为多个子设备，或者可以存在多个分离的设备。执行父校准。然后使用VNA来确定每个子设备或单独设备的感兴趣的S参数，优选地不测量不感兴趣的S参数。这可以包括测量S参数并去除在父校准期间确定的相应误差系数。

2. 发明授权

US06882160B2 Methods and computer program products for full N-port vector network analyzer calibrations 失效
标题翻译：全N端口矢量网络分析仪校准的方法和计算机程序产品
公开(公告)号：US06882160B2
公开(公告)日：2005-04-19
申请号：US10702028
申请日：2003-11-05
申请人： Jon S. Martens , David V. Judge , Jimmy A. Bigelow
发明人： Jon S. Martens , David V. Judge , Jimmy A. Bigelow
IPC分类号： G01R27/32 , G01R35/00 , G01R15/12
CPC分类号： G01R27/32 , G01R35/005
摘要： Techniques are provided for performing full N-port calibrations in an environment in which a test set is used to connect an N-port DUT to an M-port VNA, where N>M. Techniques for incorporating port impedances as part of a calibration sequence are provided. Also provided are techniques for using sequential characterization and de-embedding to generate virtual calibrations that are then used in a renormalization process.
摘要翻译：提供技术用于在使用测试仪将N端口DUT连接到M端口VNA的环境中进行全N端口校准，其中N> M。提供了将端口阻抗作为校准序列的一部分并入的技术。还提供了使用顺序表征和去嵌入来生成虚拟校准的技术，然后在重整化过程中使用它们。

3. 发明授权

US5440238A Surface property detection apparatus and method 失效
标题翻译：表面特性检测装置及方法
公开(公告)号：US5440238A
公开(公告)日：1995-08-08
申请号：US948535
申请日：1992-09-21
申请人： Jon S. Martens , David S. Ginley , Vincent M. Hietala , Neil R. Sorensen
发明人： Jon S. Martens , David S. Ginley , Vincent M. Hietala , Neil R. Sorensen
IPC分类号： G01R27/06 , G01N22/00
CPC分类号： G01R27/06 , Y10T117/1004
摘要： Apparatus and method for detecting, determining, and imaging surface resistance corrosion, thin film growth, and oxide formation on the surface of conductors or other electrical surface modification. The invention comprises a modified confocal resonator structure with the sample remote from the radiating mirror. Surface resistance is determined by analyzing and imaging reflected microwaves; imaging reveals anomalies due to surface impurities, non-stoichiometry, and the like, in the surface of the superconductor, conductor, dielectric, or semiconductor.
摘要翻译：用于检测，确定和成像表面电阻腐蚀，薄膜生长和导体表面上的氧化物形成或其他电气表面改性的装置和方法。本发明包括具有远离辐射镜的样品的改进的共焦共振器结构。通过分析和成像反射微波来确定表面电阻; 在超导体，导体，电介质或半导体的表面中，成像显示由于表面杂质，非化学计量等引起的异常。

4. 发明授权

US5358928A High temperature superconductor step-edge Josephson junctions using Ti-Ca-Ba-Cu-O 失效
标题翻译：使用Ti-Ca-Ba-Cu-O的高温超导体步进约瑟夫逊结
公开(公告)号：US5358928A
公开(公告)日：1994-10-25
申请号：US949098
申请日：1992-09-22
申请人： David S. Ginley , Vincent M. Hietala , Gert K. G. Hohenwarter , Jon S. Martens , Thomas A. Plut , Chris P. Tigges , Gregory A. Vawter , Thomas E. Zipperian
发明人： David S. Ginley , Vincent M. Hietala , Gert K. G. Hohenwarter , Jon S. Martens , Thomas A. Plut , Chris P. Tigges , Gregory A. Vawter , Thomas E. Zipperian
IPC分类号： H01L39/22 , H01B12/00 , H01L27/12
CPC分类号： H01L39/225 , Y10S505/702 , Y10S505/783 , Y10S505/832
摘要： A process for formulating non-hysteretic and hysteretic Josephson junctions using HTS materials which results in junctions having the ability to operate at high temperatures while maintaining high uniformity and quality. The non-hysteretic Josephson junction is formed by step-etching a LaAlO.sub.3 crystal substrate and then depositing a thin film of TlCaBaCuO on the substrate, covering the step, and forming a grain boundary at the step and a subsequent Josephson junction. Once the non-hysteretic junction is formed the next step to form the hysteretic Josephson junction is to add capacitance to the system. In the current embodiment, this is accomplished by adding a thin dielectric layer, LaA1O.sub.3, followed by a cap layer of a normal metal where the cap layer is formed by first depositing a thin layer of titanium (Ti) followed by a layer of gold (Au). The dielectric layer and the normal metal cap are patterned to the desired geometry.
摘要翻译：使用HTS材料制备非迟滞和滞后的约瑟夫逊结的方法，其导致具有在高温下操作并且保持高均匀性和质量的能力的结。通过对LaAlO 3晶体衬底进行步骤蚀刻，然后在衬底上沉积TlCaBaCuO的薄膜，覆盖该步骤，并在该步骤和随后的约瑟夫逊结处形成晶界而形成非滞后约瑟夫逊结。一旦形成非滞后结，形成滞后约瑟夫逊结的下一步就是向系统增加电容。在当前的实施例中，这是通过添加薄的电介质层LaAlO3，其次是正常金属的覆盖层，其中通过首先沉积钛（Ti）的薄层，随后是金层 Au）。电介质层和普通金属帽被图案化成所需的几何形状。

5. 发明申请

US20110306314A1 FREQUENCY-SCALABLE SHOCKLINE-BASED VNA 有权
标题翻译：基于频率可调的基于键盘的VNA
公开(公告)号：US20110306314A1
公开(公告)日：2011-12-15
申请号：US12813337
申请日：2010-06-10
申请人： Karam Michael Noujeim , Jon S. Martens
发明人： Karam Michael Noujeim , Jon S. Martens
IPC分类号： H04B17/00
CPC分类号： G01R31/2841 , G01R27/32
摘要： A high-frequency VNA system is provided using non-linear transmission line (NLTL or shockline) based samplers configured to provide scalable operation characteristics. Scaling to adjust noise performance vs. frequency is accomplished as follows: (1) increasing or decreasing the fall time of a shockline's output voltage waveform. This is accomplished by changing the number of Schottky varactors in a shockline, as well as changing the shockline's Bragg cutoff frequency by setting the spacing between Schottky varactors; (2) changing the structure of the pulse-forming network connected with the sampler by changing the length of the differentiator arms in the sampler pulse-forming network; and (3) changing the LO signal frequency applied to the shockline. Multiple NLTL based samplers are multiplexed to form a broadband reflectometer with the multiplexing circuitry selectively connecting one of the NLTL based sampler segments at a time to allow user selection of a desired performance vs. frequency response for each segment.
摘要翻译：使用基于非线性传输线（NLTL或冲击线）的采样器提供高频VNA系统，其被配置为提供可扩展的操作特性。调整噪声性能与频率的比例可达到以下几点：（1）增加或减少冲击线输出电压波形的下降时间。这是通过改变冲击线中肖特基变容二极管的数量，以及通过设置肖特基变容二极管之间的间距来改变冲击线的布拉格截止频率来实现的。（2）通过改变采样器脉冲形成网络中的微分器臂的长度来改变与取样器连接的脉冲形成网络的结构; 和（3）改变施加到冲击线的LO信号频率。多个基于NLTL的采样器被多路复用以形成宽带反射计，多路复用电路一次有选择地连接一个基于NLTL的采样器段，以允许用户选择每个段的期望性能与频率响应。

6. 发明申请

US20080258738A1 CHARACTERIZING TEST FIXTURES 有权
标题翻译：表征测试仪器
公开(公告)号：US20080258738A1
公开(公告)日：2008-10-23
申请号：US11738265
申请日：2007-04-20
申请人： Jon S. Martens , David V. Judge
发明人： Jon S. Martens , David V. Judge
IPC分类号： G01R35/00 , G01R27/28
CPC分类号： G01R35/005 , G01R27/28
摘要： Provided herein are techniques for characterizing a test fixture that is used for connecting a device under test (DUT) to a vector network analyzer (VNA), e.g., to thereby enable de-embedding of the test fixture from measurements of the DUT connected to the test fixture. In an embodiment, the test fixture is separated into 4-port test fixture segments, based on which ports of the DUT have internal coupling. Each test fixture segment has an outer 2-port reference plane and an inner 2-port reference plane. A 4-port calibration is performed at outer planes of the two test fixture segments, while corresponding ports of the inner planes of the test fixture segments are connected together with thru segments, to thereby determine a thru set of S-parameters. A set of S-parameters is determined for each of the 4-port test fixture segments, based on the thru set of S-parameters.
摘要翻译：本文提供了用于表征用于将被测设备（DUT）连接到矢量网络分析仪（VNA）的测试夹具的技术，例如，从而能够将测试夹具从与连接到测试夹具在一个实施例中，基于DUT的哪些端口具有内部耦合，测试夹具被分成4端口测试夹具段。每个测试夹具段具有外部2端口参考平面和内部2端口参考平面。在两个测试夹具段的外平面上执行4端口校准，而测试夹具段的内平面的相应端口通过段连接在一起，从而确定一组S参数。基于S参数的集合，为每个4端口测试夹具段确定一组S参数。

7. 发明授权

US06943563B2 Probe tone S-parameter measurements 失效
标题翻译：探头音S参数测量
公开(公告)号：US06943563B2
公开(公告)日：2005-09-13
申请号：US10138989
申请日：2002-05-02
申请人： Jon S. Martens
发明人： Jon S. Martens
IPC分类号： G01R27/28 , H04B17/00 , G01R35/00
CPC分类号： G01R27/28 , H04B17/20
摘要： An S-parameter measurement technique allows measurement of devices under test (DUTs), such as power amplifiers, which require a modulated power tone drive signal for proper biasing, in combination with a probe tone test signal, wherein both the modulated and probe tone signals operate in the same frequency range. The technique uses a stochastic drive signal, such as a CDMA or WCDMA modulated signal in combination with a low power probe tone signal. A receiver in a VNA having a significantly narrower bandwidth than the modulated signal bandwidth enables separation of the modulated and probe tone signals. VNA calibration further improves the measurement accuracy. For modulated signals with a significant power level in the frequency range of the probe tone signal, ensemble averaging of the composite probe tone and power tone signals is used to enable separation of the probe tone signal for measurement.
摘要翻译： S参数测量技术允许测量被测设备（DUT），例如功率放大器，其需要调制功率音调驱动信号以进行适当的偏置，与探测音测试信号相结合，其中调制和探测音调信号在相同的频率范围内工作。该技术使用随机驱动信号，例如CDMA或WCDMA调制信号与低功率探测音调信号的组合。具有比调制信号带宽明显更窄的带宽的VNA中的接收机能够分离调制和探测音调信号。 VNA校准进一步提高了测量精度。对于在探测音信号的频率范围内具有显着功率电平的调制信号，使用复合探测音和功率乐音信号的整体平均来使探测音信号分离以进行测量。

8. 发明授权

US06650123B2 Methods for determining characteristics of interface devices used with vector network analyzers 失效
标题翻译：用于确定与矢量网络分析仪一起使用的接口设备特性的方法
公开(公告)号：US06650123B2
公开(公告)日：2003-11-18
申请号：US10050305
申请日：2002-01-15
申请人： Jon S. Martens
发明人： Jon S. Martens
IPC分类号： G01R2728
CPC分类号： G01R27/28
摘要： Methods are provided for characterizing N interface devices (e.g., adapters or test fixture arms) using a vector network analyzer (VNA). These N interface devices are useful for connecting an N-port device under test (DUT) to the VNA. A first step of includes performing an N-port calibration at each of N outer reference planes. A second step includes performing an N-port calibration at each of N inner reference planes. A set of scattering-parameters (S-parameters) is then determined for each of the N interface devices based on results of the calibrations performed at the first step and results of the calibrations performed at the second step. Each set of S-parameters characterizes a respective one of the N interface devices.
摘要翻译：提供了使用矢量网络分析仪（VNA）表征N个接口设备（例如，适配器或测试夹具臂）的方法。这些N接口设备可用于将被测试的N端口设备（DUT）连接到VNA。第一步包括在N个外部参考平面中的每一个处执行N端口校准。第二步包括在N个内部参考平面中的每一个执行N端口校准。然后基于在第一步骤执行的校准结果和在第二步骤执行的校准结果，确定每个N个接口设备的一组散射参数（S参数）。每组S参数表示N个接口设备中的相应一个。

9. 发明授权

US5389837A Superconducting flux flow digital circuits 失效
标题翻译：超导磁通流数字电路
公开(公告)号：US5389837A
公开(公告)日：1995-02-14
申请号：US051103
申请日：1993-04-21
申请人： Vincent M. Hietala , Jon S. Martens , Thomas E. Zipperian
发明人： Vincent M. Hietala , Jon S. Martens , Thomas E. Zipperian
IPC分类号： H03K3/38 , H03K19/195
CPC分类号： H03K3/38 , H03K19/195 , Y10S505/701
摘要： A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs). Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics.
摘要翻译： NOR /反相器逻辑门电路和用超导磁通流量晶体管（SFFT）实现的触发电路。两个电路都包括两个带反馈线的SFFT。它们具有极低的功耗，非常高的开关速度，以及在约瑟夫逊结超导体电路和传统微电子之间进行接口的能力。

10. 发明申请

US20110013733A1 VARIABLE GAIN CONTROL FOR HIGH SPEED RECEIVERS 有权
标题翻译：高速接收机的可变增益控制
公开(公告)号：US20110013733A1
公开(公告)日：2011-01-20
申请号：US12505413
申请日：2009-07-17
申请人： Jon S. Martens , Helen Chau , David A. Rangel-Guzman , Peter M. Kapetanic , Dan Levasseur
发明人： Jon S. Martens , Helen Chau , David A. Rangel-Guzman , Peter M. Kapetanic , Dan Levasseur
IPC分类号： H04L27/08
CPC分类号： H03G3/3068
摘要： A high speed receiver is provided using two parallel processing paths to enable rapid variable gain control. The parallel processing paths include a first processing path using a high resolution Discrete Fourier Transform (DFT), and a second processing path using a reduced DFT requiring fewer samples than the high resolution DFT. An initial sample of the data is processed using the second processing path with the reduced DFT by comparing a Fourier transform of the initial sample with predetermined threshold values. As a result of the comparison of the Fourier transform of the initial sample with the predetermined threshold values, a gain determination block determines whether a requirement exists for gain ranging. If gain ranging is needed, the gain of the data signal is adjusted and the gain ranging process repeats.
摘要翻译：使用两个并行处理路径提供高速接收机，以实现快速可变增益控制。并行处理路径包括使用高分辨率离散傅里叶变换（DFT）的第一处理路径，以及使用与高分辨率DFT相比需要较少样本的减少的DFT的第二处理路径。通过将初始样本的傅立叶变换与预定阈值进行比较，使用具有减小的DFT的第二处理路径来处理数据的初始样本。作为初始样本的傅里叶变换与预定阈值的比较的结果，增益确定块确定是否存在增益测距的要求。如果需要增益测距，则调整数据信号的增益，并重复增益测距过程。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式