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1. 发明授权

US4352948A High-intensity solid-state solar-cell device 失效
标题翻译：高强度固态太阳能电池装置
公开(公告)号：US4352948A
公开(公告)日：1982-10-05
申请号：US209942
申请日：1980-11-17
申请人： Roy Kaplow , Robert I. Frank , Joel Goodrich
发明人： Roy Kaplow , Robert I. Frank , Joel Goodrich
IPC分类号： H01L27/142 , H01L31/0352 , H01L31/06
CPC分类号： H01L31/035281 , H01L31/047 , Y02E10/50
摘要： The invention contemplates a solar-cell construction wherein plural spaced elongate unit cells of an array are formed from a parallel-grooved single wafer or body of substrate material of a first conductivity type, with adjacent sidewalls of adjacent units at each inter-unit groove formation. Both sidewalls at each of a succession of grooves are formed with regions of second conductivity type, and an electrically conductive coating lines each sidewall having a second conductivity type region. A first output-terminal interconnect extends along one margin of the body and has ohmic contact with the coatings of the sidewalls having regions of the second conductivity type. A second output-terminal connection has ohmic contact to the body in a surface region of first conductivity type. Various embodiments are disclosed.
摘要翻译：本发明考虑了一种太阳能电池结构，其中阵列的多个间隔开的细长单元电池由平行沟槽的第一导电类型的衬底材料的单个晶片或主体形成，在每个单元间沟槽形成处具有相邻单元的相邻侧壁。在一连串的槽中的每一个的两个侧壁形成有第二导电类型的区域，并且每个侧壁的导电涂层线具有第二导电类型区域。第一输出端子互连沿主体的一个边缘延伸，并且与具有第二导电类型区域的侧壁的涂层欧姆接触。第二输出端子连接在第一导电类型的表面区域中与主体具有欧姆接触。公开了各种实施例。

2. 发明申请

US20140352759A1 REFLECTOR FOR A PHOTOVOLTAIC POWER MODULE 审中-公开
标题翻译：用于光伏电源模块的反射器
公开(公告)号：US20140352759A1
公开(公告)日：2014-12-04
申请号：US14342411
申请日：2012-08-21
申请人： Brett Barnes , Joel Goodrich , Sam Carter
发明人： Brett Barnes , Joel Goodrich , Sam Carter
IPC分类号： H01L31/052 , G02B19/00 , H01L31/048 , H01L31/18
CPC分类号： H01L31/0525 , G02B19/0019 , G02B19/0042 , H01L31/02008 , H01L31/0547 , H02S40/425 , Y02E10/52
摘要： A photovoltaic power module including a reflector, and methods for manufacturing the reflector. The photovoltaic power module includes a plurality of photovoltaic cells arranged in an array, including a photon source facing surface having a plurality of active areas that convert photons to electrical energy and a plurality of inactive areas that do not convert photons to electrical energy. The reflector covers at least one inactive area of a photon source facing surface, for reflecting photons that would otherwise have fallen on the inactive area onto an active area. The output of the photovoltaic power module may therefore be increased.
摘要翻译：包括反射器的光伏功率模块和用于制造反射器的方法。光伏功率模块包括布置成阵列的多个光伏电池，包括具有将光子转换成电能的多个有效区域的多个光子源面对表面和不将光子转换成电能的多个无效区域。反射器覆盖面向光子源的表面的至少一个非活动区域，用于反射否则将会在非活动区域下落到有效区域上的光子。因此可以增加光伏功率模块的输出。

3. 发明授权

US5672282A Process to preserve silver metal while forming integrated circuits 失效
标题翻译：在形成集成电路的同时保存银金属的工艺
公开(公告)号：US5672282A
公开(公告)日：1997-09-30
申请号：US591063
申请日：1996-01-25
申请人： Percy Chinoy , Joel Goodrich
发明人： Percy Chinoy , Joel Goodrich
IPC分类号： H01L21/285 , H01L21/3213 , B44C1/22 , C23F1/00
CPC分类号： H01L21/3213 , H01L21/28512
摘要： A process to form integrated circuits comprising silver metal circuits. Deposition techniques such as sputtering, not plating, upon substrates to form such silver metal circuits are common. However in the conventional processes to remove the resist and the metal overlaying the resist, these conventional processes are deleterious to the silver metal. Thereby a new process is provided. This new process entails the metal overlaying the resist of the wafer is initially removed by a high pressure force. The resist, in this new process, is then removed by a benign stripper solution having the temperature of the solution raised to the highest temperature without degrading the stripper solution and said circuit is exposed to said stripper solution for one to five minutes.
摘要翻译：一种形成包括银金属电路的集成电路的工艺。沉积技术，例如溅射，而不是镀覆在基板上以形成这种银金属电路是常见的。然而，在除去抗蚀剂和覆盖抗蚀剂的金属的常规方法中，这些常规方法对银金属是有害的。从而提供了新的过程。这种新工艺需要金属覆盖，晶片的抗蚀剂最初被高压力除去。然后，在该新工艺中的抗蚀剂通过将溶液的温度升至最高温度的良性汽提器溶液除去，而不会使汽提溶液溶解而使所述电路暴露于所述汽提溶液中1至5分钟。

4. 发明授权

US06849879B2 Crosstalk reduction in a crosspoint thyristor switching array using a shielded dielectric stack 失效
标题翻译：使用屏蔽电介质叠层的交叉点晶闸管开关阵列中的串扰降低
公开(公告)号：US06849879B2
公开(公告)日：2005-02-01
申请号：US10270109
申请日：2002-10-15
申请人： Ross A. La Rue , Jules D. Levine , Daniel Curcio , Timothy Boles , Joel Goodrich , David Hoag , Noyan Kinayman
发明人： Ross A. La Rue , Jules D. Levine , Daniel Curcio , Timothy Boles , Joel Goodrich , David Hoag , Noyan Kinayman
IPC分类号： H01L20060101 , H01L23/522 , H01L27/102 , H01L29/74 , H01L29/80 , H01L31/111 , H01P1/15
CPC分类号： H01L23/5225 , H01L27/1027 , H01L2924/0002 , H01L2924/3011 , H01P1/15 , H01L2924/00
摘要： A method and apparatus are disclosed for reducing crosstalk and dispersion in a crosspoint monolithic microwave integrated circuit (MMIC) switch array operating in a range between DC and microwave frequencies. In accordance with an exemplary embodiment, the crosspoint MMIC switch array includes a dielectric stack, a substrate, a first ground plane, a plurality of thyristor switches, a plurality of signal transmission lines arranged in rows; and a plurality of signal transmission lines arranged in columns. The plurality of signal transmission lines arranged in columns intersect the plurality of signal transmission lines arranged in rows at a plurality of intersection points. Each of the plurality of thyristor switches is associated with one of the plurality of intersection points. Each of the plurality of thyristor switches is in electrical contact with the signal transmission lines that intersect at the associated intersection point.
摘要翻译：公开了一种用于减少在DC和微波频率之间的范围内工作的交叉点单片微波集成电路（MMIC）开关阵列中的串扰和色散的方法和装置。根据示例性实施例，交叉点MMIC开关阵列包括电介质堆叠，衬底，第一接地平面，多个晶闸管开关，排列成行的多个信号传输线; 以及以列列排列的多个信号传输线。布置在列中的多个信号传输线与在多个交点处排列成行的多个信号传输线交叉。多个晶闸管开关中的每一个与多个交点中的一个相关联。多个晶闸管开关中的每一个与在相关联的交叉点相交的信号传输线电接触。

5. 发明申请

US20050269695A1 Surface-mount chip-scale package 审中-公开
标题翻译：表面贴装芯片级封装
公开(公告)号：US20050269695A1
公开(公告)日：2005-12-08
申请号：US10862710
申请日：2004-06-07
申请人： James Brogle , Timothy Boles , Joel Goodrich
发明人： James Brogle , Timothy Boles , Joel Goodrich
IPC分类号： H01L23/14 , H01L25/065 , H01L25/07 , H01L25/18 , H01L27/02 , H01L27/08 , H01L23/52
CPC分类号： H01L27/0248 , H01L27/0814 , H01L2224/16 , H01L2924/12032 , H01L2924/1301 , H01L2924/00
摘要： A chip-scale package and method of manufacturing a chip-scale package are provided. The chip-scale package includes a mounting portion defined by a plurality of metal layers formed on each of a plurality of semiconductor regions for mounting a device thereto. The mounting portions are formed on a first side of the plurality of semiconductor regions. The chip-scale package further includes a backside metal surface formed on each of a second side of the plurality of semiconductor regions, with the plurality of semiconductor regions providing electrical connection between the mounting portions and the backside metal surfaces.
摘要翻译：提供了芯片级封装和芯片级封装的制造方法。芯片级封装包括由形成在多个半导体区域中的每一个上的多个金属层限定的用于安装器件的安装部分。安装部分形成在多个半导体区域的第一侧上。芯片级封装还包括形成在多个半导体区域的第二侧上的每个上的背面金属表面，多个半导体区域在安装部分和背面金属表面之间提供电连接。

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