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    • 2. 发明申请
    • Sequential nibble burst ordering for data
    • 数据的顺序半字节排序
    • US20060190677A1
    • 2006-08-24
    • US11407780
    • 2006-04-20
    • Jeffery Janzen
    • Jeffery Janzen
    • G06F12/00
    • G11C7/1033
    • A combination of circuits for use in a memory device is comprised of a decode circuit responsive to a first portion of address information for identifying a word to be read or written. The decode circuit is further responsive to a second portion of the address information for identifying an order in which one or more portions of the identified word are to be read or written. An address sequencer routes at least one bit of the address information. A sequencer circuit is responsive to the address sequencer for ordering the plurality of data bits within each portion of the identified word.
    • 用于存储器件的电路的组合包括一个响应于第一部分地址信息的解码电路,用于识别要被读或写的字。 解码电路还响应于地址信息的第二部分,用于识别所识别的字的一个或多个部分要被读取或写入的顺序。 地址定序器路由地址信息的至少一位。 定序器电路响应于地址定序器,用于对所识别的字的每个部分内的多个数据位进行排序。
    • 7. 发明申请
    • Techniques for storing accurate operating current values
    • 用于存储精确的工作电流值的技术
    • US20060149996A1
    • 2006-07-06
    • US11338200
    • 2006-01-24
    • Jeffery JanzenScott SchaeferTodd Farrell
    • Jeffery JanzenScott SchaeferTodd Farrell
    • G06F11/00
    • G11C11/4074G11C5/00G11C5/143G11C7/04G11C16/20G11C29/02G11C29/028G11C2029/4402G11C2029/5006
    • Methods of manufacturing memory devices and memory modules comprising memory device. Specifically, respective operating current values may be measured and/or stored on a plurality of memory devices. More specifically, the operating current values may be stored in programmable elements, such as antifuses, on memory devices. The memory devices may be coupled to a substrate to form a memory module. A non-volatile memory device may be coupled to the substrate. The operating current values may be read from the programmable elements and stored in the non-volatile memory device. Once the memory module is incorporated into a system, the programmable elements or non-volatile memory may be accessed such that the system can be configured to optimally operate in accordance with the operating current values measured for each memory device in the system.
    • 制造存储器件和包括存储器件的存储器模块的方法。 具体地,可以在多个存储器件上测量和/或存储各自的工作电流值。 更具体地,工作电流值可以存储在存储器件上的诸如反熔丝的可编程元件中。 存储器件可以耦合到衬底以形成存储器模块。 非易失性存储器件可以耦合到衬底。 可以从可编程元件读取工作电流值并存储在非易失性存储器件中。 一旦将存储器模块并入到系统中,可以访问可编程元件或非易失性存储器,使得可以将系统配置为根据对系统中的每个存储器件测量的工作电流值进行最佳操作。
    • 8. 发明申请
    • Active termination control through module register
    • 通过模块寄存器主动终止控制
    • US20060050597A1
    • 2006-03-09
    • US11217056
    • 2005-08-31
    • Jeffery Janzen
    • Jeffery Janzen
    • G11C8/00G11C5/06
    • G06F13/4086
    • A method and apparatus are provided for active termination control in a memory by an module register providing an active termination control signal to the memory. The module register monitors a system command bus for read and write commands. In response to detecting a read or write command, the module register generates an active termination control signal to the memory. The memory turns on active termination based on information programmed into one or more mode registers of the memory. The memory maintains the active termination in an on state for a predetermined time based on information programmed into one or more mode registers of the memory.
    • 提供了一种方法和装置,用于通过模块寄存器向存储器中的主动终止控制提供活动终止控制信号给存储器。 模块寄存器监视系统命令总线以进行读写命令。 响应于检测到读或写命令,模块寄存器产生到存储器的有效终止控制信号。 存储器根据编程到存储器的一个或多个模式寄存器中的信息,开启有效终止。 存储器基于编程到存储器的一个或多个模式寄存器中的信息,将活动终止维持在接通状态达预定时间。